From 7956039dfddbe4b7d1ab2abfdac00f54606e63b0 Mon Sep 17 00:00:00 2001 From: "Daniel P. Carvalho" Date: Sat, 3 Oct 2026 19:14:04 -0300 Subject: [PATCH] arch/mips/pic32mz: record the running task on interrupt exit. pic32mz_decodeirq() saves the interrupted context to the TCB in g_running_tasks[], but never updated g_running_tasks[] after a context switch. It kept pointing at the Idle task from nx_start(), so every interrupt overwrote the Idle task's saved registers, and after up_exit() set it to NULL no context was saved at all. The next context switch then restored stale registers; on PIC32MZ-W1 the system crashed as soon as the netinit thread exited. Set g_running_tasks[] to this_task() before returning, as the other architectures do. Assisted-by: Claude Code:claude-opus-5-5 Signed-off-by: Daniel P. Carvalho --- arch/mips/src/pic32mz/pic32mz_decodeirq.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/mips/src/pic32mz/pic32mz_decodeirq.c b/arch/mips/src/pic32mz/pic32mz_decodeirq.c index f22d1fc6645..4f0ce0d2e57 100644 --- a/arch/mips/src/pic32mz/pic32mz_decodeirq.c +++ b/arch/mips/src/pic32mz/pic32mz_decodeirq.c @@ -36,6 +36,7 @@ #include #include #include +#include #include "mips_internal.h" #include "hardware/pic32mz_int.h" @@ -141,6 +142,12 @@ uint32_t *pic32mz_decodeirq(uint32_t *regs) regs = up_current_regs(); + /* Record the task that will run when the interrupt returns. Its state + * is saved to its TCB on the next interrupt entry (see above). + */ + + *running_task = this_task(); + #if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV) /* Check for a context switch. If a context switch occurred, then * g_current_regs will have a different value than it did on entry. If an