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In RS-485 mode the driver released the direction (DE) pin only on TX_BRK_IDLE_DONE. That interrupt belongs to the break feature (UART_TXD_BRK), which this driver never enables, so it never fired and DIR stayed asserted after the first transmit. The board then kept driving the bus and collided with every reply. The interrupt was also never cleared, so had it fired, the handler would have re-entered forever. TX_DONE cannot simply replace it: the upper half calls txint(false) as soon as its software buffer drains, which disabled TX_DONE while the last bytes were still in the FIFO (see #15888). * Keep TX_DONE enabled in txint(false) while in RS-485 mode. * In the handler, on TX_DONE with the software buffer and TX FIFO empty, wait (bounded) for the transmitter FSM to go idle so the last stop bit is not clipped, release DIR and disable TX_DONE. This is how ESP-IDF's RS-485 half-duplex mode handles it. * Make txempty() use FIFO count and FSM state, as ESP-IDF's uart_ll_is_tx_idle() does. The raw TX_DONE bit reads 0 before the first transmission and is now cleared by the handler, which would make tcdrain() wait for its full timeout. Tested on an ESP32-S3 board with an SP3485 transceiver (DE/RE on GPIO21) at 115200 baud, doing Modbus RTU reads against a servo drive: without the patch every request timed out; with it DIR drops right after the last stop bit and all reads succeed. Assisted-by: Claude:claude-opus-5-5 Signed-off-by: Max Kriegleder <max.kriegleder@gmail.com> |
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| ceva | ||
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| or1k | ||
| renesas | ||
| risc-v | ||
| sim | ||
| sparc | ||
| tricore | ||
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| xtensa | ||
| z16 | ||
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| CMakeLists.txt | ||
| Kconfig | ||