nuttx/libc: refine the atomic related Kconfig

Refine the atomic Kconfig to support multiple backends:
LIBC_ATOMIC_TOOLCHAIN (compiler builtins), LIBC_ATOMIC_ARCH (arch
instructions), and LIBC_ATOMIC_IRQ (interrupt disable). Rename
arch_atomic.c to arch_atomic_irq.c since it supports the IRQ backend.

Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
This commit is contained in:
zhangyu117 2026-08-13 22:32:10 +08:00 committed by Xiang Xiao
parent b369695b8e
commit 5ff4bdde65
12 changed files with 32 additions and 16 deletions

View file

@ -856,7 +856,6 @@ config ARCH_CHIP_CXD56XX
select ARCH_HAVE_MATH_H
select ARCH_HAVE_I2CRESET
select ARCH_HAVE_CUSTOM_TESTSET
select LIBC_ARCH_ATOMIC if SMP
---help---
Sony CXD56XX (ARM Cortex-M4) architectures
@ -948,7 +947,7 @@ config ARCH_CHIP_CXD32XX
bool "Sony CXD32xx"
select ARCH_CORTEXM4
select ARCH_HAVE_FPU
select LIBC_ARCH_ATOMIC
select LIBC_ATOMIC_IRQ
---help---
Sony CXD32XX (ARM Cortex-M4) architectures
@ -956,7 +955,6 @@ config ARCH_CHIP_HT32F491X3
bool "Holtek HT32F491x3"
select ARCH_CORTEXM4
select ARCH_HAVE_FPU
select LIBC_ARCH_ATOMIC
---help---
Holtek HT32F491x3 (ARM Cortex-M4) architectures

View file

@ -62,6 +62,7 @@ config ARCH_RENESAS_RX
default n
select ARCH_HAVE_SETJMP
select CYGWIN_WINTOOL if WINDOWS_CYGWIN
select LIBC_ATOMIC_IRQ
config ARCH_RX65N
bool

View file

@ -82,6 +82,7 @@ config ARCH_CHIP_BL602
select ONESHOT_COUNT
select ONESHOT_FAST_DIVISION
select ALARM_ARCH
select LIBC_ATOMIC_IRQ
---help---
BouffaloLab BL602(rv32imfc)

View file

@ -893,7 +893,7 @@ config ESP32_RTC_HEAP
config ESP32_IRAM_HEAP
bool "Use the rest of IRAM as a separate heap"
select ARCH_HAVE_EXTRA_HEAPS
select LIBC_ARCH_ATOMIC
select LIBC_ATOMIC_IRQ
select ARCH_USE_TEXT_HEAP
default n

View file

@ -30,7 +30,6 @@ CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_LIBC_ARCH_ATOMIC=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y

View file

@ -36,7 +36,7 @@
# endif
#endif
#if !defined(CONFIG_LIBC_ARCH_ATOMIC)
#if defined(CONFIG_LIBC_ATOMIC_TOOLCHAIN)
# if __has_include(<atomic>) && defined(__cplusplus)
extern "C++"
{

View file

@ -22,7 +22,7 @@
add_subdirectory(${CONFIG_ARCH})
target_sources(c PRIVATE arch_atomic.c)
target_sources(c PRIVATE arch_atomic_irq.c)
if(CONFIG_MM_KASAN)
target_sources(c PRIVATE arch_libc.c)

View file

@ -9,13 +9,24 @@
menu "Architecture-Specific Support"
config LIBC_ARCH_ATOMIC
bool "arch_atomic"
config LIBC_ATOMIC_IRQ
bool
default n
---help---
If this configuration is selected and <include/nuttx/atomic.h> is
included, arch_atomic.c will be linked instead of built-in
atomic function.
atomic function by irq disable/enable
config LIBC_ATOMIC_ARCH
bool
default n
---help---
arch_atomic by arch instruction
config LIBC_ATOMIC_TOOLCHAIN
bool
default y if !LIBC_ATOMIC_IRQ && !LIBC_ATOMIC_ARCH
default n
---help---
atomic function from toolchain
config ARCH_LOWPUTC
bool "Low-level console output"

View file

@ -20,7 +20,7 @@
#
############################################################################
CSRCS += arch_atomic.c
CSRCS += arch_atomic_irq.c
ifeq ($(CONFIG_MM_KASAN),y)
CSRCS += arch_libc.c

View file

@ -1,5 +1,5 @@
/****************************************************************************
* libs/libc/machine/arch_atomic.c
* libs/libc/machine/arch_atomic_irq.c
*
* SPDX-License-Identifier: Apache-2.0
*
@ -78,7 +78,7 @@
#define CMP_EXCHANGE(fn, n, type) \
\
bool weak_function CONCATENATE(fn, n)(FAR volatile void *mem, \
FAR void *expect, \
FAR volatile void *expect, \
type desired, bool weak, \
int success, int failure) \
{ \

View file

@ -22,7 +22,10 @@
set(SRCS)
list(APPEND SRCS arch_atomic.c)
if(CONFIG_LIBC_ATOMIC_ARCH)
list(APPEND SRCS arch_atomic.c)
endif()
if(CONFIG_ARCH_SETJMP_H)
list(APPEND SRCS arch_setjmp.c)
endif()

View file

@ -20,7 +20,10 @@
#
############################################################################
ifeq ($(CONFIG_LIBC_ATOMIC_ARCH),y)
CSRCS += arch_atomic.c
endif
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
CSRCS += arch_setjmp.c
endif