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fc488eef01
The port ran on whichever hart the firmware handed over on, with a single idle stack. The firmware does not pick the same hart every boot, so nothing may assume one. The hart that arrives first records which it was, indexes its idle stack by its own ID, and restarts on hart 0; NuttX runs CPU0 there because that is the only hart riscv_set_inital_sp() gives a whole idle stack to. The first hart in owns the one time setup, and that guard lives in .data because it is read before the BSS is cleared. CONFIG_SMP_NCPUS below four is refused in chip.h: the hart the firmware picked would have no slot and would stop in __start before it could restart, which fails on some resets and not others. Secondary harts are released through the common SBI helper rather than a private copy of the same call. Assisted-by: Claude:claude-opus-5 Signed-off-by: Justin Hammond <justin@dynam.ac> |
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| arm | ||
| arm64 | ||
| avr | ||
| ceva | ||
| dummy | ||
| hc | ||
| mips | ||
| misoc | ||
| or1k | ||
| renesas | ||
| risc-v | ||
| sim | ||
| sparc | ||
| tricore | ||
| x86 | ||
| x86_64 | ||
| xtensa | ||
| z16 | ||
| z80 | ||
| CMakeLists.txt | ||
| Kconfig | ||