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The MMC CMD6 bus width switch was gated on priv->buswidth which is derived from the SD SCR register. For MMC cards this field is never set (unless SDIO_CAPS_4BIT_ONLY), so the CMD6 was skipped while the host PROCTL DTW was still changed - causing a bus width mismatch and data transfer timeouts. Fix by checking priv->caps instead of priv->buswidth for MMC cards. Also select EXT_CSD_BUS_WIDTH_8 when host reports SDIO_CAPS_8BIT. Signed-off-by: buxiasen <buxiasen@xiaomi.com> |
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|---|---|---|
| .. | ||
| CMakeLists.txt | ||
| Kconfig | ||
| Make.defs | ||
| mmcsd.h | ||
| mmcsd_csd.h | ||
| mmcsd_debug.c | ||
| mmcsd_extcsd.h | ||
| mmcsd_procfs.c | ||
| mmcsd_sdio.c | ||
| mmcsd_sdio.h | ||
| mmcsd_spi.c | ||
| mmcsd_spi.h | ||
| sdio.c | ||