nuttx/arch/arm
raiden00pl d9eb2a7a55 arch/arm/stm32: Generalize the Cortex-M33 NVIC dump helper
Iterate the NVIC interrupt enable and priority registers from
STM32_IRQ_NEXTINTS instead of dumping a hardcoded U3/U5 register list,
so the helper works unchanged for any interrupt count.

Signed-off-by: raiden00pl <raiden00@railab.me>
Assisted-by: Claude Code
2026-08-27 01:07:10 +08:00
..
include arch/arm: define SecureFault for STM32H5/L5/U5 2026-08-27 01:06:44 +08:00
src arch/arm/stm32: Generalize the Cortex-M33 NVIC dump helper 2026-08-27 01:07:10 +08:00
CMakeLists.txt
Kconfig nuttx/atomic: select LIBC_ATOMIC_IRQ for archs without atomic support 2026-08-24 13:20:45 +08:00