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d70725e4e0
The code that claimed to "enable clocking to the USB peripheral" cleared RCC_APB1ENR_USBEN inside RCC_APB1RSTR. That is both the wrong register and the wrong bit: USBEN belongs to RCC_APB1ENR, while APB1RSTR holds RCC_APB1RSTR_USBRST. The peripheral clock is enabled by the RCC setup performed at boot, so the write had no useful effect and merely cleared an unrelated reset bit. Issue a proper reset pulse on RCC_APB1RSTR_USBRST instead, so the controller starts from a known state. On STM32L0 the D+/D- lines are connected to the USB transceiver automatically once the peripheral is enabled and there is no alternate function to select, so skip the GPIO configuration on that chip. The board GPIO_USB_DM/GPIO_USB_DP definitions do not exist there. Assisted-by: GitHub Copilot:claude-opus-5 Signed-off-by: jsanchez-2g <jsanchez@2g-eng.com> |
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| arm | ||
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| avr | ||
| ceva | ||
| dummy | ||
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| mips | ||
| misoc | ||
| or1k | ||
| renesas | ||
| risc-v | ||
| sim | ||
| sparc | ||
| tricore | ||
| x86 | ||
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| xtensa | ||
| z16 | ||
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| CMakeLists.txt | ||
| Kconfig | ||