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The i.MX95 has five GPIO instances, but g_gpio_base[] only listed the first four. IMX9_GPIO_BASE(n) indexes this table directly, so any access to port GPIO5 read one element past the end of the array and caused a crash. The table was previously selected on CONFIG_ARCH_CHIP_IMX9_CORTEX_M, which covers both the i.MX93 M33 and the i.MX95 M7. Since the i.MX93 only has four GPIO instances and does not define IMX9_GPIO5_BASE, key the five entry table off CONFIG_ARCH_CHIP_IMX95_M7 and keep the four entry table for the i.MX93 (both the Cortex-A CONFIG_ARCH_CHIP_IMX93 and the Cortex-M CONFIG_ARCH_CHIP_IMX93_M33 variants). Signed-off-by: Peter van der Perk <peter.vanderperk@nxp.com> |
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| arm | ||
| arm64 | ||
| avr | ||
| ceva | ||
| dummy | ||
| hc | ||
| mips | ||
| misoc | ||
| or1k | ||
| renesas | ||
| risc-v | ||
| sim | ||
| sparc | ||
| tricore | ||
| x86 | ||
| x86_64 | ||
| xtensa | ||
| z16 | ||
| z80 | ||
| CMakeLists.txt | ||
| Kconfig | ||