nuttx/arch/risc-v
Huang Qi c1b41fefeb riscv_cpuinfo: Add support for RVV extension in CPU info
Add missing info for RVV ISA extention, which is already supported
by NuttX.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2024-09-25 23:54:19 +08:00
..
include arch: use up_current_regs/up_set_current_regs replace CURRENT_REGS 2024-09-13 23:18:58 +08:00
src riscv_cpuinfo: Add support for RVV extension in CPU info 2024-09-25 23:54:19 +08:00
CMakeLists.txt cmake:init RISC-V cmake qemu-rv build 2023-10-26 21:01:46 +08:00
Kconfig risc-v: Add a new option to control exception reason 2024-09-17 15:26:06 -03:00