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riscv_cpuinfo: Add support for RVV extension in CPU info

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Add missing info for RVV ISA extention, which is already supported
by NuttX.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
This commit is contained in:
Huang Qi 2024-09-25 20:52:27 +08:00 • committed by Xiang Xiao
parent 45a8d99755
commit c1b41fefeb
1 changed files with 3 additions and 0 deletions
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arch/risc-v/src/common/riscv_cpuinfo.c
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@ -64,6 +64,9 @@ ssize_t up_show_cpuinfo(char *buf, size_t buf_size, off_t file_off)
#ifdef CONFIG_ARCH_RV_ISA_C
procfs_sprintf(buf, buf_size, &file_off, "%s", "c");
#endif
#ifdef CONFIG_ARCH_RV_ISA_V
procfs_sprintf(buf, buf_size, &file_off, "%s", "v");
#endif
/* MMU type */