nuttx/arch/risc-v/include
Huang Qi 864fdb090c arch/risc-v/k210: Remove QEMU support
Remove the CONFIG_K210_WITH_QEMU option and associated conditional
code paths. The reasons for removal are:

* Simplifies code path for real hardware by removing QEMU workarounds
* The current QEMU target uses sifive_u machine, which is not designed
  for K210 emulation
* For RISC-V QEMU simulation, the qemu-rv (rv-virt) target is a better
  choice
* Renode can be used as an alternative for K210 simulation if needed

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2026-03-23 14:25:29 +08:00
..
bl602
bl808 risc-v/bl808: Add I2C driver 2024-12-25 11:03:26 +08:00
c906
eic7700x arch/risc-v/eic7700x: Add support for ESWIN EIC7700X SoC 2025-03-04 09:27:48 -05:00
esp32c3
esp32c3-legacy
esp32c6
esp32h2
esp32p4 arch/risc-v/espressif/esp32p4: Support ESP32-P4 on NuttX 2026-03-09 21:40:25 +01:00
fe310
hpm6000
hpm6750
jh7110
k210 arch/risc-v/k210: Remove QEMU support 2026-03-23 14:25:29 +08:00
k230
litex
mpfs
qemu-rv
rp23xx-rv arch/risc-v/rp23xx-riscv: Add rp23xx RISC-V cores support (Hazard3) 2025-08-11 08:56:27 +08:00
rv32m1
sg2000
thead
.gitignore
arch.h arch/risc-v/rp23xx-riscv: Add rp23xx RISC-V cores support (Hazard3) 2025-08-11 08:56:27 +08:00
barriers.h barrier: add UP_RMB UP_WMB 2025-12-22 10:22:06 -03:00
csr.h
elf.h
inttypes.h
irq.h arch: rename STACK_ALIGNMENT to STACKFRAME_ALIGN across all architectures 2026-01-22 15:37:24 +08:00
limits.h
mode.h
setjmp.h
spinlock.h arch/riscv: use UP_DSB, UP_DMB, UP_ISB as barrier standard API 2025-01-20 20:13:07 +08:00
stdarg.h
syscall.h
types.h