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0b35d45b2c
Add an initial port for the AIFoundry Erbium Minion core running on the public ET-platform system emulator (erbium_emu). NuttX boots directly from a firmware ELF at 0x40000200, runs in machine mode on hart 0 with SMP disabled, and parks secondary harts before they touch memory. The chip layer provides startup, PLIC interrupts, the UART0 console driver and the machine timer. Context switching, FPU save/restore, heap, idle and timer handling reuse the common RISC-V code. Atomics use interrupt masking because the core does not implement the A extension. Erbium implements the F extension but executes fdiv/fsqrt and FENCE.I in microcode, which a standalone image does not provide. The board build files pass -mno-fdiv to GCC when the FPU is enabled, so those operations use software helpers. Startup initializes the FPU without the common FENCE.I sequence, and the board configurations disable the dynamic ELF loader, which also relies on FENCE.I. Add minion:nsh and minion:ostest configurations, Make and CMake support, CMake CI build entries, and a host script that runs prebuilt images in the emulator and checks the console and OS test results. Tested with emulator revision 836a4ab600e9 and xPack GCC 14.3.0: both configurations build with Make and CMake, ostest exits with status 0 including the FPU tests, and the NSH console, procfs, timer and UART receive paths work. Silicon, SMP, protected builds and reboot are not covered by this initial port. Signed-off-by: Afonso Oliveira <afonso.oliveira707@gmail.com> |
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| .. | ||
| arm | ||
| arm64 | ||
| avr | ||
| ceva | ||
| dummy | ||
| hc | ||
| mips | ||
| misoc | ||
| or1k | ||
| renesas | ||
| risc-v | ||
| sim | ||
| sparc | ||
| tricore | ||
| x86 | ||
| x86_64 | ||
| xtensa | ||
| z16 | ||
| z80 | ||
| CMakeLists.txt | ||
| Kconfig | ||