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nuttx/boards/arm/imxrt
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Jukka Laitinen 9cf38e7fbe arch/arm/imxrt: Make performance optimized memory configuration for M7 NSH 
Change the imxrt1180-evk M7 NSH configuration to use the SoC memories
more efficiently:

- Place .data, .bss, idle stack and primary heap into DTCM
- Allocate available OCRAM as a secondary heap
- Add a separate .dmamemory section in OCRAM for USB device DMA
  allocations
- Place .ramfunc into ITCM, together with hand-picked "hot" functions.
  The section is copied to ITCM at boot by the ramfunc copy.

The eDMA accesses DTCM through the SoC's dedicated bus window.

This configuration acts as an example of performance optimization for
imxrt1180 based boards.

Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
2026-10-08 16:25:44 +08:00
..
arcx-socket-grid arch/arm: Reserve r10 via ARCHCFLAGS and hoist the PIC module flags. 2026-07-24 23:09:08 +08:00
fmu-v6xrt boards/arm/imxrt: add the Holybro Pixhawk 6X-RT 2026-09-23 18:51:23 -03:00
imxrt1020-evk arch/arm: Reserve r10 via ARCHCFLAGS and hoist the PIC module flags. 2026-07-24 23:09:08 +08:00
imxrt1050-evk !arch/arm: Use r9 as the PIC base register. 2026-08-06 01:38:23 +08:00
imxrt1060-evk !arch/arm: Use r9 as the PIC base register. 2026-08-06 01:38:23 +08:00
imxrt1064-evk !arch/arm: Use r9 as the PIC base register. 2026-08-06 01:38:23 +08:00
imxrt1170-evk !arch/arm: Use r9 as the PIC base register. 2026-08-06 01:38:23 +08:00
imxrt1180-evk arch/arm/imxrt: Make performance optimized memory configuration for M7 NSH 2026-10-08 16:25:44 +08:00
teensy-4.x arch/arm: Reserve r10 via ARCHCFLAGS and hoist the PIC module flags. 2026-07-24 23:09:08 +08:00