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Add the Microchip EV49N51A Ethernet to Wi-Fi Bridge board, built around the WFI32E01PE module (PIC32MZ-W1) with a LAN8720A Ethernet PHY. The nsh configuration runs SYSCLK at 200 MHz with the console on UART1 (dedicated pins RA8/RA9, header J203, 115200 8N1) and drives the red and green user LEDs on RK1/RK3. It selects PGC2/PGD2 as the debug channel. The SST26VF032B serial flash on SPI1 (dedicated pins, CS on RA1) is exported as /dev/mtdblock0. Its SPI frequency is set to 20 MHz: the SST26 driver's 64 MHz default is above PBCLK3/2 (25 MHz), which pic32mz_spi.c does not handle. mips-debug.ld is used with every toolchain. It has no OUTPUT_FORMAT, because XC32 and Pinguino name their little-endian ELF targets differently; the board passes -EL to the linker instead. With XC32 the board builds with -mno-dsp -mno-dspr2: NuttX does not enable or save the DSP ASE state. Assisted-by: Claude Code:claude-opus-5-5 Signed-off-by: Daniel P. Carvalho <danieloak@gmail.com> |
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| .. | ||
| arm | ||
| arm64 | ||
| avr | ||
| ceva | ||
| hc | ||
| mips | ||
| misoc | ||
| or1k | ||
| renesas | ||
| risc-v | ||
| sim | ||
| sparc | ||
| tricore | ||
| x86 | ||
| x86_64 | ||
| xtensa | ||
| z16 | ||
| z80 | ||
| index.rst | ||