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4e6ad4fb56
Expose the RTL8730E I2C controllers through the shared Ameba I2C driver (arch/arm/src/common/ameba/ameba_i2c.c) by adding the chip-specific glue, build wiring and a board bus table. The change is gated by CONFIG_AMEBA_I2C (default disabled). Chip glue (ameba_i2c_chip.h) supplies the three controller register bases, the APB function/clock masks -- amebasmart encodes these in bit 25/26/27 with the group selector bit30=0, unlike the (bit30 | bit10/11) layout of the KM4-based parts -- and the pad-mux code. amebasmart has a single generic PINMUX_FUNCTION_I2C shared by every I2C pad instead of per-signal SCL/SDA crossbar codes, and its I2C_InitTypeDef omits the DMA request-level fields, so AMEBA_I2C_HAS_DMA_FIELDS stays undefined. The whole I2C fwlib lives in ram_common/ameba_i2c.c rather than lib_rom.a, so it is compiled into libameba_fwlib.a when I2C is enabled. The shared driver gains an optional per-controller IP-clock hook, AMEBA_I2C_IPCLK_FN(bus). amebasmart needs it because its I2C_StructInit() fills in a 10 MHz placeholder rather than the real reference clock (the other Ameba parts fill in a correct XTAL_ClkGet() / PLL_GetHBUSClk() / HPERI_ClkGet()), which makes I2C_SetSpeed() miscompute the SCL counts. The hook resolves the rate at run time: the two HS controllers sit on HS_AHB, i.e. NP_PLL divided by REG_LSYS_CKD_GRP0.CKD_HBUS, so it is a PLL/board setting and not a constant -- an EVB measured CKD_HBUS=8 (div9, 88.9 MHz) while the SDK's own I2CCLK_TABLE claims a flat 100 MHz and the register reset value would imply 80 MHz. The LP-domain I2C0 keeps its fixed 20 MHz. Chips that leave the macro undefined use the fwlib default and are unaffected; regression-tested on pke8721daf:i2c. All three controllers are registered: /dev/i2c0 on PA9/PA10, /dev/i2c1 on PA3/PA4 and /dev/i2c2 on PB10/PB11. Pad choice is constrained on this chip -- a pad reaches exactly one controller (SDA fixed per controller, SCL the next pad up), and the pads inside the analogue audio ranges (PA20-PA29, PA30-PB2, PB3-PB6) are driven by the codec and leave the bus stuck idle. Both rules are noted in the table's comment. Also add a weak DiagVprintf stub: the I2C fwlib logs through RTK_LOGx() -> rtk_log_write(), and unlike DiagPrintf that symbol is not in the AP ROM symbol table. It is weak so the strong definition in rtl8730e_wifi_stubs.c still wins when WiFi is enabled; both route to vprintf. Hardware-verified on an RTL8730E EVB against a second board running an I2C slave: register read, write, write/read round-trip, multi-byte dump and a full address scan, on all three buses at 100 kHz. Signed-off-by: dechao_gong <dechao_gong@realsil.com.cn> Assisted-by: Claude <noreply@anthropic.com> |
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| .. | ||
| arm | ||
| arm64 | ||
| avr | ||
| ceva | ||
| dummy | ||
| hc | ||
| mips | ||
| misoc | ||
| or1k | ||
| renesas | ||
| risc-v | ||
| sim | ||
| sparc | ||
| tricore | ||
| x86 | ||
| x86_64 | ||
| xtensa | ||
| z16 | ||
| z80 | ||
| CMakeLists.txt | ||
| Kconfig | ||