nuttx/arch
dechao_gong 4416660ce2 arch/arm/ameba: enable SMP on AmebaSmart CA32 (RTL8730E)
RTL8730E has dual Cortex-A32 cores (CA32) in the AP domain.  Core1 is
powered off by default and requires an explicit HSYS power-on sequence
before ATF SP_MIN can service the PSCI CPU_ON call.  Without it, SP_MIN
writes the entry point to the mailbox and times out waiting for Core1 to
poll it.

Add rtl8730e_core1_power_on() that mirrors SDK smp.c:rtk_core1_power_on():
assert reset, assert isolation, two-stage power-on with up_udelay() for
correct 50/50/500/50 us timing, then release isolation and reset.  Call it
from up_cpu_start() before psci_cpu_on().

Enable CONFIG_SMP / CONFIG_SMP_NCPUS=2 / CONFIG_ARM_PSCI in the nsh
defconfig.

Enabling SMP also exposed a latent WHC skb alignment bug: the Realtek
WHC WiFi driver keeps the AP/NP DDR views coherent with by-VA
DCache_Clean/Invalidate at SKB_CACHE_SZ (64 on RTL8730E) granularity,
which requires every skb buffer to be cache-line aligned.  The port had
omitted CONFIG_MM_DEFAULT_ALIGNMENT (defaulting to 8; the 8721Dx parts
set 32), so heap-allocated skb buffers were unaligned and the cache
maintenance spilled onto the neighbouring skb struct, corrupting its
immutable buf pointer (seen as skb->buf = 0x05 and a TX memcpy data
abort on "renew wlan0").  This was harmless on single core -- the
non-shareable DDR mapping made the stray maintenance a no-op -- but the
SMP shareable mapping plus real dual-core concurrency turned it into a
hard fault.  Set CONFIG_MM_DEFAULT_ALIGNMENT=64 in the nsh defconfig.

Hardware verified on RTL8730E (C-cut): /proc/cpuinfo shows both processor 0
and processor 1; getprime 2 completes two concurrent threads in ~573 ms
(same as single-thread), confirming true parallel execution across both cores.
"renew wlan0" now obtains a DHCP lease (192.168.1.101) without faulting.

Assisted-by: Claude Sonnet 4.6 <noreply@anthropic.com>
Signed-off-by: dechao_gong <dechao_gong@realsil.com.cn>
2026-09-21 18:43:22 +08:00
..
arm arch/arm/ameba: enable SMP on AmebaSmart CA32 (RTL8730E) 2026-09-21 18:43:22 +08:00
arm64 arch/arm64: implement up_addrenv_va_to_pa(). 2026-09-20 11:58:33 -03:00
avr arch, boards, cmake: Build C++ ELF modules without __cxa_atexit. 2026-09-04 15:44:24 -03:00
ceva arch/atomic: remove up_testset in spinlock 2026-09-08 08:58:54 +08:00
dummy
hc
mips arch, boards, cmake: Build C++ ELF modules without __cxa_atexit. 2026-09-04 15:44:24 -03:00
misoc arch, boards, cmake: Build C++ ELF modules without __cxa_atexit. 2026-09-04 15:44:24 -03:00
or1k arch, boards, cmake: Build C++ ELF modules without __cxa_atexit. 2026-09-04 15:44:24 -03:00
renesas nuttx/libc: refine the atomic related Kconfig 2026-08-24 13:20:45 +08:00
risc-v arch/risc-v/eic7700x: Name the reset lines through procfs. 2026-09-21 16:29:12 +08:00
sim sched/pthread: Implement pthread_sigqueue 2026-09-21 14:53:26 +08:00
sparc arch/atomic: remove up_testset in spinlock 2026-09-08 08:58:54 +08:00
tricore arch/atomic: remove up_testset in spinlock 2026-09-08 08:58:54 +08:00
x86 arch/x86: Add -P to CPP to suppress linemarkers. 2026-09-17 16:21:59 +08:00
x86_64 arch/intel64: don't touch the outgoing stack after releasing the csection 2026-09-15 11:39:05 -03:00
xtensa xtensa/espressif: fix lock-order deadlock in esp_wifi_event_handler() 2026-09-18 15:57:44 +08:00
z16
z80
CMakeLists.txt cmake: Use NUTTX(_DIR/_BIN_DIR) instead CMAKE(_SRC_DIR/_BIN_DIR) 2026-08-09 11:13:08 -03:00
Kconfig binfmt, arch/arm: Add the CONFIG_FDPIC option and the ABI header. 2026-09-08 16:31:16 -03:00