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- PIC32MZ-W1 only has the RMII interface and no DEVCFG3, so hide the PIC32MZ_FMIIEN and PIC32MZ_FETHIO options and define CONFIG_PIC32MZ_FMIIEN as 0 (RMII), matching DEVCFG1.FMIIEN. The default of 1 (MII) made the driver skip the RMII reset and speed setup, so the MAC ran its RMII logic at 10 Mbps. - Enable ETH_CLK_OUT (EWPLLCON.ETHCLKOUTEN), the 50 MHz RMII reference clock for the MAC and the PHY, only when the Ethernet MAC is enabled. - Add PIC32MZ_W1_ETH_EXTREFCLK for boards that clock the PHY and the MAC from an external 50 MHz oscillator; ETH_CLK_OUT is then left disabled. Assisted-by: Claude Code:claude-opus-5-5 Signed-off-by: Daniel P. Carvalho <danieloak@gmail.com> |
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| arm | ||
| arm64 | ||
| avr | ||
| ceva | ||
| dummy | ||
| hc | ||
| mips | ||
| misoc | ||
| or1k | ||
| renesas | ||
| risc-v | ||
| sim | ||
| sparc | ||
| tricore | ||
| x86 | ||
| x86_64 | ||
| xtensa | ||
| z16 | ||
| z80 | ||
| CMakeLists.txt | ||
| Kconfig | ||