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After a flash operation the driver called flash_select_xip_read_mode() with a fixed EBh quad mode and clock divisor 4, and called flash_enter_cmd_xip() if it "failed". But that ROM function returns void, so the check read a random r0. The fixed mode and divisor can also be different from the ones the bootrom found at boot. The datasheet (5.2.7, 5.4.8.10) and the Pico SDK use a different method: after a flash boot the bootrom leaves an XIP setup function in the first 256 bytes of boot RAM. It restores the read mode and clock divisor found at boot. Boot RAM is not executable, so copy the function to SRAM once at initialization, and call the copy. If boot RAM is empty (no flash boot), use flash_enter_cmd_xip(), as RP23XX_FLASH_MTD_SAFE_XIP does. Assisted-by: Claude Code:claude-opus-5-5 Signed-off-by: Marco Casaroli <marco.casaroli@gmail.com> |
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| arm | ||
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| avr | ||
| ceva | ||
| dummy | ||
| hc | ||
| mips | ||
| misoc | ||
| or1k | ||
| renesas | ||
| risc-v | ||
| sim | ||
| sparc | ||
| tricore | ||
| x86 | ||
| x86_64 | ||
| xtensa | ||
| z16 | ||
| z80 | ||
| CMakeLists.txt | ||
| Kconfig | ||