nuttx/boards/xtensa/esp32s3/common/scripts
Marco Casaroli 46528ea5ee xtensa/esp32s3: Let a protected build boot from simple boot.
BUILD_PROTECTED defaults ESP32S3_APP_FORMAT_LEGACY to y, so a protected build
has always needed the ESP-IDF second-stage bootloader.  Nothing about the
protected layout requires it:  the kernel and user images are described
entirely by ESP32S3_KERNEL_OFFSET, ESP32S3_KERNEL_IMAGE_SIZE and
ESP32S3_KERNEL_RAM_SIZE, and esp32s3_userspace() maps the user image itself.
Three obstacles stood in the way.

Those three symbols were gated on ESP32S3_APP_FORMAT_LEGACY, but
protected_memory.ld needs all of them for KIROM, KDROM, UIROM, UDROM, KDRAM
and UDRAM.  Without them the region lengths underflow to 2**64-1 and the
kernel/user RAM split lands nowhere, which the hardware reports as a DRAM0
PMS monitor violation once the first user process runs.  The offset becomes
0x0 for simple boot, where the image is flashed at the start of the device.

protected_memory.ld had no case for a 32 MB part, so FLASH_SIZE was
undefined there and ROM, UIROM and UDROM underflowed the same way.
flat_memory.ld has had the case all along.

kernel-space.ld defined none of the symbols simple boot needs
(_image_irom_*, _image_drom_*, _bss_*), and kept none of the early code
resident.  __start() runs bootloader_init() and map_rom_segments() before any
flash mapping exists, so everything they reach has to be in RAM -- including
map_rom_segments() itself, which unmaps the MMU it is running from, and
nuttx_enter_critical(), reached from rtc_clk_init() by way of regi2c.  These
mirror what esp32s3_sections.ld already does for the flat build.

Verified on an ESP32-S3-WROOM-2 (32 MB octal flash), esp32s3-devkit:knsh with
FLASH_MODE_OCT:  boots to NSH and runs ostest, where it reaches the same
timedmutex abort as every other target.  The legacy path is untouched.

Assisted-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Signed-off-by: Marco Casaroli <marco.casaroli@gmail.com>
2026-08-11 23:49:21 +08:00
..
.gitignore boards/xtensa/esp32[-s2|-s3]: Add multiple ULP RISC-V bin board support 2025-10-21 06:32:32 -03:00
esp32s3_aliases.ld arch/xtensa: update lower-half drivers for ESP32|S2|S3 2025-06-30 22:40:26 +08:00
esp32s3_peripherals.ld boards/xtensa/esp32s3: migrate to SPDX identifier 2024-11-12 22:20:59 +08:00
esp32s3_rom_aliases.ld esp32s3/elf: Fix ELF loader on ESP32-S3 when using external PSRAM 2025-08-20 02:23:03 +08:00
esp32s3_sections.ld xtensa/espressif: Update common-source integration for Xtensa devices 2026-03-29 00:33:11 +08:00
esp32s3_ulp_riscv_sections.ld boards/xtensa/esp32[-s2|-s3]: Add ULP RISC-V coprocessor support 2025-10-01 14:16:55 -04:00
flat_memory.ld xtensa/esp32s3: Fix getting the flash mappings by openocd-esp32 2025-04-18 02:25:14 +08:00
kernel-space.ld xtensa/esp32s3: Let a protected build boot from simple boot. 2026-08-11 23:49:21 +08:00
legacy_sections.ld xtensa/espressif: Update common-source integration for Xtensa devices 2026-03-29 00:33:11 +08:00
mcuboot_sections.ld xtensa/espressif: Update common-source integration for Xtensa devices 2026-03-29 00:33:11 +08:00
protected_memory.ld xtensa/esp32s3: Let a protected build boot from simple boot. 2026-08-11 23:49:21 +08:00
user-space.ld boards/xtensa/esp32s3: migrate to SPDX identifier 2024-11-12 22:20:59 +08:00