BUILD_PROTECTED defaults ESP32S3_APP_FORMAT_LEGACY to y, so a protected build
has always needed the ESP-IDF second-stage bootloader. Nothing about the
protected layout requires it: the kernel and user images are described
entirely by ESP32S3_KERNEL_OFFSET, ESP32S3_KERNEL_IMAGE_SIZE and
ESP32S3_KERNEL_RAM_SIZE, and esp32s3_userspace() maps the user image itself.
Three obstacles stood in the way.
Those three symbols were gated on ESP32S3_APP_FORMAT_LEGACY, but
protected_memory.ld needs all of them for KIROM, KDROM, UIROM, UDROM, KDRAM
and UDRAM. Without them the region lengths underflow to 2**64-1 and the
kernel/user RAM split lands nowhere, which the hardware reports as a DRAM0
PMS monitor violation once the first user process runs. The offset becomes
0x0 for simple boot, where the image is flashed at the start of the device.
protected_memory.ld had no case for a 32 MB part, so FLASH_SIZE was
undefined there and ROM, UIROM and UDROM underflowed the same way.
flat_memory.ld has had the case all along.
kernel-space.ld defined none of the symbols simple boot needs
(_image_irom_*, _image_drom_*, _bss_*), and kept none of the early code
resident. __start() runs bootloader_init() and map_rom_segments() before any
flash mapping exists, so everything they reach has to be in RAM -- including
map_rom_segments() itself, which unmaps the MMU it is running from, and
nuttx_enter_critical(), reached from rtc_clk_init() by way of regi2c. These
mirror what esp32s3_sections.ld already does for the flat build.
Verified on an ESP32-S3-WROOM-2 (32 MB octal flash), esp32s3-devkit:knsh with
FLASH_MODE_OCT: boots to NSH and runs ostest, where it reaches the same
timedmutex abort as every other target. The legacy path is untouched.
Assisted-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Signed-off-by: Marco Casaroli <marco.casaroli@gmail.com>
This commit updates the common-source integration for Xtensa-based
Espressif devices (ESP32, ESP32-S2, and ESP32-S3). This is part of a larger
common-source update split by architecture for better maintainability.
Major components updated:
- IRQ allocator refactoring with intr_alloc integration
- Common-source drivers (GPIO, RMT, I2C, SPI, UART, etc.)
- Espressif components upgrade to release/master.b-test
- Peripheral drivers (ADC, PWM, LEDC, MCPWM, PCNT, Temperature Sensor, etc.)
- Wireless adapters (Wi-Fi and BLE)
- esp_timer migration to the common-source path for Xtensa devices
- Common-source power management implementation (auto-sleep and wakeup paths)
- Board defconfigs for all Xtensa Espressif boards
- SMP support improvements for ESP32-S3
- Critical section handling improvements
Key architectural changes:
- IRQ Allocator: The new interrupt allocator enables multiple mapping
options from interrupt sources to CPU interrupts, providing flexibility
required by modern peripherals. Although this introduces breaking changes
to the interrupt handling API, the required ARCH_MINIMAL_VECTORTABLE
Kconfig option is explicitly checked during startup to ensure proper
configuration. This validation prevents runtime issues from configuration
mismatches.
- Xtensa-specific interrupt handling via esp_xtensa_intr.c providing
NuttX-native implementations of xt_ints_on/off and interrupt handlers,
avoiding conflicts with NuttX's core Xtensa macros.
- Timer/RTC unification: ESP32/ESP32-S2/ESP32-S3 move from chip-specific
RTC/RT-timer code to common-source Espressif integration, including
esp_timer_adapter/esp_rtc paths and the required bringup/defconfig updates.
- Power management consolidation: Xtensa PM follows the common-source
implementation, including common-source auto-sleep behavior, UART/Wi-Fi
wakeup coordination, and tickless-safe sleep flow compatibility.
Note: This is a large commit to maintain bisectability. Breaking the
changes into smaller commits would result in non-building intermediate
states across the common-source infrastructure update.
Tested configurations:
- All defconfigs were tested, including `ostest`.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
The sched_resumescheduler support was already removed in prior commits.
This change cleans up the now unused legacy source file.
Signed-off-by: chao an <anchao.archer@bytedance.com>
boot mode is configured
1. Explicitly define the .rtc_reserved section to ensure RTC data
that requires fixed address is correctly placed and does not
conflict with other sections
2. When legacy boot is configured, vecbase must also be set and
clear the BSS section
3. Cache must be disabled during Flash operations, so all
Flash-operation-related functions must be placed in IRAM
(internal RAM). Update the linker script for legacy boot mode
Signed-off-by: nuttxs <zhaoqing.zhang@sony.com>
This defconfig uses the legacy bootloader (based on ESP-IDF's
bootloader) and, due a recent update on SPI flash support, its
initialization was missing data to be moved to the IRAM during the
boot process.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
Updates the SPI Flash driver used for user storage MTD.
Moves ESP32 and ESP32S3 to use common driver.
Updates KConfig options to keep backwards compatibility.
Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
occurring during compilation and linking phase when the configuration
(CONFIG_ESP32S3_APP_FORMAT_LEGACY=y) is enabled.
---
undefined reference to _esp_system_init_fn_array_start
undefined reference to _esp_system_init_fn_array_end
undefined reference to __init_array_start
undefined reference to __init_array_end
---
Signed-off-by: nuttxs <zhaoqing.zhang@sony.com>
Adds SYS_STARTUP_FN which calls constructors and init functions on
common source code. Requires compatibility changes on linker script.
Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
Prior to this commit, it wasn't possible to load ELF modules from
the external PSRAM. There were two main issues about it: 1) copying
data using the instruction bus was being used instead of the data
bus (this, per si, isn't a problem, but requires special attention
regarding data alignment), and 2) the cache was not being properly
cleaned and flushed to properly access the loaded data using the
instruction bus.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
Modify rtc_data_seg to rtc_slow_seg to fix RTC problems.
The proper location for those is in RTC slow memory.
Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
This commit adds sections used by the debugger and disassembler to
get more information about raw data present in the code.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
This commit sets the coexiram (from libcoexist.a) sections on IRAM.
Before this commit, no other rules matched such sections and the
sections could be placed outside markers that denote the end of the
text sections, causing unexpected errors.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
This adds new fields to the metadata section used by MCUBoot.
The openocd-esp32 project requires these fields to properly map the
flash segments and enable using SW breakpoints and flash through
openocd-esp32.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
SPI flash operation modes - Dual Output (dout), Dual I/O (dio),
Quad Output (qout), Quad I/O (qio) and Octal (opi) were not being
properly selected. This commit fixes this behavior and the device
is now able to boot and initialize the proper SPI flash mode.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
This commit moves some internal libraries' .bss sections to the
external PSRAM chip, freeing internal memory for other usages. Note
that it is necessary to update `esp32s3-devkit:python` defconfig
otherwise it would fail to build.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
This commit allows placing .bss data into the external PSRAM.
Previously, the PSRAM was fully allocated to the heap memory only
and now part of it can be used to allocate .bss data freeing the
internal memory.
Update the wireless symbols from ESP32S3_* to ESPRESSIF_* for using common layer.
Remove ESP32S3 specific WiFi files and edit build system to use common layer.
Most tools used for compliance and SBOM generation use SPDX identifiers
This change brings us a step closer to an easy SBOM generation.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
To make it easier to keep the linker scripts updated for both
MCUboot and "simple-boot", this commit merges them into a single
linker script with macros to enable/disable specific sections.
This defconfig is an example of the recorded stack and it became
faulty recently after the implementation of the `up_current_regs`
functions. The `noinstrument_function` directive must be used for
preventing it from being looped when instrumentation is enabled.
Also, this commit places `sched/instrument/stack_record.c` in IRAM.
This commit ensures that RTC data is properly allocated in the RTC
segment in the linker. This fixes the reported problem about using
the legacy bootloader and RTC.
Update internal reference to get the most updated Espressif's
libraries. Those libraries are based on branch `release/v5.1` of
the ESP-IDF and include `v5.1.4` version of it.
Move and unify map_rom_segments function called when starting
Simple Boot and MCUboot compatible images.
Signed-off-by: Almir Okato <almir.okato@espressif.com>
The Simple Boot feature for Espressif chips is a method of booting
that doesn't depend on a 2nd stage bootloader. Its not the
intention to replace a 2nd stage bootloader such as MCUboot and
ESP-IDF bootloader, but to have a minimal and straight-forward way
of booting, and also simplify the building.
This commit also removes deprecated code and makes this bootloader
configuration as default for esp32s2 targets and removes the need
for running 'make bootloader' command for it.
Signed-off-by: Almir Okato <almir.okato@espressif.com>
The Simple Boot feature for Espressif chips is a method of booting
that doesn't depend on a 2nd stage bootloader. Its not the
intention to replace a 2nd stage bootloader such as MCUboot and
ESP-IDF bootloader, but to have a minimal and straight-forward way
of booting, and also simplify the building.
This commit also removes deprecated code and makes this bootloader
configuration as default for esp32s3 targets and removes the need
for running 'make bootloader' command for it.
Other related fix, but not directly to Simple Boot:
- Instrumentation is required to run from IRAM to support it during
initialization. `is_eco0` function also needs to run from IRAM.
- `rtc.data` section placement was fixed.
- Provide arch-defined interfaces for efuses, in order to decouple
board config level from arch-defined values.
Signed-off-by: Almir Okato <almir.okato@espressif.com>
During PSRAM initialization and flash operations, the Cache needs to be disabled.
So all data and code for the aforementioned scope is required to be placed in Internal RAM.
After https://github.com/apache/nuttx/pull/11007/ was merged, the
path for some files changed, requiring the linker to be fixed to
make it run from the internal memory once again.
This commit sets the BLE's interrupt as a IRAM-enabled interrupt,
which enables it to run during a SPI flash operation. This enables
us to create a cache to off-load semaphores and message queues
operations and treat them when the SPI flash operation is finished.
By doing that, we avoid packet losses during a SPI flash operation.
This commit provides an interface to register ISRs that run from
IRAM and keeps track of the non-IRAM interrupts. It enables, for
instance, to avoid disabling all the interrupts during a SPI flash
operation: IRAM-enabled ISRs are, then, able to run during these
operations.
- Added Wi-Fi related symbols to the kernel-space linker;
- Allocate more RAM to the kernel (to be useb by the Wi-Fi driver).
- Create a specific defconfig.
Instead of setting kernel/user space instruction and data ROM as
hard-coded values on linker, set them according to the max size
of the kernel image set by CONFIG_ESP32S3_KERNEL_IMAGE_SIZE. This
is done by making KIROM, UIROM, KDROM and UDROM dependent on the
kernel size value. Also, override CONFIG_NUTTX_USERSPACE config
according to CONFIG_ESP32S3_KERNEL_IMAGE_SIZE by using a custom
PREBUILD definition.
