Commit graph

2014 commits

Author SHA1 Message Date
Eren Terzioglu
90147a72c2 arch/xtensa/espressif: Fix SHA errors
Fix SHA errors for esp32[-s2|-s3]

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2026-02-24 12:57:46 +01:00
Vlad Pruteanu
4775f5ba21 xtensa/esp32: Fix HMAC-SHA when a long key is used
When using a key that is longer than the block size of the hashing
algorithm used, the key must be hashed before it is used.

Signed-off-by: Vlad Pruteanu <pruteanuvlad1611@yahoo.com>
2026-02-24 08:32:19 -03:00
Filipe Cavalcanti
293d33f5dd arch/xtensa/esp32: select I2C_DRIVER on I2C
Automatically select I2C_DRIVER when ESP32_I2C is selected.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2026-02-20 14:56:54 +01:00
SPRESENSE
72b67832ea Makefile: Remove make depend files by make distclean
Intermediate files of make depend like .ddc and .dds may remain
when make is interrupted. Remove them using make distclean.

Signed-off-by: SPRESENSE <41312067+SPRESENSE@users.noreply.github.com>
2026-02-16 16:27:57 +01:00
wangzhi16
a2e8a5464e arch/xtensa: replace critical_section with spinlock.
The benefits of doing this are:

1. It makes the code logic clearer, with different resources protected by different locks.

2. It improves system responsiveness and avoids contention issues caused by acquiring the same large lock.

Signed-off-by: wangzhi16 <wangzhi16@xiaomi.com>
2026-02-02 21:17:20 +08:00
zhanghongyu
a7567677a8 netdev_driver: add carrier_on to xxx_ifup where carrier_on is absent
since the judgment for network card selection was changed from IS_UP to
IS_RUNNING, drivers that lack carrier_on need to add the carrier_on
operation; otherwise, network access issues will occur.

Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
2026-02-02 13:23:05 +08:00
Adwait Godbole
5c43ef4eaf arch: xtensa: fix INT32_C macro to match int32_t type
INT32_C(x) is currently defined as x ## ll on Xtensa, which
produces a long long int constant. However, int32_t is
defined as long int on this architecture.

This mismatch can break C++ template overload resolution
and causes build failures in downstream projects such as PX4.

Fix the macro by using x ## l so INT32_C expands to the same
underlying type as int32_t.

Signed-off-by: Adwait Godbole <adwaitngodbole@gmail.com>
2026-02-02 10:47:55 +08:00
nope
f375093a25 arch/esp32s3/spi: make sure spi don't send wrong bytes when dma is enabled
SPI transmits incorrect bytes when DMA is enabled and `txbuffer` of
`esp32s3_spi_dma_exchange()` is NULL, causing mounted FAT32 SD cards
to fail with -ENODEV during read operations.

Signed-off-by: liu <liu334275@gmail.com>
2026-01-31 02:50:52 +08:00
wangzhi16
364a633ec3 sched/signal: Optimize code logic
Adjust the up_schedule_sigaction function to facilitate subsequent spinlock optimization work.

Signed-off-by: wangzhi16 <wangzhi16@xiaomi.com>
2026-01-27 21:24:31 +08:00
nuttxs
fa2d2b8898 boards/xtensa: fixes for compilation and start-up issues when legacy
boot mode is configured

1. Explicitly define the .rtc_reserved section to ensure RTC data
that requires fixed address is correctly placed and does not
conflict with other sections
2. When legacy boot is configured, vecbase must also be set and
clear the BSS section
3. Cache must be disabled during Flash operations, so all
Flash-operation-related functions must be placed in IRAM
(internal RAM). Update the linker script for legacy boot mode

Signed-off-by: nuttxs <zhaoqing.zhang@sony.com>
2026-01-26 19:22:14 -03:00
Eren Terzioglu
2dbdcd603f arch/xtensa: Fix esp32s2 SPI errors
Fix esp32s2 SPI DMA and SPI3 errors

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2026-01-27 03:09:34 +08:00
trns1997
9159f6e353 build/cmake: Add toolchain C++ library linking for all platforms.
Extend CONFIG_LIBCXXTOOLCHAIN support to all remaining platforms
in CMake builds by explicitly locating and linking libstdc++.a
from the toolchain. This prevents build failures caused by STL
header/library mismatches where toolchain headers are included
without the corresponding library.
* Adds nuttx_find_toolchain_lib() calls for all platforms.
* Aligns CMake behavior with Make build system.

Signed-off-by: trns1997 <trns1997@gmail.com>
2026-01-24 19:30:21 +08:00
chenxiaoyi
dbbcd7c88c arch/xtensa: remove the use of XCHAL_SYSCALL_LEVEL
After PR#14672, there is no use of XCHAL_SYSCALL_LEVEL.

Signed-off-by: chenxiaoyi <chenxiaoyi@xiaomi.com>
2026-01-23 10:52:43 +08:00
chenxiaoyi
775c95a599 arch/xtensa: delete XCHAL_SYSCALL_LEVEL macro definition
After PR#14672, there is no use of XCHAL_SYSCALL_LEVEL.

Signed-off-by: chenxiaoyi <chenxiaoyi@xiaomi.com>
2026-01-23 10:52:43 +08:00
hujun5
a3273e6a96 arch: Add stack alignment and stack size checking when CONFIG_TLS_ALIGNED=y
Add validation to ensure allocated stack size does not exceed TLS_MAXSTACK when
CONFIG_TLS_ALIGNED is enabled, and verify proper stack alignment using STACK_ALIGN_MASK
across all architectures. This improves stack safety and prevents potential TLS overflow conditions.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-22 22:18:11 +08:00
hujun5
6f03601169 arch: rename STACK_ALIGNMENT to STACKFRAME_ALIGN across all architectures
Rename STACK_ALIGNMENT macro to STACKFRAME_ALIGN throughout the codebase
to provide clearer naming semantics. The new name better reflects the macro's
purpose of frame alignment rather than general stack alignment.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-22 15:37:24 +08:00
hujun5
63e59e26c0 arch: move some macros to public code.
Move stack alignment and kernel stack macros from architecture-specific internal
headers to public include/nuttx/irq.h. Consolidates duplicate definitions across
17 architecture families, reducing code duplication while enabling common code
to access these core alignment utilities without architecture dependencies.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-20 01:53:08 +08:00
hujun5
8bb250a4c0 arch: move STACK_ALIGNMENT to irq.h
Move STACK_ALIGNMENT macro definitions from architecture-specific internal
headers to public irq.h headers. This enables common code to directly access
STACK_ALIGNMENT without requiring internal header inclusion, improving code
organization and reducing header dependencies. Applies to all architectures:
ARM, ARM64, AVR, HC, MIPS, or1k, Renesas, RISC-V, SIM, SPARC, TriCore, x86,
x86_64, Xtensa, Z16, and Z80.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-19 14:43:43 +08:00
wangchengdong
1b8d8f7565 arch/xtensa: Add support to disable signals actions related data struct
Add support to disable signals actions related struct

Co-authored-by: guoshichao <guoshichao@xiaomi.com>
Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
2026-01-18 08:24:13 -03:00
hujun5
657ac8317e arch: fix addrenv_switch changing this_task causing exceptions
After addrenv_switch(), the current running task (this_task) may change due to
deferred work execution. Update all architecture interrupt, syscall, and exit
handlers to re-fetch tcb = this_task() after addrenv_switch(). Ensures scheduler
and context operations use the correct TCB, preventing context corruption and
exceptions across SMP and memory-protected builds.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-17 18:23:06 -03:00
ligd
113bb02568 checkstack: fix access overflow when checkstack
We should check length first, and then check the value

Signed-off-by: ligd <liguiding1@xiaomi.com>
2026-01-17 18:04:28 -03:00
wangchengdong
15f6e399b8 nuttx/arch: merge tickless and tick process
merge nxsched_timer_expiration() into nxsched_process_timer()
    to improve code efficient

Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
2026-01-12 16:20:42 +08:00
simbit18
bfa7025c28 arch/xtensa: Fix Kconfig style
- Replace help => ---help---

- Remove TAB

- Add comments

Signed-off-by: simbit18 <simbit18@gmail.com>
2026-01-06 06:35:08 +08:00
rongyichang
3a0ab84855 xtensa/esp32s3: fix dcache flush error in up_flush_dcache
The items is not used in up_flush_dcache, and we should use it in
function cache_invalidate_dcache_items.

Signed-off-by: rongyichang <rongyichang@xiaommi.com>
2026-01-01 07:26:25 -03:00
anjiahao
0a2b01950c sched:use tcb_s inside of task_tcb_s , remove all cast
Simplify the code and remove different tcb

Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2025-12-22 17:55:45 +08:00
Alan Carvalho de Assis
30a7420349 boards/esp32: Add initial support to heltec_wifi_lora32
This commit adds basic/initial support to Heltec WiFi LoRa32 board.

Signed-off-by: Alan C. Assis <acassis@gmail.com>
2025-12-21 15:18:08 -03:00
Alan Carvalho de Assis
3bf8b55d64 arch/xtensa/esp32: Add CONFIG_ESP32_IGNORE_CHIP_REVISION_CHECK
This commit add the option that was missing in the esp32_start.c
to ignore the chip version for boards with old ESP32 silicon tape out.

Signed-off-by: Alan C. Assis <acassis@gmail.com>
2025-12-21 15:18:08 -03:00
zhanghongyu
aa8ffea3cf netdev_upperhalf: convert Kconfig to variable
Upperhalf supports multiple working modes at the same time,
which is specified by NIC when register

Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
2025-12-14 10:01:22 +08:00
Filipe Cavalcanti
49d6177c68 espressif: automate build system for flash enc
Modifies Kconfig and build tools to support flash encryption
and E-Fuse burning when flash encryption is enabled.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-12-11 11:29:26 +01:00
Filipe Cavalcanti
8f42a6f6d7 arch/xtensa: add critical section on e-fuse bringup
The efuse initialization requires critical section to avoid a very
hidden corner case when flash encryption is enabled.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-12-11 11:29:26 +01:00
Filipe Cavalcanti
151776f0a5 arch/xtensa: change .bss clear location on start
Moves the clearing of global variables to the very start
of the chip start up process. This avoids clearing some
globals that are initialized between the new location and
previous location.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-12-11 11:29:26 +01:00
Filipe Cavalcanti
3a74b82e09 arch/xtensa: flash encryption support for ESP32|S2|S3
Deprecates ESP32_STORAGE_MTD_ENCRYPT and ESP32_OTA_PARTITION_ENCRYPT options.
Add ESPRESSIF_SECURE_FLASH_ENC_ENABLED Kconfig option.
Updates SPI Flash driver to handle encryption automatically.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-12-11 11:29:26 +01:00
Yanfeng Liu
c38042941f arch/crt0.c: revert entry _start
This reverts crt0.c entry name to _start to fix LTO issue/17443,
needs apps/ side pull/3235.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2025-12-10 19:06:04 +08:00
Filipe Cavalcanti
027bc43df7 arch/xtensa/espressif: add PWM capture getedges function
Create esp_capture_getedges function which was missing from
the capture API.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-12-03 13:44:25 +08:00
Eren Terzioglu
6b53141c9e arch/xtensa/esp32[-s2|-s3]: Refactor PM support
Refactor PM modes for Xtensa based Espressif devices

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-12-02 02:37:06 +08:00
Vlad Pruteanu
70455f1890 xtensa/esp32: Add support for hardware accelerated HMAC-SHA
This add support for using the cryptographic accelerator
within the ESP32 for HMAC-SHA operations. The supported
algorithms are: SHA1 and SHA512.

Signed-off-by: Vlad Pruteanu <pruteanuvlad1611@yahoo.com>
2025-11-27 03:38:09 +08:00
v-tangmeng
a221df7175 arch/xtensa/esp32[-s2|-s3]: add USE_NXTMPDIR_ESP_REPO_DIRECTLY
Directly downloading the Git repository is inconvenient for local debugging.
This will allow to automatically download external packages from the Internet.
If not set, the repo need to be download will need to provide them manually,
otherwise an error will occur and the build will be aborted.

Add `USE_NXTMPDIR_ESP_REPO_DIRECTLY`, with this we can use
`USE_NXTMPDIR_ESP_REPO_DIRECTLY=y make` which can directly use esp-hal-3rdparty
under nxtmpdir without CLONE, CHECK_COMMITSHA, reset, checkout and update. Just
`cp -rf nxtmpdir/esp-hal-3rdparty chip/$(ESP_HAL_3RDPARTY_REPO)`.

Signed-off-by: v-tangmeng <v-tangmeng@xiaomi.com>
2025-11-18 21:46:50 +08:00
ouyangxiangzhen
fc28b93224 timers/oneshot: Remove all callback and args.
This commit remove all callback and args in the APIs.

Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
2025-11-18 13:02:29 +01:00
ouyangxiangzhen
5c113f79b7 timers/oneshot: Remove all private callback.
This commit removed all private callback and handle it on the upperhalf
of oneshot.

Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
2025-11-18 13:02:29 +01:00
wangchengdong
c342c0851f xtensa/esp32s2: Replace spinlock/sched_lock with spin_lock_irqsave_nopreempt
Replace the spinlock/sched_lock pair in xtensa/esp32s2 with
    spin_lock_irqsave_nopreempt() to improve code clarity and consistency.

Signed-off-by: Chengdong Wang wangchengdong@lixiang.com
2025-11-04 22:46:15 +08:00
wangchengdong
97b24a1a0b xtensa/esp32: Replace spinlock/sched_lock with spin_lock_irqsave_nopreempt
Replace the spinlock/sched_lock pair in xtensa/esp32 with
    spin_lock_irqsave_nopreempt() to improve code clarity and consistency.

Signed-off-by: Chengdong Wang wangchengdong@lixiang.com
2025-11-04 22:46:15 +08:00
Filipe Cavalcanti
680766d304 arch/xtensa: update SPI Flash driver for ESP32-S2|S3
Updates the SPI Flash driver used for user storage MTD.
Moves ESP32 and ESP32S3 to use common driver.
Updates KConfig options to keep backwards compatibility.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-10-29 09:44:55 -04:00
Vlad Pruteanu
8a10e35c0b arch/xtensa/esp32: Fix support for hardware accelerated AES
Curently, the driver code for HW accelerated AES is not usable
since it's not registered within esp32_crypto. This commit fixes
it as well as a few bugs.

Signed-off-by: Vlad Pruteanu <pruteanuvlad1611@yahoo.com>
2025-10-24 11:20:04 -03:00
Eren Terzioglu
a590599c7e arch/xtensa/esp32[-s3]: Add ULP RISCV coprocessor wakeup
Add ULP RISCV coprocessor wakeup support for esp32s3

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-10-24 11:16:11 +08:00
Eren Terzioglu
734068890a arch/xtensa/esp32[-|-s3]: Fix exception issue when pm active
Fix exception issue when PM and DEBUG_ASSERTIONS enabled for esp32 and esp32s3.
This error happens due to PM system workflow, when system gets into sleep-modes with
removing PM_NORMAL count, system is raising an exception for not having
enough number of PM_NORMAL state count if DEBUG_ASSERTIONS enabled.

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-10-23 09:38:26 -04:00
Eren Terzioglu
24eeff91c0 arch/xtensa/esp32[-s2|-s3]: Add multiple ULP RISC-V bin support
Add multiple ULP RISC-V bin support for esp32s2 and esp32s3

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-10-21 06:32:32 -03:00
Thiago Finelon
42d5f10c0d arch/xtensa/esp32s3: expose UART RX FIFO controls
Adds Kconfig knobs for the ESP32-S3 RX FIFO full threshold and timeout and wires them into the UART driver.
Clears RX FIFO overflow interrupts by resetting the hardware FIFO so reception resumes cleanly.

Signed-off-by: Thiago Finelon <thiago.sfinelon@gmail.com>
2025-10-17 17:40:32 +08:00
chao an
87f134cfaa sched/sleep: replace all Signal-based sleep implement to Scheduled sleep
Nuttx currently has 2 types of sleep interfaces:

1. Signal-scheduled sleep: nxsig_sleep() / nxsig_usleep() / nxsig_nanosleep()
Weaknesses:
a. Signal-dependent: The signal-scheduled sleep method is bound to the signal framework, while some driver sleep operations do not depend on signals.
b. Timespec conversion: Signal-scheduled sleep involves timespec conversion, which has a significant impact on performance.

2. Busy sleep: up_mdelay() / up_udelay()
Weaknesses:
a. Does not actively trigger scheduling, occupy the CPU loading.

3. New interfaces: Scheduled sleep: nxsched_sleep() / nxsched_usleep() / nxsched_msleep() / nxsched_ticksleep()
Strengths:
a. Does not depend on the signal framework.
b. Tick-based, without additional computational overhead.

Currently, the Nuttx driver framework extensively uses nxsig_* interfaces. However, the driver does not need to rely on signals or timespec conversion.
Therefore, a new set of APIs is added to reduce dependencies on other modules.

(This PR also aims to make signals optional, further reducing the code size of Nuttx.)

Signed-off-by: chao an <anchao.archer@bytedance.com>
2025-10-17 14:05:02 +08:00
Filipe Cavalcanti
7297ecc02e arch/xtensa: add non-iram interrupt support for ESP32-S2
Adds support for enabling and disabling non-iram interrupts on ESP32-S2.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-10-16 17:06:05 -04:00
Filipe Cavalcanti
df6e5384fe arch/xtensa: update MCUBoot and virtual E-Fuse offset
Updates MCUBoot version and default address for virtual E-Fuse, depending
if MCUBoot is enabled.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-10-14 17:44:15 +08:00