Commit graph

24290 commits

Author SHA1 Message Date
Bartosz Wawrzynek
64d2b822f8 arch/arm/src/nrf: Remove return status from void functions
Remove return status from void tickless_rtc functions in nrf52, nrf53,
and nrf91 boards. Also add missing newline at end of nrf91_modem_os.c.

Signed-off-by: Bartosz <bartol2205@gmail.com>
2026-01-22 22:07:53 +08:00
pangzhen1
f766dc6c08 arch/arm: Add arm memmanage fault skip operation
In some scenarios (e.g. testing, debugging, etc.) where we want to trigger a memmanage fault without panic the system, we can use this Memory Management Fault skip operation.

Signed-off-by: pangzhen1 <pangzhen1@xiaomi.com>
2026-01-22 19:43:22 +08:00
pangzhen1
14efe537bd arch/tricore: add tricore mpu driver
tricore mpu driver code

Signed-off-by: pangzhen1 <pangzhen1@xiaomi.com>
2026-01-22 16:45:58 +08:00
hujun5
b0cb4e5968 arm64: add MPU-based address environment support and refactor MMU variant
Rename arm64_addrenv.c to arm64_addrenv_mmu.c to separate MMU-specific logic.
Add new arm64_addrenv_mpu.c with stub implementations of address environment
functions for MPU-based systems. Enable address environment support in FVP ARMv8-R
Kconfig to support kernel stacks in protected mode. Conditionally build MPU or
MMU address environment code based on CONFIG_ARCH_USE_MMU/CONFIG_ARCH_USE_MPU.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-22 15:39:34 +08:00
hujun5
14e5d8a995 arm64: fix mpu_freeregion
The limit register contains the enable/disable bit for the MPU region,
so it must be written first before writing the base register to ensure
proper region disable operation.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-22 15:39:00 +08:00
hujun5
6f03601169 arch: rename STACK_ALIGNMENT to STACKFRAME_ALIGN across all architectures
Rename STACK_ALIGNMENT macro to STACKFRAME_ALIGN throughout the codebase
to provide clearer naming semantics. The new name better reflects the macro's
purpose of frame alignment rather than general stack alignment.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-22 15:37:24 +08:00
Jean THOMAS
6581e312f5 stm32: disable UART up_putc when semihosting
Do not compile up_putc functions in stm32_serial.c to avoid conflicts
with implementation from arm_semi_syslog.c when semihosting is enabled.

Signed-off-by: Jean THOMAS <jean@lambdaconcept.com>
2026-01-22 03:49:05 +08:00
fangxinyong
ef6278b0ff arch/arm: armv8-r irq type-safe bit ops
Use 1u/~1u constants for TPIDRPRW bit operations.
Avoid implicit conversion to a different underlying type (MISRA Rule 10.3).
No functional change to task pointer tagging logic.

Signed-off-by: fangxinyong <fangxinyong@xiaomi.com>
2026-01-21 20:31:35 +08:00
yukangzhi
3448e84a4c arch/arm: armv8-r PL at startup needs to be checked
When the system startup from the PL1 SYS mode, the initialization
of the PL2 HYP register needs to be skipped. Put the Hypervisor
initialization code together and skip it all at once.

Signed-off-by: yukangzhi <yukangzhi@xiaomi.com>
2026-01-21 19:21:43 +08:00
hujun5
f6f8acafbb arch: fix cmake error
Add default values (0x0) for ARCH_TEXT_VBASE, ARCH_DATA_VBASE, and
ARCH_HEAP_VBASE to resolve cmake configuration warnings when these
values are not explicitly set during initialization.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-21 14:38:36 +08:00
hujun5
e604bacd42 sim: it is not necessary to call restore_critical_section in irq
Remove restore_critical_section() call from up_switch_context() in simulator
as it is not necessary during interrupt context switching. The critical
section state is properly managed elsewhere in the interrupt handling flow.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-20 12:22:18 -03:00
hujun5
7ee3890e7a x64_64: it is not necessary to call restore_critical_section in irq
Remove restore_critical_section() call from common_handler() in x86_64 interrupt
processing as it is not necessary during interrupt handling. The critical section
state is properly managed by the interrupt framework elsewhere.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-20 11:49:39 -03:00
liwenxiang1
2645e06c86 arch/x86_64: Add gprof
add gprof tool

Signed-off-by: liwenxiang1 <liwenxiang1@xiaomi.com>
2026-01-20 22:43:38 +08:00
liwenxiang1
b1373857b7 arch/x86_64: Resolve the issue of abnormal stack check display.
Resolve the issue of abnormal stack check display

Signed-off-by: liwenxiang1 <liwenxiang1@xiaomi.com>
2026-01-20 22:43:38 +08:00
liwenxiang1
0046070395 arch/x86_64:Add runtime stack size analysis
Add runtime stack size analysis tool

Signed-off-by: liwenxiang1 <liwenxiang1@xiaomi.com>
2026-01-20 22:43:38 +08:00
liwenxiang1
79b82da476 arch/x86_64: Add stack usage
add stack usage tool

Signed-off-by: liwenxiang1 <liwenxiang1@xiaomi.com>
2026-01-20 22:43:38 +08:00
liwenxiang1
bd2cce7f1a arch/x64: fix revoke_low_memory
the virtual address of the page table (PT) is saved into the page directory (PD) entry, but the PD entry should store the physical address instead

Signed-off-by: liwenxiang1 <liwenxiang1@xiaomi.com>
2026-01-20 17:15:50 +08:00
liwenxiang1
46c319d948 arch/x64: Solve the sig_nest hang issue
When an interrupt occurs, the hardware automatically pushes the current RIP/RSP onto the interrupt stack. During the interrupt return, the iretq instruction pops them back. The problem is that the RIP/RSP modified by the signal is stored in the XCP context, whereas iretq operates on the interrupt stack. As a result, the RIP/RSP modified by the signal does not take effect in the iretq instruction, causing the task receiving the signal to fail to jump correctly to the signal handler. This behavior appears as if the signal is lost

Signed-off-by: liwenxiang1 <liwenxiang1@xiaomi.com>
2026-01-20 06:53:04 +08:00
liwenxiang1
41da7121bd arch/x64: interrupt add CFI info
interrupt add CFI info

Signed-off-by: liwenxiang1 <liwenxiang1@xiaomi.com>
2026-01-20 06:52:00 +08:00
hujun5
63e59e26c0 arch: move some macros to public code.
Move stack alignment and kernel stack macros from architecture-specific internal
headers to public include/nuttx/irq.h. Consolidates duplicate definitions across
17 architecture families, reducing code duplication while enabling common code
to access these core alignment utilities without architecture dependencies.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-20 01:53:08 +08:00
daichuan
b01f8b04e9 netdev: delete macro CONFIG_NETDEV_CHECKSUM with nuttx
not need CONFIG_NETDEV_CHECKSUM with nuttx

Signed-off-by: daichuan <daichuan@xiaomi.com>
2026-01-19 23:22:46 +08:00
daichuan
99bf7c3c5f net: skip TCP/UDP pseudo-header checksum with hardware offload
When supporting hardware checksum offloading, the network protocol stack
does not perform TCP/UDP pseudo-header checksum calculation.

Skip TCP/UDP pseudo header checksum calculation in network protocol stack

Signed-off-by: daichuan <daichuan@xiaomi.com>
2026-01-19 23:22:46 +08:00
zhangshuai39
1c2d1c579f simwifi: Fix compilation warning
Added the `<nuttx/kmalloc.h>` header file and fixed the implicit conversion issue.

Signed-off-by: zhangshuai39 <zhangshuai39@xiaomi.com>
2026-01-19 12:14:18 -03:00
raiden00pl
f19b28d3d2 arch/x86_64/x86_64_acpi_procfs.c: fix build warnings
fix warnings:

CC:  intel64/intel64_schedulesigaction.c common/x86_64_acpi_procfs.c:121:3: warning: excess elements in struct initializer
  121 |   0444
      |   ^~~~
common/x86_64_acpi_procfs.c:121:3: note: (near initialization for ‘g_acpi_procfs’)
common/x86_64_acpi_procfs.c:129:3: warning: excess elements in struct initializer
  129 |   0
      |   ^
common/x86_64_acpi_procfs.c:129:3: note: (near initialization for ‘g_acpi_file_procfs’)

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-01-19 14:46:34 +01:00
liwenxiang1
681bfa6b54 arch/x64:add up_set_irq_type
add up_set_irq_type interface

Signed-off-by: liwenxiang1 <liwenxiang1@xiaomi.com>
2026-01-19 19:09:52 +08:00
zhangyu117
9685403038 arch/tricore: modify gpsr init process
for some chips like tc4xx there also corecs, so need init it too.

Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
2026-01-19 17:51:48 +08:00
zhangyuan29
4775d6dceb arch/tricore: support up_trigger_irq
Enable gpsr and use gpsr to support multicore irq trigger.

Signed-off-by: zhangyuan29 <zhangyuan29@xiaomi.com>
2026-01-19 17:51:48 +08:00
zhangyuan29
f44060ca9f arch/tricore: support minimal vectortalbe in tricore
The SRN number in TriCore far exceeds the PN number.
Using IRQ as the PN number would result in an overflow.
Therefore, MINIMAL_VECTORTABLE is used to ensure that
the PN number does not overflow.

Signed-off-by: zhangyuan29 <zhangyuan29@xiaomi.com>
2026-01-19 17:51:48 +08:00
xuxin19
df6505567c elf(bugfix):fix elf compile link error when enable LTO
fix compilation errors when enabling the LTO linker

Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2026-01-19 14:45:37 +08:00
xuxin19
00e79122af cmake(enhance):cmake support DYNLIB build
add `DYNLIB` option for nuttx_add_application for dynamic loadable lib

Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2026-01-19 14:45:37 +08:00
xuxin19
a7c6f589f9 cmake(bugfix):fix sim loadable elf build support
1.add sanity check for START_OBJS
2.make laodable -e entry setting in each arch elf.cmake
3.add sim elf.cmake

Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2026-01-19 14:45:37 +08:00
xuxin19
f589a02e3e cmake(bugfix):add x86_64 arch cmake loadable mod support
supplementing the implementation of loadable construction for x86

Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2026-01-19 14:45:37 +08:00
xuxin19
63dc48e713 cmake kernel build(bugfix): remove unused section in elf link
this will reduce the size of elf

Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2026-01-19 14:45:37 +08:00
xuxin19
6fa3031d9b cmake(feat):define elf option and enable apps module build
1.define elf option setting function ext;
2.unify loadable elf and kernel elf build config

Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2026-01-19 14:45:37 +08:00
xuxin19
b7582b8da1 cmake(feat):implements KERNEL mode in CMake build
1.add application link dependencies for all elf
2.add a global custom target to hold proptry in the toolchain file
3.add startup obj target
4.fix cpp lds error with kernel mod link elf lds

usage:
./build.sh qemu-armv7a:knsh --cmake
elf install in ${CMAKE_BINARY_DIR}/bin

Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2026-01-19 14:45:37 +08:00
hujun5
8bb250a4c0 arch: move STACK_ALIGNMENT to irq.h
Move STACK_ALIGNMENT macro definitions from architecture-specific internal
headers to public irq.h headers. This enables common code to directly access
STACK_ALIGNMENT without requiring internal header inclusion, improving code
organization and reducing header dependencies. Applies to all architectures:
ARM, ARM64, AVR, HC, MIPS, or1k, Renesas, RISC-V, SIM, SPARC, TriCore, x86,
x86_64, Xtensa, Z16, and Z80.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-19 14:43:43 +08:00
wangmingrong1
d757fe06f1 arm64/toolchain: fix compile warnning
Configuration/Tool: qemu-armv8a/mte
5282026-01-16 13:11:30
529------------------------------------------------------------------------------------
530  Cleaning...
531  Configuring...
532  Building NuttX...
533Makefile:142: target 'arm64_hwdebug.o' given more than once in the same rule
534Makefile:142: target 'arm64_hwdebug.o' given more than once in the same rule
535Makefile:142: target 'arm64_hwdebug.o' given more than once in the same rule
536Makefile:142: target 'arm64_hwdebug.o' given more than once in the same rule
537Makefile:142: target 'arm64_hwdebug.o' given more than once in the same rule
538

Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2026-01-19 14:27:02 +08:00
Bowen Wang
e686a3ac42 mm/mm_heap: use struct mm_heap_config_s to init the memory heap
To avoid add new parameters to the mm_initialize_heap() and
mm_initialize_pool()

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2026-01-19 14:18:27 +08:00
anjiahao
6ed4ea63d8 mm: support mm_initialize_heap to specify a specific heap pointer
Support user pass it own heap struct to the mm_initialize_heap() to
avoid the heap struct is reserved from the heap range

Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2026-01-19 14:18:27 +08:00
Bowen Wang
0bc9f94304 sim/sim_rptun: modify sim_rptun to port new rptun framework
1. Use reserved[0] filed in struct fw_rsc_vdev and the driver
master/slave to judge the device role;
2. Use struct fw_rsc_carveout in resource table to provide the
share memory to virtio driver side;

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
Signed-off-by: Yongrong Wang <wangyongrong@xiaomi.com>
2026-01-19 14:18:27 +08:00
Bowen Wang
47b6c1f2a9 sim/sim_rptun: use host_kill() to kill proxy core when stop proxy
To avoid hang in the host_waitpid() in sim_rptun_stop()

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2026-01-19 14:18:27 +08:00
Bowen Wang
906299df21 sim/posix: add host_kill API to kill other thread
sim rptun need use this api to kill the proxy core

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2026-01-19 14:18:27 +08:00
Yongrong Wang
911ab7c55b drivers/rptun and rpmsg_virtio: remove cmd initialize
don't need initialize in sim

Signed-off-by: Yongrong Wang <wangyongrong@xiaomi.com>
2026-01-19 14:18:27 +08:00
wangzhi16
8c8e837230 arch/*_rptun.c: port all the chip's rptun driver to new rptun framework
New rptun framework need provide the carveout device to provide
the share memmory.

And need add the cpuname feature for rpmsg virtio device to let
rpmsg virtio can know remote cpuname.

Signed-off-by: wangzhi16 <wangzhi16@xiaomi.com>
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2026-01-19 14:18:27 +08:00
makejian
38ba0abc49 arch/tricore: support cache function
Add cache operation support for TriCore architecture including:
- Instruction cache (I-Cache) enable/disable functionality
- Data cache (D-Cache) enable/disable functionality
- Cache configuration and management interfaces
- Performance events integration with cache operations

Signed-off-by: makejian <makejian@xiaomi.com>
Signed-off-by: zhangyuan29 <zhangyuan29@xiaomi.com>
2026-01-19 14:13:27 +08:00
ouyangxiangzhen
1502e6da15 arch/intel64: Fix coverity.
This commit fixed mulitply-overflow in frequency calculation.

Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
2026-01-19 14:12:09 +08:00
liwenxiang1
e074c865bc arch/x86_64: add poweroff functionality
add poweroff feature

Signed-off-by: liwenxiang1 <liwenxiang1@xiaomi.com>
2026-01-19 14:10:12 +08:00
liwenxiang1
c774939c9e arch/x64: add acpi procfs
add acpi procfs function

Signed-off-by: liwenxiang1 <liwenxiang1@xiaomi.com>

arch/x64:Fix the issue of dereferencing before null check

Signed-off-by: liwenxiang1 <liwenxiang1@xiaomi.com>
2026-01-19 14:10:12 +08:00
liwenxiang1
89eddf6396 arch/x64: create qemu chip
Create QEMU chip and rename intel64 directory to qemu

Signed-off-by: liwenxiang1 <liwenxiang1@xiaomi.com>
2026-01-19 10:46:09 +08:00
hujun5
a640dd49d2 armv7-a/arm_addrenv_pgmap.c: add up_addrenv_find_page and up_addrenv_user_vaddr
Add two new address environment utility functions in arm_addrenv_pgmap.c:
- up_addrenv_find_page(): Find physical page mapped to user virtual address
  from address environment page directory (stub implementation for future use)
- up_addrenv_user_vaddr(): Check if virtual address is in user space by calling
  arm_uservaddr(). Enables common code to query user address space boundaries
  on ARMv7-A architecture.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-18 23:06:13 +08:00