/usr/bin/ld: nuttx.rel: relocation R_X86_64_32S against `.rodata' can not be used when making a PIE object; recompile with -fPIE
/usr/bin/ld: failed to set dynamic section sizes: bad value
Signed-off-by: cuiziwei <cuiziwei@xiaomi.com>
This commit adds register definitions for advanced, basic, and general purpose timers. Formatting convention was taken from the H7 hardware timer header.
These files were copied from a config of pico-sdk 2.0.0.
They provide struct address mapped access to peripherals, along
with register definitions. It also provides some compiler helpers
that are partially used by the port.
Hardware initialization is based refcount, not
spi enable bit and add interface to unitialize bus
Signed-off-by: Jouni Ukkonen <jouni.ukkonen@unikie.com>
Add function description for function prototype of `riscv_jump_to_user`
to make it easier to read, and fix some inconsistent comment style in
`riscv_internal.h`.
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
Both RX and TX interrupts can be enabled after the setup of the transfer; the TX interrupt
must be enabled after queuing the first byte as done before. It is not possible to miss the
RX interrupts, as it pends as long as the byte gets read from the FIFO
When starting the TX, the first byte can be queued instantly, it won't be sent out to the
bus if there is NACK to the address. This also prevents spurious TX interrupts in error
cases, since the TX queue is not empty after initiating a transfer.
In some error cases controller sends STOP by itself even if AUTOSTOP is disabled.
It is better to tell the controller to ABORT, which will also generate STOP only when needed.
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
Adds ADC support with minimal feature set (no DMA or Timers etc). A new nucleo-h563zi configuration was added to
provide easy testing with the adc example NSH addon.
Fix Kconfig spacing to tabs
chip/efm32_start.c:150:3: warning: implicit declaration of function 'itm_syslog_initialize';
did you mean 'syslog_initialize'? [-Wimplicit-function-declaration]
150 | itm_syslog_initialize();
| ^~~~~~~~~~~~~~~~~~~~~
| syslog_initialize
Signed-off-by: chao an <anchao@lixiang.com>
Summary:
- In https://github.com/apache/nuttx/pull/14465,
atomic_compare_exchange_weak_explicit() was newly introduced
in semaphore. However, cxd56xx has an issue with the API
if SMP is enabled (see up_testset2 in cxd56_testset.c).
- This commit fixes the issue by using LIBC_ARCH_ATOMIC.
Impact:
- Only cxd56xx SoCs in SMP mode.
Testing:
- Tested with spresense:smp, spresense:wifi_smp
- NOTE: If DEBUG_ASSERTIONS is enabled assert would be happend.
I think this might be another issue.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
time/lib_localtime.c: In function 'tz_lock':
time/lib_localtime.c:396:7: error: 'tpidr_el1' undeclared (first use in this function)
396 | if (up_interrupt_context() || (sched_idletask() && OSINIT_IDLELOOP()))
| ^~~~~~~~~~~~~~~~~~~~
Signed-off-by: ligd <liguiding1@xiaomi.com>
The PLL clock configuration was simplified on the assumption the clocks are correctly set in the board.h file. Instead of seperate conditions
for register components, assume the relevant PLL registers are fully defined in board.h. This should result in easier to understand defines in board.h
and simpler code flow in the standard clock configuration function.
Changes were mad in the board file alongside changing the arch files. Changes to board/stm32h5:
- PLL1 has been configured to use integer instead of fractional mode to reach the 250 MHz target. PLL2 and PLL3 configurations were
removed since they are currently unused in the H5 configuration.
- PLL1 output was verified by testing for changes in serial baud rate.
syslog_putc() have a lot of duplicate logic with syslog_write().
remove syslog_putc() and reuse syslog_write() to simplify syslog printing.
Signed-off-by: chao an <anchao@lixiang.com>
reason:
When entering an exception or interrupt, there are two sets of registers:
one is the "running regs", which we need to save,
and the other is the "ready to running regs", which we may soon use.
For consistency in logic, we can always store the "running regs" in the regs field of g_running_tasks,
otherwise it may lead to errors in the storage location of the "running regs."
When we need to access the "running regs," we should uniformly retrieve them from the regs field of g_running_tasks.
As the next step, we will rename the set_current_regs/up_current_regs functions
for each architecture to more appropriate names, solely for the purpose of identifying interrupts.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
Some armv7-m-based SoCs do not work with atomic instructions,
even though armv7-m supports them.
To avoid using atomic instructions generated by gcc,
CONFIG_LIBC_ARCH_ATOMIC is newly introduced with which
arch_atomic.c is linked explicitly.
However, the function names need to be changed to avoid
build errors, since the functions described in stdatomic.h
are gcc built-in and inlined when the code is compiled.
About libcxx with CONFIG_LIBC_ARCH_ATOMIC, it still
does not work. It is also needed to call nx_atomic_ ver
instead of __atomic ver in
libcxx/include/__atomic/cxx_atomic_lmpl.h.
Signed-off-by: Takuya Miyasita <Takuya.Miyashita@sony.com>
This performs the DDR training for imx93-evk. In addition to the source code,
it downloads binaries which are included in the final image. The bootloader
must be ARCH_CORTEX_A53 instead of A55 due to atomic instructions that don't
work with the OCRAM / EL3 combination.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
This commit adds a max_pins field into the private struct.
AFEC0 has 11, AFEC1 has 12. The 12th pin of AFEC0 is an internal
pin connected to a temperature sensor, which we don't use.
Signed-off-by: Stepan Pressl <pressste@fel.cvut.cz>
1. arch/arm/src/cmake/gcc.cmake: The same judgment has been made in line 164
2. boards/sim/sim/sim/scripts/Make.defs: arch/sim/src/Makefile also has in line 147
Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
Added I2C driver for the STM32H5. This driver uses the STM32H7 I2C driver as a base. The primary difference is setclock dynamically sets the I2C TIMINGR register instead of using hardcoded values. This allows the I2C peripherals to use any of the input clocks and set to any speed 0-1MHz. Additionally, Kconfig options were made available to set the Digital Noise Filter (DNF), Analog Noise Filter, I2C Clock source (i2c_ker_ck), as well as set i2c rise/fall times which are crucial to timing. Care must be taken when setting the clock source and filters, as not all settings are compatible with all i2c clock frequencies.
Trdc is configured in EL3 bootloader
Clock pre-initialization is also executed there.
Trdc board configuration for imx93evk included
Signed-off-by: Jouni Ukkonen <jouni.ukkonen@unikie.com>
