Make sure interrupt stack is colored before IRQ is enabled.
Currently, after calling irq_initialize in nx_start to
enable interrupts, there is still a period of execution
path before the interrupt stack is colored.
Signed-off-by: guoshengyuan1 <guoshengyuan1@xiaomi.com>
After irq_dispatch finished, the interrupt stack will be checked to
determine whether overflow occurs.
The relevant configuration reuses the configuration of stack overflow
detection during context switching.
Signed-off-by: guoshengyuan1 <guoshengyuan1@xiaomi.com>
Many different architectures re-implemented the exact same code for
`up_*delay` because it was originally written as architecture dependent
code. Busy-waiting can be done regardless of architecture, so this
commit moves that duplicated implementation to a common file with weak
definitions so that individual architectures (see tc32) are still able
to override the definition if needed/desired.
Default implementation is not included if ARCH_TIMER is enabled, since
it is more accurate and provides its own weak definitions to override.
Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
Many times, context switching does not occur when the thread stack
memory is almost exhausted, so we need to mofify up_check_tcbstack to
accurately detect it.
Co-authored-by: Chengdong Wang <wangchengdong@lixiang.com>
Signed-off-by: guoshengyuan1 <guoshengyuan1@xiaomi.com>
Complete the missing scheduling information in some architectures
In these architectures (riscv, avr, tricor) context switching
can occur in both up_switch_context and xx_doirq
Co-authored-by: yinshengkai <yinshengkai@xiaomi.com>
Signed-off-by: guoshengyuan1 <guoshengyuan1@xiaomi.com>
Replace all nxsched_suspend/resume_*** with nxsched_switch_context
Delete nxsched_resume_scheduler in up_exit and call it uniformly in task_exit
Co-authored-by: yinshengkai <yinshengkai@xiaomi.com>
Signed-off-by: guoshengyuan1 <guoshengyuan1@xiaomi.com>
These archs only align the size of the stack, forgeting to do the
stack start addr alignment, this patch fixes it.
Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
Use this command to extract archives.
Not all architectures are modified, only those commands I know
or could be logically deducted from the rest were added.
Signed-off-by: Stepan Pressl <pressl.stepan@gmail.com>
This fixes the same issue for other targets, which was already fixed for
xtensa in commit 50d94863.
After the signals have been delivered, the local irqs need to be
disabled until the context switch. But just calling
leave_critical_section(regs[xx]) will enable them if they were
enabled in the context.
Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
Renaming "modlib" to "libelf" is more in line with the implementation content,
which makes it easier for individual developers to understand the capabilities of this module.
CONFIG_LIBC_MODLIB -> CONFIG_LIBC_ELF
Signed-off-by: chao an <anchao.archer@bytedance.com>
test:
1.use mps3-an547 build helloxx as module and run it
2.use qemu-armv7a:knsh test kernel build helloxx and run it
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
What's really need is a done signal sent from the secondary
cpu to the boot cpu, so let's simplify the logic by:
1.Change the spinlock to a bool flag
2.Set the flag to true in the secondary cpu
3.Wait the flag set in the boot cpu before continue booting
This also remove all bad usage of spinlock from the code base:
1.Lock spinlock in one thread, but unlock in a different thread
2.Lock spinlock twice in one thread, but unlock only once
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Inline & inline_function both used make confuze, let's modify all inline
in irq.h to inline_function, also clear the always_inline_funcion
declaration.
Signed-off-by: buxiasen <buxiasen@xiaomi.com>
Most tools used for compliance and SBOM generation use SPDX identifiers
This change brings us a step closer to an easy SBOM generation.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
reason:
When entering an exception or interrupt, there are two sets of registers:
one is the "running regs", which we need to save,
and the other is the "ready to running regs", which we may soon use.
For consistency in logic, we can always store the "running regs" in the regs field of g_running_tasks,
otherwise it may lead to errors in the storage location of the "running regs."
When we need to access the "running regs," we should uniformly retrieve them from the regs field of g_running_tasks.
As the next step, we will rename the set_current_regs/up_current_regs functions
for each architecture to more appropriate names, solely for the purpose of identifying interrupts.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
reason:
Replace "inline" with "inline_function" for "up_interrupt_context" to ensure consistency with other arch
Signed-off-by: hujun5 <hujun5@xiaomi.com>
Some app with same code runs on different cores in AMP mode,
need the physical core on which the function is called.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
Signed-off-by: fangxinyong <fangxinyong@xiaomi.com>
reason:
To remove the "sync pause" and decouple the critical section from the dependency on enabling interrupts,
after that we need to further implement "schedlock + spinlock".
changelist
1 Modify the implementation of critical sections to no longer involve enabling interrupts or handling synchronous pause events.
2 GIC_SMP_CPUCALL attach to pause handler to remove arch interface up_cpu_paused_restore up_cpu_paused_save
3 Completely remove up_cpu_pause, up_cpu_resume, up_cpu_paused, and up_cpu_pausereq
4 change up_cpu_pause_async to up_send_cpu_sgi
Signed-off-by: hujun5 <hujun5@xiaomi.com>
reason:
In the kernel, we are planning to remove all occurrences of up_cpu_pause as one of the steps to
simplify the implementation of critical sections. The goal is to enable spin_lock_irqsave to encapsulate critical sections,
thereby facilitating the replacement of critical sections(big lock) with smaller spin_lock_irqsave(small lock)
Signed-off-by: hujun5 <hujun5@xiaomi.com>
reason:
Currently, if we need to schedule a task to another CPU, we have to completely halt the other CPU,
manipulate the scheduling linked list, and then resume the operation of that CPU. This process is both time-consuming and unnecessary.
During this process, both the current CPU and the target CPU are inevitably subjected to busyloop.
The improved strategy is to simply send a cross-core interrupt to the target CPU.
The current CPU continues to run while the target CPU responds to the interrupt, eliminating the certainty of a busyloop occurring.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
reason:
1 On different architectures, we can utilize more optimized strategies
to implement up_current_regs/up_set_current_regs.
eg. use interrupt registersor percpu registers.
code size
before
text data bss dec hex filename
262848 49985 63893 376726 5bf96 nuttx
after
text data bss dec hex filename
262844 49985 63893 376722 5bf92 nuttx
size change -4
Configuring NuttX and compile:
$ ./tools/configure.sh -l qemu-armv8a:nsh_smp
$ make
Running with qemu
$ qemu-system-aarch64 -cpu cortex-a53 -smp 4 -nographic \
-machine virt,virtualization=on,gic-version=3 \
-net none -chardev stdio,id=con,mux=on -serial chardev:con \
-mon chardev=con,mode=readline -kernel ./nuttx
Signed-off-by: hujun5 <hujun5@xiaomi.com>
