esp32s3_bringup.c still guards on CONFIG_ESP32S3_RT_TIMER, includes
"esp32s3_rt_timer.h" and calls esp32s3_rt_timer_init(). None of those
exist any more: c17e16eaed ("xtensa/espressif: Update common-source
integration for Xtensa devices") deleted the chip-specific RT timer and
replaced it with the common-source HR Timer, and updated every other
esp32s3 board's bringup to CONFIG_ESPRESSIF_HR_TIMER /
"espressif/esp_hr_timer.h" / esp_hr_timer_init(). This board was missed.
The stale guard is not dead code: ESPRESSIF_WIRELESS selects
ESP32S3_RT_TIMER (which survives only as a deprecated alias that selects
ESPRESSIF_HR_TIMER), so enabling Wi-Fi on this board turns the guard on and
the build fails outright:
board/esp32s3_bringup.c:61:12: fatal error: esp32s3_rt_timer.h:
No such file or directory
No esp32s3-ws-lcd128 defconfig enables Wi-Fi, which is why CI has not
caught it.
Switch to the same guard, include and initializer the other esp32s3 boards
use. No functional change for the existing defconfigs: they leave both
ESP32S3_RT_TIMER and ESPRESSIF_HR_TIMER unset, so the block stays compiled
out.
Verified with esp32s3-ws-lcd128:nsh plus CONFIG_ESPRESSIF_WIFI=y (and the
Wi-Fi prerequisites the in-tree wifi defconfigs set: SCHED_LPWORK,
DRIVERS_WIRELESS/DRIVERS_IEEE80211, NETDEV_WIRELESS_IOCTL, IOB_NCHAINS,
TLS_TASK_NELEM, TIMER): the fatal error above before the change, a clean
build and image after it, with no other change to the configuration.
Signed-off-by: Ricard Rosson <ricard@groundbits.com>
Assisted-by: Claude Opus 5 (Claude Code)
A protected build on the ESP32 could only use the legacy IDF image format.
Kconfig allowed simple boot to be selected with BUILD_PROTECTED, because the
legacy format is only a default and not a select, but the result did not link
and then did not boot.
Simple boot has no second-stage bootloader. __start() maps the flash itself,
so everything it reaches must already be in RAM. kernel-space.ld pinned none
of it, and it did not place esp32_start at all, so the entry point went to the
flash the code was about to map. The chip loaded the RAM segments, jumped to
0x400d0ba4 and took an IllegalInstruction on the first instruction.
So this pins the bootloader, flash, ROM, clock and log objects that
bootloader_init() and map_rom_segments() reach, along with esp32_start itself,
and defines the six _image_* symbols that __start() needs. All of it is
behind CONFIG_ESPRESSIF_SIMPLE_BOOT, so a legacy build gets the same IRAM it
had before.
kernel-space.ld also had no `#include <nuttx/config.h>'. It held no
conditionals until now, so nothing showed the omission: the new blocks
compiled away silently and the link failed as if the file had not been
changed.
The default is unchanged. A protected build still selects the legacy format
unless the user clears CONFIG_ESP32_APP_FORMAT_LEGACY.
Verified on an ESP32-DevKitC V4, ESP32-D0WD-V3 revision 3.1, with
esp32-devkitc:knsh and the legacy format turned off. The kernel flashes at
0x1000 and the user image at 0x90000, with no bootloader and no partition
table. It maps seven segments, reaches NSH, and runs ostest to the same point
as the legacy build.
Assisted-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Signed-off-by: Marco Casaroli <marco.casaroli@gmail.com>
BUILD_PROTECTED defaults ESP32S3_APP_FORMAT_LEGACY to y, so a protected build
has always needed the ESP-IDF second-stage bootloader. Nothing about the
protected layout requires it: the kernel and user images are described
entirely by ESP32S3_KERNEL_OFFSET, ESP32S3_KERNEL_IMAGE_SIZE and
ESP32S3_KERNEL_RAM_SIZE, and esp32s3_userspace() maps the user image itself.
Three obstacles stood in the way.
Those three symbols were gated on ESP32S3_APP_FORMAT_LEGACY, but
protected_memory.ld needs all of them for KIROM, KDROM, UIROM, UDROM, KDRAM
and UDRAM. Without them the region lengths underflow to 2**64-1 and the
kernel/user RAM split lands nowhere, which the hardware reports as a DRAM0
PMS monitor violation once the first user process runs. The offset becomes
0x0 for simple boot, where the image is flashed at the start of the device.
protected_memory.ld had no case for a 32 MB part, so FLASH_SIZE was
undefined there and ROM, UIROM and UDROM underflowed the same way.
flat_memory.ld has had the case all along.
kernel-space.ld defined none of the symbols simple boot needs
(_image_irom_*, _image_drom_*, _bss_*), and kept none of the early code
resident. __start() runs bootloader_init() and map_rom_segments() before any
flash mapping exists, so everything they reach has to be in RAM -- including
map_rom_segments() itself, which unmaps the MMU it is running from, and
nuttx_enter_critical(), reached from rtc_clk_init() by way of regi2c. These
mirror what esp32s3_sections.ld already does for the flat build.
Verified on an ESP32-S3-WROOM-2 (32 MB octal flash), esp32s3-devkit:knsh with
FLASH_MODE_OCT: boots to NSH and runs ostest, where it reaches the same
timedmutex abort as every other target. The legacy path is untouched.
Assisted-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Signed-off-by: Marco Casaroli <marco.casaroli@gmail.com>
A full ostest run never reached the end on esp32-devkitc:knsh. It stopped in
the barrier test:
barrier_test: ERROR thread 6 create, status=12
ostest_main: Exiting with status 256
The cause is the interaction of two settings that are each reasonable on their
own. CONFIG_TLS_ALIGNED is set and CONFIG_TLS_LOG2_MAXSTACK is 13, so every
pthread stack must start on an 8 KiB boundary. The barrier threads take the
2 KiB default stack, so each one occupies an 8 KiB aligned slot. Eight of them
do not fit the 96 KiB user heap of a protected build once the tests before them
have fragmented it, and up_create_stack() fails:
up_create_stack: ERROR: Failed to allocate stack, size 2048
The flat build has the same two settings and passes, because its heap is
320 KiB against 96 KiB here.
So this lowers the barrier thread count for this configuration only. Four
threads still test a barrier, and they leave margin: six was the most that
ever started, so six would pass with none.
The user heap cannot grow far. User data has to sit in the MMU governed window
of SRAM2, which is 128 KiB in total, and the kernel holds the first 32 KiB of
it.
Verified on an ESP32-DevKitC V4, ESP32-D0WD-V3 revision 3.1. All four threads
reach the barrier and ostest reports "Exiting with status 0".
Assisted-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Signed-off-by: Marco Casaroli <marco.casaroli@gmail.com>
ARM PIC has used r10 as the base register, but the tree has never been
consistent about it. Toolchain.defs gives CONFIG_BUILD_PIC
-mpic-register=r9 and CONFIG_PIC -mpic-register=r10, twenty-five lines
apart, and arm_initialstate.c sets REG_R9 from inline assembly under one
and REG_PIC under the other, with a comment reading "Set the PIC base
register (probably R10)". This settles it on r9 for all of PIC: NXFLAT,
ELF PIC and CONFIG_BUILD_PIC alike.
r9 is the right choice rather than an arbitrary one. It is the AAPCS
platform register, the "static base", and it is what GCC itself picks
for -msingle-pic-base on an EABI target; r10 is the non-EABI default.
It also removes a combination that cannot build today. Stack checking
adds -ffixed-r10 in armv7-m/Toolchain.defs and armv8-m/Toolchain.defs,
while CONFIG_PIC adds -mpic-register=r10, and GCC rejects the pair with
"unable to use 'r10' for PIC register". The comment above REG_PIC has
always said the register "can be R9 if stack checking is enabled", but
the definition was unconditionally REG_R10, so it would have named the
wrong register even had the build succeeded.
The thunk generator moves with the firmware. NXFLAT import stubs had
the register baked in as "add ip,ip,sl", so a module built for r9 would
load and then branch to a wild address on its first call out. The stubs
now come from NXFLAT_PIC_REG in the in-tree tool, which is built only
when CONFIG_NXFLAT is set, following the
CONFIG_BOARD_ETC_ROMFS_PASSWD_ENABLE precedent in tools/Unix.mk.
That leaves modules built before this change, and they are the reason
for the ABI marker. The NXFLAT header cannot carry a version: h_magic
is written by ldnxflat, which is GPL, derived from elf2flt, and stays
out of this repository, so it can never be changed in step with the
loader. The import table can, because both of its ends are in-tree --
mknxflat emits it and nxflat_bindimports() reads it -- and ldnxflat
passes it through untouched. So every module now imports
__nxflat_abi_v2, the base firmware defines it, and a module that does
not import it is refused.
Making the marker a real exported symbol rather than a name the loader
special-cases is what keeps it out of the build system's way: a board's
symbol table picks it up exactly as it picks up printf, so mksymtab.sh
and its equivalents need no change. It also gives the reverse direction
a diagnosis for free -- a module built against a newer ABI than its
firmware fails with "Exported symbol __nxflat_abi_v2 not found".
Most of the remaining churn is boards restating a default. ARCHPICFLAGS
is a "?=" default so that a board only speaks up when it differs, and
twenty-six were assigning the value the default already had. MKNXFLAT
gets the same treatment: thirteen boards named the same tool, and the
only thing that varies is ARM versus Thumb-2, which falls out of
CONFIG_ARM_THUMB. LDNXFLAT gains a default too -- it stays an
out-of-tree PATH lookup, but naming it centrally fixes boards that never
assigned it, where it expanded to nothing and handed make a recipe
beginning "-e", whose leading dash make ate as "ignore errors".
The non-ARM boards carrying -mpic-register=r10 lose it: it is an
ARM-only option, reachable only through CPICFLAGS, which is only used to
build NXFLAT modules, and no non-ARM board enables NXFLAT.
Boards keep nothing about PIC flags any more. ARCHPICFLAGS was set by
sixty-three of them and only ever fed CPICFLAGS, which is only used to
build NXFLAT modules; no board outside arch/arm enables NXFLAT, so every
non-ARM copy was setting a variable nothing read. Those are removed
rather than moved somewhere more central, which would only make dead
text look load-bearing. LDNXFLAT goes the same way as MKNXFLAT, for the
same reason: thirteen boards named the same tool that Toolchain.defs now
names once.
One of them was not merely redundant. am67/t3-gem-o1 asked for
"-mpic-register=r10 -ffixed-r10", which GCC refuses outright with
"unable to use 'r10' for PIC register" -- the very combination the
filter-out machinery in Toolchain.defs exists to prevent. It has
survived because that board does not build NXFLAT modules, so the flags
are never handed to a compiler. Renaming the register would have
carried the fault forward unchanged, so the line goes.
Tested on lm3s6965-ek:qemu-nxflat under QEMU, configured and built with
no overrides. The nxflat example runs the errno, hello and struct
modules with output identical to the same config built from master.
Built with the old out-of-tree thunk generator instead, the same
firmware refuses all three with ENOEXEC rather than locking up in a
HardFault, which is what this change is for. mps3-an547:picostest,
which is CONFIG_PIC without CONFIG_NXFLAT, builds clean and does not
build the thunk generator.
The .def files pick up two cosmetic changes here alongside the register:
a "Dyanamic" typo that codespell rejects, and a reworded comment in each
thunk_*.c. Neither appears in the emitted thunk -- both are in C
comments -- so the generated text is still what the upstream tool
produces, modulo the register itself.
BREAKING CHANGE: ARM PIC moves from r10 to r9. An NXFLAT module built
before this change has r10 baked into its import stubs and will not run
against a firmware carrying it; the two cannot be mixed. The module is
refused with ENOEXEC rather than branching to a wild address, by way of the
__nxflat_abi_v2 marker described below.
Quick fix: rebuild the module against this tree. Its source needs no
change. A board that reserved r10 by hand, or that assigned ARCHPICFLAGS
or MKNXFLAT to restate a default, should drop those assignments; nothing
else is affected, and CONFIG_PIC without CONFIG_NXFLAT needs no action.
Assisted-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Signed-off-by: Marco Casaroli <marco.casaroli@gmail.com>
The terminal no longer has separate matrix and USB input sources: it
reads any keyboard through one path.
Left as it was, the unknown symbol would have been dropped and the
configuration would have fallen back to the touch variant, which is the
default. This board has no touchscreen, so the terminal would have had
no input at all and the build would have said nothing.
Signed-off-by: Jorge Guzman <jorge.gzm@gmail.com>
The Fn cursor cluster was reported as ordinary key presses carrying 0x80
to 0x83, chosen to sit above the printable range so that an application
could tell them apart from characters. That is the collision this work
exists to remove: a key that produces no character is a special key, and
the event type is what says so.
Report them as KEYBOARD_SPECPRESS carrying KEYCODE_UP and friends, which
is what every other keyboard does and what the applications now expect.
The character tables are untouched, so the layout and the shift map behave
exactly as before. Only the four Fn cursor keys change.
Not tested on hardware: the board was not available. It builds, and the
change is confined to the two lines that pick the event type.
Signed-off-by: Jorge Guzman <jorge.gzm@gmail.com>
Enable the OTG FS host on the Linum board so an external USB HID keyboard
can be used: configure the USB VBUS, power-switch and over-current GPIOs
at board bring-up (the power switch on PI12 is active low) and start the
USB host from stm32_bringup() through stm32_usbhost_initialize().
Add the lvglterm_kbda configuration - the LVGL terminal driven by a USB
HID keyboard on /dev/kbda - with the microSD card enabled alongside the
USB host. They coexist once CONFIG_MMCSD_MMCSUPPORT is left disabled, so
an SD card is not probed as an MMC device.
Also switch esp32s3-m5-cardputer:lvglterm to the renamed matrix-keyboard
input option (EXAMPLES_LVGLTERM_INPUT_KBD_MATRIX) to match the reworked
lvglterm example Kconfig.
Update the documentation accordingly: the LVGL Terminal example page for
the three-way input choice (touch, matrix, USB HID) with cursor-key
scrolling and per-variant configuration plus a photo of the USB variant
running on the Linum, the lvglterm_kbda entry on the Linum board page,
and the matrix-keyboard variant name on the M5Stack Cardputer board page.
Signed-off-by: Jorge Guzman <jorge.gzm@gmail.com>
The CI refresh step removes the explicit LVGL terminal keyboard input selection from the esp32s3-m5-cardputer lvglterm defconfig.
Update the saved defconfig so unrelated pull requests do not fail the normalize check on this board.
Signed-off-by: Old-Ding <ai.neo.ae86@gmail.com>
Add the 56-key matrix keyboard driver for the M5Stack Cardputer. The keys
form an 8x7 matrix behind a 74HC138 3-to-8 demultiplexer; the driver scans it
on the low-priority work queue and registers a keyboard device at /dev/kbd0,
reporting ASCII codes with SHIFT/CTRL and Fn (cursor) handling.
Add an "lvglterm" configuration that runs the on-screen NuttShell terminal
(apps/examples/lvglterm, physical-keyboard input variant) on the ST7789
display: the shell output is rendered in an LVGL text area and the keyboard
feeds the input. Wi-Fi is included so the on-screen shell can associate with
an access point using wapi.
Signed-off-by: Jorge Guzman <jorge.gzm@gmail.com>
The existing first-order LCG (seed = 470001 * seed % 999563) has several
quality problems:
- Output range limited to [1, 999562] (~20 bits) instead of full 32-bit
- Lower bits have very short periods (8-bit period = 1, 16-bit = 105)
- Overall period only ~1M, far too short for many applications
- Causes mbedtls_rsa_gen_key to loop forever when rand() consumption
aligns with the cycle length (issue #16760)
Replace the entire order-based LCG implementation (CONFIG_LIBC_RAND_ORDER
0-3) with Marsaglia's xorshift32:
- Full 32-bit output range
- Period 2^32 - 1 (~4.29 billion)
- Fast: just three XOR/shift operations
- No floating-point math needed
- No CONFIG_LIBC_RAND_ORDER configuration required
Remove the CONFIG_LIBC_RAND_ORDER Kconfig option and clean up all
defconfig references (12 boards) and related comments.
Signed-off-by: hanzhijian <hanzhijian@zepp.com>
This port adds support for the M5Stack Cardputer (M5Stamp S3 /
ESP32-S3FN8, dual Xtensa LX7 @ 240 MHz, 8 MB flash, no PSRAM).
It reuses the common ESP32-S3 board helpers and ships these
configurations:
- nsh: NuttShell over the USB-Serial-JTAG console
- sdcard: microSD card on SPI3 (FAT)
- fb: ST7789 240x135 display exposed as a framebuffer
- wifi: Wi-Fi station
- softap: Wi-Fi SoftAP with DHCP server
- lvgl: LVGL graphics on the ST7789 (lvgldemo)
Signed-off-by: Jorge Guzman <jorge.gzm@gmail.com>
BREAKING CHANGE: bme680_register() takes an additional "*config" argument.
When config is NULL - driver behavior is the same as before.
With this change bme680 can be configured during registration in board logic.
This way we don't have to callibrate sensor from user-space but sensor is ready
to use after registration.
This change makes the registration the same as for bme688, which is a similar
sensor.
Signed-off-by: raiden00pl <raiden00@railab.me>
Replace the default nsh-based init flow on the lckfb-szpi-esp32s3 :adb
defconfig with system/nxinit so that services (sh console, adbd) are
spawned and reaped by init through /etc/init.d/init.rc.
- Enable CONFIG_SYSTEM_NXINIT and set INIT_ENTRYPOINT to init_main
(CONFIG_EXPERIMENTAL is required by SYSTEM_NXINIT).
- Add a common init.rc under boards/xtensa/esp32s3/common/src/etc/init.d
defining 'console' (sh) and 'adbd' services and starting both on init.
fastbootd is wired in for completeness when configured.
- Append the new init.rc to RCSRCS only when SYSTEM_NXINIT is enabled
so existing nsh-based configs remain unaffected.
Verified on lckfb-szpi-esp32s3 hardware: init_main spawns sh and adbd
(both with PPID=init), 'adb shell' reaches a working NuttShell.
Assisted-by: GitHubCopilot:claude-4.8-opus
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
Fix crypto hash test errors due to SHA224 test which are not supported on NuttX for Xtensa based Espressif devices.
Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
Increase MM_REGIONS from 5 to 6 to accomodate latest changes from
initialization refactor.
Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
The 32-bit system clock has a limited range (~497 days) and the
configuration knob is no longer worth the complexity given that
practically every modern target already enables it. Make 64-bit
time_t/clock_t/sclock_t/nuttx_time_t the only supported flavor.
Specifically:
- Drop the SYSTEM_TIME64 Kconfig option and its dependent
PERF_OVERFLOW_CORRECTION/HRTIMER guards in sched/Kconfig.
- Remove every #ifdef CONFIG_SYSTEM_TIME64 branch in headers
(include/{sys/types.h,limits.h,inttypes.h,nuttx/clock.h,
nuttx/fs/hostfs.h}) and core code paths
(sched/clock/clock.h, drivers/power/pm/pm_procfs.c,
drivers/rpmsg/rpmsg_ping.c, fs/procfs/fs_procfsuptime.c,
libs/libc/wqueue/work_usrthread.c,
arch/avr/src/avrdx/avrdx_timerisr_tickless_alarm.c).
- Strip CONFIG_SYSTEM_TIME64=y from every board defconfig.
- Update Documentation/guides/rust.rst accordingly.
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
BREAKING CHANGE: remove PWM_MULTICHAN option
PWM_MULTICHAN option is redundant, we can just set CONFIG_PWM_NCHANNELS > 1.
At default CONFIG_PWM_NCHANNELS is set to 1, so the default behavior is preserved.
Access to single channel API is now `info->channels[0].XXX` instead of `info->XXX`
This is the first step to simplify PWM implementation and make it more portable.
Signed-off-by: raiden00pl <raiden00@railab.me>
Normalizes configurations after removal of some app-related init config
options due to simplification of NuttX init.
Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
Since `NSH_ARCHINIT` is now removed, this commit cleans the last few
references to this option in the defconfig files that were recently
modified and escaped removal in initialization simplification commit.
Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
BREAKING: In an effort to simplify NuttX initialization, NSH_ARCHINIT is
removed. board_app_initialize is also removed. BOARD_LATE_INITIALIZE now
performs all board initialization logic, and is by default enabled. All
references to these symbols are removed. BOARDIOC_INIT remains, but will
result in -ENOTTY when called. It is to be removed in a later commit.
Quick fix: Boards relying on NSH_ARCHINIT should now enable
CONFIG_BOARD_LATE_INITIALIZE instead. If the application needs
fine-grained control over board initialization from userspace, the logic
performed by BOARDIOC_INIT may be copied to the board_finalinitialize
function and used instead via BOARDIOC_FINALINIT. All
board_app_initialize logic provided by NuttX is now moved to
board_late_initialize, and the same should be done for out-of-tree
boards.
Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
* Initial experimental / work in progress implementation.
* New board name is esp32s3-ws-lcd128.
* Supports Kconfig delectable w/wo touch variants (lcd gpios difference).
* IMU QMI8658 bringups is put into esp32s3/common/src to share with other
boards. Pin defines are located at <board>include/board.h and referenced
with `#include <arch/board/board.h>`.
* Supported configurations: nsh, ostest, coremark, touch-lvgl, notouch-lvgl,
imu-qmi8658, watchdog.
* Does not have touch panel driver yet.
* Created board documentation. Added sphinx inline cross-references.
* TODO: Fix SPI GC9A01A LCD pixel format colors.
* TODO: Create I2C CST816S touch panel driver.
Signed-off-by: Tomasz 'CeDeROM' CEDRO <tomek@cedro.info>
When both CONFIG_ESP32_SPIRAM and CONFIG_ESP32_SPIRAM_USER_HEAP
are selected, the device must not select CONFIG_NSH_ARCHINIT.
Instead, CONFIG_BOARD_LATE_INITIALIZE must be selected. This is
necessary because the SPI flash initialization disables the cache,
and only internal memory is then accessible. So, if the SPI flash
initialization is performed by the entry task (nsh_main, a regular
task), it would use the user heap to allocate memory, which would
cause a system crash when the cache is disabled. On the other hand,
by selecting CONFIG_BOARD_LATE_INITIALIZE, a kernel thread is
dedicated to perform the initialization, and the cache can be
safely disabled.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
This adds support for the PBKDF2 algorithm in the ESP32 crypto
driver. Here, it will take advantage of the hardware-accelerated
implementation of SHA.
Signed-off-by: Vlad Pruteanu <pruteanuvlad1611@yahoo.com>
Remove CONFIG_LCD_PORTRAIT so the ST7789 defaults to landscape
orientation (320x240), matching the GC0308 QVGA output and the
physical screen mounting direction.
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
debug.h is a NuttX-specific, non-POSIX header. Placing it in the
top-level include/ directory creates naming conflicts with external
projects that define their own debug.h.
This commit moves the canonical header to include/nuttx/debug.h,
following the NuttX convention for non-POSIX/non-standard headers,
and updates all in-tree references.
A backward-compatibility shim is left at include/debug.h that
emits a deprecation #warning and re-includes <nuttx/debug.h>,
allowing out-of-tree code to continue building while migrating.
Signed-off-by: Piyush Patle <piyushpatle228@gmail.com>
The common ESP board RMT bring-up files are built whenever ESP_RMT is
enabled, but the esp_lirc declarations are only visible when DRIVERS_RC
is enabled.
Guard the esp_lirc header include and esp_lirc_rx_initialize() /
esp_lirc_tx_initialize() calls with CONFIG_DRIVERS_RC so non-RC ESP
configs continue to build while keeping the LIRC registration path for
the rmt configs.
Signed-off-by: Piyush Patle <piyushpatle228@gmail.com>
Add documentation for the RC/LIRC character driver subsystem covering
device registration, the LIRC interface, and usage from user space.
Remove placeholder empty files under drivers/rmt that were left over
from the rmtchar era and are no longer referenced.
Signed-off-by: Piyush Patle <piyushpatle228@gmail.com>
Replace the ESP-specific rmtchar upper-half with arch-local esp_lirc
adapters for Xtensa and RISC-V.
This moves the RMT upper-half out of drivers/rmt, registers LIRC
devices from the ESP board bring-up paths, and removes the old common
rmtchar driver and headers.
Also update the ESP Kconfig and build wiring to build esp_lirc when
ESP_RMT and DRIVERS_RC are enabled.
Fixes discovered during hardware validation:
- register TX as /dev/lirc1 so RX and TX do not collide
- parse the RX worker thread argument from the correct argv slot
- keep RX devices from advertising TX capability
Signed-off-by: Piyush Patle <piyushpatle228@gmail.com>
Add board-level support for ES7210 4-ch ADC on lckfb-szpi-esp32s3:
- configs/es7210/defconfig: Board configuration with I2C0, I2S0,
ES7210 driver enabled. I2S pins: BCLK=14, DIN=12, MCLK=38, WS=13,
sample rate 48kHz.
- src/esp32s3_board_es7210.c: Board init registering ES7210 on I2C0
bus with I2S0 as audio transport
- src/esp32s3_bringup.c: Call ES7210 board init on startup; skip
generic I2S audio device registration on I2S0 when ES7210 is
enabled to avoid conflicting audio device on the same port
- src/esp32s3-szpi.h: ES7210 I2C address and device path defines
- src/Make.defs: Build integration for CONFIG_AUDIO_ES7210
Tested: 48kHz/2ch/16bit recording on ESP32-S3 (lckfb-szpi N16R8),
verified with nxrecorder and es7210_test.
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
Initialize 'ret' to OK to silence -Werror=maybe-uninitialized.
When neither enable_tx nor enable_rx is set, 'ret' was returned
without being assigned.
Signed-off-by: dramalife <yangyongkang@espressif.com>
Enable CONFIG_ARCH_IRQ_TO_NDX, CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC
and CONFIG_ARCH_NUSER_INTERRUPTS=2 which are now required by the Xtensa
ESP32-S3 interrupt handling after upstream changes.
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
Add UVC configuration for lckfb-szpi-esp32s3 board based on gc0308
camera config, with USB OTG and UVC gadget driver enabled in
standalone (non-composite) mode.
- defconfig: enable ESP32S3_OTG, USBUVC, UVC example app
- board doc: add uvc section with usage and host verification
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
This is necessary because new defconfig were recently added to
Xtensa-based Espressif SoCs and the build job may exceed 2 hours.
In order to avoid increasing job timeout, a specific job for each
supported SoC (ESP32, ESP32-S2 and ESP32-S3) was created instead.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
This commit updates the common-source integration for Xtensa-based
Espressif devices (ESP32, ESP32-S2, and ESP32-S3). This is part of a larger
common-source update split by architecture for better maintainability.
Major components updated:
- IRQ allocator refactoring with intr_alloc integration
- Common-source drivers (GPIO, RMT, I2C, SPI, UART, etc.)
- Espressif components upgrade to release/master.b-test
- Peripheral drivers (ADC, PWM, LEDC, MCPWM, PCNT, Temperature Sensor, etc.)
- Wireless adapters (Wi-Fi and BLE)
- esp_timer migration to the common-source path for Xtensa devices
- Common-source power management implementation (auto-sleep and wakeup paths)
- Board defconfigs for all Xtensa Espressif boards
- SMP support improvements for ESP32-S3
- Critical section handling improvements
Key architectural changes:
- IRQ Allocator: The new interrupt allocator enables multiple mapping
options from interrupt sources to CPU interrupts, providing flexibility
required by modern peripherals. Although this introduces breaking changes
to the interrupt handling API, the required ARCH_MINIMAL_VECTORTABLE
Kconfig option is explicitly checked during startup to ensure proper
configuration. This validation prevents runtime issues from configuration
mismatches.
- Xtensa-specific interrupt handling via esp_xtensa_intr.c providing
NuttX-native implementations of xt_ints_on/off and interrupt handlers,
avoiding conflicts with NuttX's core Xtensa macros.
- Timer/RTC unification: ESP32/ESP32-S2/ESP32-S3 move from chip-specific
RTC/RT-timer code to common-source Espressif integration, including
esp_timer_adapter/esp_rtc paths and the required bringup/defconfig updates.
- Power management consolidation: Xtensa PM follows the common-source
implementation, including common-source auto-sleep behavior, UART/Wi-Fi
wakeup coordination, and tickless-safe sleep flow compatibility.
Note: This is a large commit to maintain bisectability. Breaking the
changes into smaller commits would result in non-building intermediate
states across the common-source infrastructure update.
Tested configurations:
- All defconfigs were tested, including `ostest`.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
Correct duplicate "is is" word found in 181 files throughout the
codebase.
In most cases "is is" was changed to "is", but in contexts like
"MCU is is sleep mode" it was corrected to "MCU in sleep mode".
Also fixes a "the the" typo in net/inet/inet_sockif.c.
This is a pure style/documentation fix that improves code readability.
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
Fix 269 occurrences of duplicate "the" word typo found in 209 files
across source code, header files, and configuration.
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
The WiFi driver refactor (662c1e0bbb) renamed the Kconfig symbol
from CONFIG_ESPRESSIF_WLAN to CONFIG_ESPRESSIF_WIFI, but several
ESP32-S3 board bringup files were not updated. This caused
board_wlan_init() to be compiled out, so the wlan0 interface
never appeared.
Update the preprocessor guards in all affected boards:
- esp32s3-box
- esp32s3-eye
- esp32s3-korvo-2
- esp32s3-lcd-ev
- lckfb-szpi-esp32s3
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
Removes optional keyword causing selection to fail on the
automatic bringup of SPI flash device.
Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
The ESP32*_SPIFLASH_AUTO_BRINGUP option allows disabling automatic bringup.
This causes /dev/mtdblock0 to show up instead of always mounting a file system.
Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
