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670 commits

Author SHA1 Message Date
Marco Casaroli
0d31418ba8 arch, boards, cmake: Build C++ ELF modules without __cxa_atexit.
A C++ module with a static object does not link.  GCC registers each such
object's destructor with __cxa_atexit(dtor, obj, &__dso_handle), and
__dso_handle comes from crtbegin, which a module does not link:

  hello++3.cxx:119: undefined reference to `__dso_handle'

It is reachable today with CONFIG_PIC, where a module is linked as an
executable and the symbol has to resolve.  Without it the link is
relocatable, the symbol stays undefined and nothing complains until
something makes it resolve.

-fno-use-cxa-atexit registers the destructors with atexit() instead, which
puts them in .fini_array.  That is also where libelf_uninit() looks for them
when the module is unloaded, so the flag that makes the link work is also
the flag that makes the destructors run.

The option goes wherever CXXELFFLAGS is defined, which is the architecture
Toolchain.defs and the boards that reassign it.  The toolchains that are not
GCC or Clang are left alone: ceva, tricore, z16 and the z80 family.

The CMake build sets it once, next to where the architecture elf.cmake is
included.  A generator expression keeps it off the C compiles, because the
option is valid for C++ alone and GCC warns about it otherwise, and the
compiler id gates it so that a toolchain which is neither GCC nor Clang does
not see it.  It cannot go in the toolchain file itself: CMake reads that file
again inside try_compile, in a project that has not included the NuttX
extensions, so the call is an unknown command there.

Reproduced with apps/examples/elf on mps3-an547:picostest with CONFIG_PIC
enabled: hello++3 fails to link before and links after.

Assisted-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Signed-off-by: Marco Casaroli <marco.casaroli@gmail.com>
2026-09-04 15:44:24 -03:00
Marco Casaroli
5dafb683e4 xtensa/esp32: Let a protected build boot from simple boot.
Some checks are pending
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MemBrowse Memory Report / analyze (push) Blocked by required conditions
A protected build on the ESP32 could only use the legacy IDF image format.
Kconfig allowed simple boot to be selected with BUILD_PROTECTED, because the
legacy format is only a default and not a select, but the result did not link
and then did not boot.

Simple boot has no second-stage bootloader.  __start() maps the flash itself,
so everything it reaches must already be in RAM.  kernel-space.ld pinned none
of it, and it did not place esp32_start at all, so the entry point went to the
flash the code was about to map.  The chip loaded the RAM segments, jumped to
0x400d0ba4 and took an IllegalInstruction on the first instruction.

So this pins the bootloader, flash, ROM, clock and log objects that
bootloader_init() and map_rom_segments() reach, along with esp32_start itself,
and defines the six _image_* symbols that __start() needs.  All of it is
behind CONFIG_ESPRESSIF_SIMPLE_BOOT, so a legacy build gets the same IRAM it
had before.

kernel-space.ld also had no `#include <nuttx/config.h>'.  It held no
conditionals until now, so nothing showed the omission:  the new blocks
compiled away silently and the link failed as if the file had not been
changed.

The default is unchanged.  A protected build still selects the legacy format
unless the user clears CONFIG_ESP32_APP_FORMAT_LEGACY.

Verified on an ESP32-DevKitC V4, ESP32-D0WD-V3 revision 3.1, with
esp32-devkitc:knsh and the legacy format turned off.  The kernel flashes at
0x1000 and the user image at 0x90000, with no bootloader and no partition
table.  It maps seven segments, reaches NSH, and runs ostest to the same point
as the legacy build.

Assisted-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Signed-off-by: Marco Casaroli <marco.casaroli@gmail.com>
2026-08-12 00:37:18 +08:00
Marco Casaroli
8f69f27b4d boards/esp32-devkitc: Let ostest finish on the knsh configuration.
A full ostest run never reached the end on esp32-devkitc:knsh.  It stopped in
the barrier test:

  barrier_test: ERROR thread 6 create, status=12
  ostest_main: Exiting with status 256

The cause is the interaction of two settings that are each reasonable on their
own.  CONFIG_TLS_ALIGNED is set and CONFIG_TLS_LOG2_MAXSTACK is 13, so every
pthread stack must start on an 8 KiB boundary.  The barrier threads take the
2 KiB default stack, so each one occupies an 8 KiB aligned slot.  Eight of them
do not fit the 96 KiB user heap of a protected build once the tests before them
have fragmented it, and up_create_stack() fails:

  up_create_stack: ERROR: Failed to allocate stack, size 2048

The flat build has the same two settings and passes, because its heap is
320 KiB against 96 KiB here.

So this lowers the barrier thread count for this configuration only.  Four
threads still test a barrier, and they leave margin:  six was the most that
ever started, so six would pass with none.

The user heap cannot grow far.  User data has to sit in the MMU governed window
of SRAM2, which is 128 KiB in total, and the kernel holds the first 32 KiB of
it.

Verified on an ESP32-DevKitC V4, ESP32-D0WD-V3 revision 3.1.  All four threads
reach the barrier and ostest reports "Exiting with status 0".

Assisted-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Signed-off-by: Marco Casaroli <marco.casaroli@gmail.com>
2026-08-11 09:52:16 -03:00
Marco Casaroli
abbe0df26d !arch/arm: Use r9 as the PIC base register.
ARM PIC has used r10 as the base register, but the tree has never been
consistent about it.  Toolchain.defs gives CONFIG_BUILD_PIC
-mpic-register=r9 and CONFIG_PIC -mpic-register=r10, twenty-five lines
apart, and arm_initialstate.c sets REG_R9 from inline assembly under one
and REG_PIC under the other, with a comment reading "Set the PIC base
register (probably R10)".  This settles it on r9 for all of PIC: NXFLAT,
ELF PIC and CONFIG_BUILD_PIC alike.

r9 is the right choice rather than an arbitrary one.  It is the AAPCS
platform register, the "static base", and it is what GCC itself picks
for -msingle-pic-base on an EABI target; r10 is the non-EABI default.

It also removes a combination that cannot build today.  Stack checking
adds -ffixed-r10 in armv7-m/Toolchain.defs and armv8-m/Toolchain.defs,
while CONFIG_PIC adds -mpic-register=r10, and GCC rejects the pair with
"unable to use 'r10' for PIC register".  The comment above REG_PIC has
always said the register "can be R9 if stack checking is enabled", but
the definition was unconditionally REG_R10, so it would have named the
wrong register even had the build succeeded.

The thunk generator moves with the firmware.  NXFLAT import stubs had
the register baked in as "add ip,ip,sl", so a module built for r9 would
load and then branch to a wild address on its first call out.  The stubs
now come from NXFLAT_PIC_REG in the in-tree tool, which is built only
when CONFIG_NXFLAT is set, following the
CONFIG_BOARD_ETC_ROMFS_PASSWD_ENABLE precedent in tools/Unix.mk.

That leaves modules built before this change, and they are the reason
for the ABI marker.  The NXFLAT header cannot carry a version: h_magic
is written by ldnxflat, which is GPL, derived from elf2flt, and stays
out of this repository, so it can never be changed in step with the
loader.  The import table can, because both of its ends are in-tree --
mknxflat emits it and nxflat_bindimports() reads it -- and ldnxflat
passes it through untouched.  So every module now imports
__nxflat_abi_v2, the base firmware defines it, and a module that does
not import it is refused.

Making the marker a real exported symbol rather than a name the loader
special-cases is what keeps it out of the build system's way: a board's
symbol table picks it up exactly as it picks up printf, so mksymtab.sh
and its equivalents need no change.  It also gives the reverse direction
a diagnosis for free -- a module built against a newer ABI than its
firmware fails with "Exported symbol __nxflat_abi_v2 not found".

Most of the remaining churn is boards restating a default.  ARCHPICFLAGS
is a "?=" default so that a board only speaks up when it differs, and
twenty-six were assigning the value the default already had.  MKNXFLAT
gets the same treatment: thirteen boards named the same tool, and the
only thing that varies is ARM versus Thumb-2, which falls out of
CONFIG_ARM_THUMB.  LDNXFLAT gains a default too -- it stays an
out-of-tree PATH lookup, but naming it centrally fixes boards that never
assigned it, where it expanded to nothing and handed make a recipe
beginning "-e", whose leading dash make ate as "ignore errors".

The non-ARM boards carrying -mpic-register=r10 lose it: it is an
ARM-only option, reachable only through CPICFLAGS, which is only used to
build NXFLAT modules, and no non-ARM board enables NXFLAT.

Boards keep nothing about PIC flags any more.  ARCHPICFLAGS was set by
sixty-three of them and only ever fed CPICFLAGS, which is only used to
build NXFLAT modules; no board outside arch/arm enables NXFLAT, so every
non-ARM copy was setting a variable nothing read.  Those are removed
rather than moved somewhere more central, which would only make dead
text look load-bearing.  LDNXFLAT goes the same way as MKNXFLAT, for the
same reason: thirteen boards named the same tool that Toolchain.defs now
names once.

One of them was not merely redundant.  am67/t3-gem-o1 asked for
"-mpic-register=r10 -ffixed-r10", which GCC refuses outright with
"unable to use 'r10' for PIC register" -- the very combination the
filter-out machinery in Toolchain.defs exists to prevent.  It has
survived because that board does not build NXFLAT modules, so the flags
are never handed to a compiler.  Renaming the register would have
carried the fault forward unchanged, so the line goes.

Tested on lm3s6965-ek:qemu-nxflat under QEMU, configured and built with
no overrides.  The nxflat example runs the errno, hello and struct
modules with output identical to the same config built from master.
Built with the old out-of-tree thunk generator instead, the same
firmware refuses all three with ENOEXEC rather than locking up in a
HardFault, which is what this change is for.  mps3-an547:picostest,
which is CONFIG_PIC without CONFIG_NXFLAT, builds clean and does not
build the thunk generator.

The .def files pick up two cosmetic changes here alongside the register:
a "Dyanamic" typo that codespell rejects, and a reworded comment in each
thunk_*.c.  Neither appears in the emitted thunk -- both are in C
comments -- so the generated text is still what the upstream tool
produces, modulo the register itself.

BREAKING CHANGE: ARM PIC moves from r10 to r9.  An NXFLAT module built
before this change has r10 baked into its import stubs and will not run
against a firmware carrying it; the two cannot be mixed.  The module is
refused with ENOEXEC rather than branching to a wild address, by way of the
__nxflat_abi_v2 marker described below.

Quick fix: rebuild the module against this tree.  Its source needs no
change.  A board that reserved r10 by hand, or that assigned ARCHPICFLAGS
or MKNXFLAT to restate a default, should drop those assignments; nothing
else is affected, and CONFIG_PIC without CONFIG_NXFLAT needs no action.

Assisted-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Signed-off-by: Marco Casaroli <marco.casaroli@gmail.com>
2026-08-06 01:38:23 +08:00
raiden00pl
2c606a7b41 !sensors/bme680: allow sensor configuration during registration
BREAKING CHANGE: bme680_register() takes an additional "*config" argument.
When config is NULL - driver behavior is the same as before.

With this change bme680 can be configured during registration in board logic.
This way we don't have to callibrate sensor from user-space but sensor is ready
to use after registration.

This change makes the registration the same as for bme688, which is a similar
sensor.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-06-09 11:00:25 -03:00
Eren Terzioglu
78ab935db8 boards/xtensa/espressif: Fix crypto hash tests for esp32[-|-s2|-s3]
Fix crypto hash test errors due to SHA224 test which are not supported on NuttX for Xtensa based Espressif devices.

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2026-06-02 15:14:34 +02:00
Filipe Cavalcanti
91cd34a10c boards/xtensa/esp32: increase MM_REGIONS for psram defconfig
Increase MM_REGIONS from 5 to 6 to accomodate latest changes from
initialization refactor.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2026-05-21 23:12:33 -04:00
raiden00pl
4df80e1928 !drivers/pwm: remove PWM_MULTICHAN option
BREAKING CHANGE: remove PWM_MULTICHAN option

PWM_MULTICHAN option is redundant, we can just set CONFIG_PWM_NCHANNELS > 1.
At default CONFIG_PWM_NCHANNELS is set to 1, so the default behavior is preserved.
Access to single channel API is now `info->channels[0].XXX` instead of `info->XXX`

This is the first step to simplify PWM implementation and make it more portable.

Signed-off-by: raiden00pl <raiden00@railab.me>
2026-05-18 11:35:25 -04:00
Matteo Golin
96041a7c58 boards/comments: Remove legacy comments
Removing legacy comments referring to calling setup functions from the
NSH library.

Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
2026-05-04 12:16:11 -03:00
Matteo Golin
51f77ee111 boards/config: Remove final mentions of NSH_ARCHINIT
Since `NSH_ARCHINIT` is now removed, this commit cleans the last few
references to this option in the defconfig files that were recently
modified and escaped removal in initialization simplification commit.

Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
2026-05-02 15:25:45 -03:00
Matteo Golin
d54f3a31cb boards/xtensa: Replace board_app_initialize
Replaced board_app_initialize logic with board_late_initialize.

Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
2026-05-02 18:36:46 +08:00
Matteo Golin
48db502daf !boards: Remove NSH_ARCHINIT and board_app_initialize
BREAKING: In an effort to simplify NuttX initialization, NSH_ARCHINIT is
removed. board_app_initialize is also removed. BOARD_LATE_INITIALIZE now
performs all board initialization logic, and is by default enabled. All
references to these symbols are removed. BOARDIOC_INIT remains, but will
result in -ENOTTY when called. It is to be removed in a later commit.

Quick fix: Boards relying on NSH_ARCHINIT should now enable
CONFIG_BOARD_LATE_INITIALIZE instead. If the application needs
fine-grained control over board initialization from userspace, the logic
performed by BOARDIOC_INIT may be copied to the board_finalinitialize
function and used instead via BOARDIOC_FINALINIT. All
board_app_initialize logic provided by NuttX is now moved to
board_late_initialize, and the same should be done for out-of-tree
boards.

Signed-off-by: Matteo Golin <matteo.golin@gmail.com>
2026-05-02 18:36:46 +08:00
Tiago Medicci Serrano
f6837da271 boards/[risc-v|xtensa]: Update `rmt defconfig for Espressif's SoCs
Adds the `CONFIG_SYSTEM_IRTEST` macro to enable building the
`irtest` application.

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
2026-04-24 11:09:41 +08:00
Alan Carvalho de Assis
e5efaf9f5d boards: Fix modbus configs after moving it to apps/industry
The modbus was moved to inside apps/industry, so these defconfigs
need to be updated

Signed-off-by: Alan C. Assis <acassis@gmail.com>
2026-04-20 08:35:15 +02:00
Tiago Medicci Serrano
b28d60947a boards/xtensa/esp32/esp32-devkitc: Fix psram_usrheap defconfig
When both CONFIG_ESP32_SPIRAM and  CONFIG_ESP32_SPIRAM_USER_HEAP
are selected, the device must not select CONFIG_NSH_ARCHINIT.
Instead, CONFIG_BOARD_LATE_INITIALIZE must be selected. This is
necessary because the SPI flash initialization disables the cache,
and only internal memory is then accessible. So, if the  SPI flash
initialization is performed by the entry task (nsh_main, a regular
task), it would use the user heap to allocate memory, which would
cause a system crash when the cache is disabled. On the other hand,
by selecting CONFIG_BOARD_LATE_INITIALIZE, a kernel thread is
dedicated to perform the initialization, and the cache can be
safely disabled.

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
2026-04-14 09:21:17 +02:00
Vlad Pruteanu
ad168fdf2d arch/xtensa/esp32: Add support for hardware accelerated PBKDF2
This adds support for the PBKDF2 algorithm in the ESP32 crypto
driver. Here, it will take advantage of the hardware-accelerated
implementation of SHA.

Signed-off-by: Vlad Pruteanu <pruteanuvlad1611@yahoo.com>
2026-04-10 20:32:46 +08:00
Eren Terzioglu
da74bb3088 boards/xtensa/esp32: Fix nvblk defconfig
Refresh nvblk defconfig

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2026-04-09 20:14:44 +08:00
Piyush Patle
0dccc8ba21 include/debug.h: Move to include/nuttx/debug.h
debug.h is a NuttX-specific, non-POSIX header. Placing it in the
top-level include/ directory creates naming conflicts with external
projects that define their own debug.h.
This commit moves the canonical header to include/nuttx/debug.h,
following the NuttX convention for non-POSIX/non-standard headers,
and updates all in-tree references.

A backward-compatibility shim is left at include/debug.h that
emits a deprecation #warning and re-includes <nuttx/debug.h>,
allowing out-of-tree code to continue building while migrating.

Signed-off-by: Piyush Patle <piyushpatle228@gmail.com>
2026-04-07 07:50:06 -03:00
Piyush Patle
703726849f espressif/rmt: guard lirc board registration with DRIVERS_RC
The common ESP board RMT bring-up files are built whenever ESP_RMT is
enabled, but the esp_lirc declarations are only visible when DRIVERS_RC
is enabled.

Guard the esp_lirc header include and esp_lirc_rx_initialize() /
esp_lirc_tx_initialize() calls with CONFIG_DRIVERS_RC so non-RC ESP
configs continue to build while keeping the LIRC registration path for
the rmt configs.

Signed-off-by: Piyush Patle <piyushpatle228@gmail.com>
2026-04-04 11:18:32 -03:00
Piyush Patle
140f2c1c78 docs/rc: document RC/LIRC drivers and remove empty drivers/rmt files
Add documentation for the RC/LIRC character driver subsystem covering
device registration, the LIRC interface, and usage from user space.

Remove placeholder empty files under drivers/rmt that were left over
from the rmtchar era and are no longer referenced.

Signed-off-by: Piyush Patle <piyushpatle228@gmail.com>
2026-04-04 11:18:32 -03:00
Piyush Patle
7b590f9c43 espressif/rmt: replace rmtchar with arch-specific lirc adapter
Replace the ESP-specific rmtchar upper-half with arch-local esp_lirc
adapters for Xtensa and RISC-V.

 This moves the RMT upper-half out of drivers/rmt, registers LIRC
 devices from the ESP board bring-up paths, and removes the old common
 rmtchar driver and headers.

 Also update the ESP Kconfig and build wiring to build esp_lirc when
 ESP_RMT and DRIVERS_RC are enabled.

 Fixes discovered during hardware validation:
  - register TX as /dev/lirc1 so RX and TX do not collide
  - parse the RX worker thread argument from the correct argv slot
  - keep RX devices from advertising TX capability

Signed-off-by: Piyush Patle <piyushpatle228@gmail.com>
2026-04-04 11:18:32 -03:00
Tiago Medicci Serrano
9028fe72c7 ci: split xtensa jobs into three separate jobs (instead of two)
This is necessary because new defconfig were recently added to
Xtensa-based Espressif SoCs and the build job may exceed 2 hours.
In order to avoid increasing job timeout, a specific job for each
supported SoC (ESP32, ESP32-S2 and ESP32-S3) was created instead.

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
2026-03-29 00:33:11 +08:00
Tiago Medicci Serrano
c17e16eaed xtensa/espressif: Update common-source integration for Xtensa devices
This commit updates the common-source integration for Xtensa-based
Espressif devices (ESP32, ESP32-S2, and ESP32-S3). This is part of a larger
common-source update split by architecture for better maintainability.

Major components updated:
- IRQ allocator refactoring with intr_alloc integration
- Common-source drivers (GPIO, RMT, I2C, SPI, UART, etc.)
- Espressif components upgrade to release/master.b-test
- Peripheral drivers (ADC, PWM, LEDC, MCPWM, PCNT, Temperature Sensor, etc.)
- Wireless adapters (Wi-Fi and BLE)
- esp_timer migration to the common-source path for Xtensa devices
- Common-source power management implementation (auto-sleep and wakeup paths)
- Board defconfigs for all Xtensa Espressif boards
- SMP support improvements for ESP32-S3
- Critical section handling improvements

Key architectural changes:
- IRQ Allocator: The new interrupt allocator enables multiple mapping
  options from interrupt sources to CPU interrupts, providing flexibility
  required by modern peripherals. Although this introduces breaking changes
  to the interrupt handling API, the required ARCH_MINIMAL_VECTORTABLE
  Kconfig option is explicitly checked during startup to ensure proper
  configuration. This validation prevents runtime issues from configuration
  mismatches.
- Xtensa-specific interrupt handling via esp_xtensa_intr.c providing
  NuttX-native implementations of xt_ints_on/off and interrupt handlers,
  avoiding conflicts with NuttX's core Xtensa macros.
- Timer/RTC unification: ESP32/ESP32-S2/ESP32-S3 move from chip-specific
  RTC/RT-timer code to common-source Espressif integration, including
  esp_timer_adapter/esp_rtc paths and the required bringup/defconfig updates.
- Power management consolidation: Xtensa PM follows the common-source
  implementation, including common-source auto-sleep behavior, UART/Wi-Fi
  wakeup coordination, and tickless-safe sleep flow compatibility.

Note: This is a large commit to maintain bisectability. Breaking the
changes into smaller commits would result in non-building intermediate
states across the common-source infrastructure update.

Tested configurations:
- All defconfigs were tested, including `ostest`.

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
2026-03-29 00:33:11 +08:00
Huang Qi
e3eeaefd6d style: Fix "the the" typo across the codebase.
Fix 269 occurrences of duplicate "the" word typo found in 209 files
across source code, header files, and configuration.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2026-03-23 11:07:49 +01:00
Filipe Cavalcanti
2554d210a5 boards/xtensa: fix optional item on spiflash config
Removes optional keyword causing selection to fail on the
automatic bringup of SPI flash device.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2026-03-19 17:46:28 +08:00
Filipe Cavalcanti
1630b483d2 boards/xtensa: add option to disable SPI Flash MTD automatic bringup
The ESP32*_SPIFLASH_AUTO_BRINGUP option allows disabling automatic bringup.
This causes /dev/mtdblock0 to show up instead of always mounting a file system.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2026-03-18 10:16:38 +08:00
Filipe Cavalcanti
cb5ce48b56 board/xtensa/esp32: add SPI defconfig
Add SPI defconfig for ESP32-DevKit-C.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2026-02-20 14:56:54 +01:00
Filipe Cavalcanti
bcfa8ddf77 board/xtensa/esp32: add GPIO defconfig
Add a GPIO defconfig for ESP32-DevKit-C.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2026-02-20 14:56:54 +01:00
Filipe Cavalcanti
dda9e037c2 boards/xtensa/esp32: add I2C defconfig and update board source
Add I2C defconfig to esp32-devkitc board and update some board
ifdefs.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2026-02-20 14:56:54 +01:00
hujun5
5db4278173 protect: move us_heap to userspace_data_s
Refactor heap pointer storage by moving us_heap field from userspace_s
to the nested userspace_data_s structure, enabling future extensibility
of user-space data without modifying the core userspace_s interface across
all board-specific implementations.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-02-02 11:06:53 +08:00
Laczen JMS
27542b3b09 boards/xtensa/esp32: remove alignments for simpleboot
The simpleboot format does not require alignment sections to be
inserted as they are added by esptool.py

Signed-off-by: Laczen JMS <laczenjms@gmail.com>
2026-01-30 11:18:02 -03:00
nuttxs
fa2d2b8898 boards/xtensa: fixes for compilation and start-up issues when legacy
boot mode is configured

1. Explicitly define the .rtc_reserved section to ensure RTC data
that requires fixed address is correctly placed and does not
conflict with other sections
2. When legacy boot is configured, vecbase must also be set and
clear the BSS section
3. Cache must be disabled during Flash operations, so all
Flash-operation-related functions must be placed in IRAM
(internal RAM). Update the linker script for legacy boot mode

Signed-off-by: nuttxs <zhaoqing.zhang@sony.com>
2026-01-26 19:22:14 -03:00
Laczen JMS
88f62fd322 boards/xtensa/esp32: add rtc_reserved_seg to legacy_sections
Enable building the legacy idf format of nuttx when rtc is enabled.
Without this addition the build fails because the rtc data is placed in
rom.

Signed-off-by: Laczen JMS <laczenjms@gmail.com>
2026-01-21 00:39:12 +08:00
Alan Carvalho de Assis
e20d4912ff boards/esp32/heltec_wifi_lora32: Add support to SX1276
This commit adds support to SX1276 transceiver on Heltec WiFi LoRa32
board.

Signed-off-by: Alan C. Assis <acassis@gmail.com>
2025-12-22 10:22:36 +08:00
Alan Carvalho de Assis
30a7420349 boards/esp32: Add initial support to heltec_wifi_lora32
This commit adds basic/initial support to Heltec WiFi LoRa32 board.

Signed-off-by: Alan C. Assis <acassis@gmail.com>
2025-12-21 15:18:08 -03:00
zhanghongyu
aa8ffea3cf netdev_upperhalf: convert Kconfig to variable
Upperhalf supports multiple working modes at the same time,
which is specified by NIC when register

Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
2025-12-14 10:01:22 +08:00
Filipe Cavalcanti
3a74b82e09 arch/xtensa: flash encryption support for ESP32|S2|S3
Deprecates ESP32_STORAGE_MTD_ENCRYPT and ESP32_OTA_PARTITION_ENCRYPT options.
Add ESPRESSIF_SECURE_FLASH_ENC_ENABLED Kconfig option.
Updates SPI Flash driver to handle encryption automatically.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-12-11 11:29:26 +01:00
Filipe Cavalcanti
680766d304 arch/xtensa: update SPI Flash driver for ESP32-S2|S3
Updates the SPI Flash driver used for user storage MTD.
Moves ESP32 and ESP32S3 to use common driver.
Updates KConfig options to keep backwards compatibility.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-10-29 09:44:55 -04:00
Vlad Pruteanu
8a10e35c0b arch/xtensa/esp32: Fix support for hardware accelerated AES
Curently, the driver code for HW accelerated AES is not usable
since it's not registered within esp32_crypto. This commit fixes
it as well as a few bugs.

Signed-off-by: Vlad Pruteanu <pruteanuvlad1611@yahoo.com>
2025-10-24 11:20:04 -03:00
Filipe Cavalcanti
58cdb9cfea boards/xtensa: optimize linker script IRAM section
Improve IRAM usage.
- Remove unnecessary E-Fuse sources;
- Optimizing (ESP32) and add (S2|S3) libpp(Wi-Fi related).

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-10-23 20:34:59 +08:00
chao an
87f134cfaa sched/sleep: replace all Signal-based sleep implement to Scheduled sleep
Nuttx currently has 2 types of sleep interfaces:

1. Signal-scheduled sleep: nxsig_sleep() / nxsig_usleep() / nxsig_nanosleep()
Weaknesses:
a. Signal-dependent: The signal-scheduled sleep method is bound to the signal framework, while some driver sleep operations do not depend on signals.
b. Timespec conversion: Signal-scheduled sleep involves timespec conversion, which has a significant impact on performance.

2. Busy sleep: up_mdelay() / up_udelay()
Weaknesses:
a. Does not actively trigger scheduling, occupy the CPU loading.

3. New interfaces: Scheduled sleep: nxsched_sleep() / nxsched_usleep() / nxsched_msleep() / nxsched_ticksleep()
Strengths:
a. Does not depend on the signal framework.
b. Tick-based, without additional computational overhead.

Currently, the Nuttx driver framework extensively uses nxsig_* interfaces. However, the driver does not need to rely on signals or timespec conversion.
Therefore, a new set of APIs is added to reduce dependencies on other modules.

(This PR also aims to make signals optional, further reducing the code size of Nuttx.)

Signed-off-by: chao an <anchao.archer@bytedance.com>
2025-10-17 14:05:02 +08:00
Filipe Cavalcanti
eb00c1317d boards/xtensa: add support for init script on ESP32-S2|S3
Adds support for init script on ESP32 and ESP32-S2.
Moves the scripts of ESP32-S3 from board specific to
board common (they are the same).

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-09-19 07:18:54 -03:00
Filipe Cavalcanti
662c1e0bbb boards/xtensa: update board and defconfigs for Wi-Fi on ESP32|S2|S3
Updates the defconfigs and board source to support driver refactor.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-09-14 10:41:15 +08:00
nuttxs
d09b6a9f51 boards/xtensa: fix the issue of undefined symbol reference errors
occurring during compilation and linking phase when the configuration
(CONFIG_ESP32S3_APP_FORMAT_LEGACY=y) is enabled.

---
undefined reference to _esp_system_init_fn_array_start
undefined reference to _esp_system_init_fn_array_end
undefined reference to __init_array_start
undefined reference to __init_array_end
---

Signed-off-by: nuttxs <zhaoqing.zhang@sony.com>
2025-09-10 10:56:16 -03:00
Filipe Cavalcanti
ed751889de arch/xtensa/esp32: Update E-Fuse driver
Updates E-Fuse driver for ESP32, now sharing a common implementation across Xtensa devices.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-09-06 14:46:32 -03:00
Filipe Cavalcanti
1d51cfbda7 arch/xtensa: add sys_startup_fn call
Adds SYS_STARTUP_FN which calls constructors and init functions on
common source code. Requires compatibility changes on linker script.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-09-06 14:46:32 -03:00
Eren Terzioglu
a316636dcf boards/xtensa: Revert mdtblock initialization for esp32[-|-s2|-s3]
boards/risc-v: Revert mdtblock initialization for Xtensa based Espressif devices

Signed-off-by: Eren Terzioglu <eren.terzioglu@espressif.com>
2025-08-15 16:42:46 -03:00
Laczen JMS
c506c25f19 drivers/mtd: introduce nvblk
NVBLK provides a block device that operates on top of a non volatile
memory (as a mtd device) that enables wear levelling for non volatile
memory. It's operation is similar to the dhara wear levelling library,
but nvblk is meant to be used on smaller (nor, mram, rram) memory.

I am also the author and maintainer of the nvblk library.

A block device can be created during startup by using:
```
nvblk_initialize(0, mtd, CONFIG_MTD_NVBLK_DEFAULT_LBS,
                         CONFIG_MTD_NVBLK_DEFAULT_IOBS,
                         CONFIG_MTD_NVBLK_DEFAULT_SPEB);
```
and a fat filesystem on top of this as:
```
nsh> mkfatfs /dev/mtdblock0
nsh> mount -t vfat /dev/mtdblock0 /mnt
```
this fat filesystem can then be used:
```
nsh> echo "test" > /mnt/test.txt
nsh> cat test.txt
test
nsh>
```

Signed-off-by: Laczen JMS <laczenjms@gmail.com>
2025-08-06 01:53:56 +08:00
Martin Vajnar
150854c6f2 ESP_PCNT: add high and low limit Kconfig options
Signed-off-by: Martin Vajnar <martin.vajnar@gmail.com>
2025-07-22 13:09:02 -03:00
Filipe Cavalcanti
3f8cde728d boards/xtensa: fixes SPI Flash for MCUBoot usage
Fixes partitions for MCUBoot usage.

Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
2025-07-22 10:55:08 -03:00