Commit graph

681 commits

Author SHA1 Message Date
zhanghongyu
a7567677a8 netdev_driver: add carrier_on to xxx_ifup where carrier_on is absent
since the judgment for network card selection was changed from IS_UP to
IS_RUNNING, drivers that lack carrier_on need to add the carrier_on
operation; otherwise, network access issues will occur.

Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
2026-02-02 13:23:05 +08:00
wangmingrong1
4429e3d3ea arch/arm64: Delete the default save for SCTLR
Currently, the SCTLR register is only used to switch the thread MTE state and has no other uses. Because saving this register is special, it will take a long time after testing, so the default saving behavior is deleted.

Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2026-02-02 11:13:21 +08:00
Jukka Laitinen
fdaeb00910 arch/imx9/enet: Move imx9_phy_boardinitialize to "ifup" phase
Move the board-specific phy initialization from early boot into ifup phase. The
board specific phy initialization may need to implement delays, or bus
communication, for example via i2c bus.

These OS services are not necessarily available yet in arm64_netinitialize, and
PHY initialization is not necessary until the driver actually starts using it.
In addition, this allows the board to reset the ethernet phy at every ifup,
if needed for error recover.

Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
2026-02-01 09:41:50 -03:00
Jukka Laitinen
15fa005e5b arch/imx9/enet: Correct configuration flag IMX9_ENET1_PHYINIT
The function is for any ethernet interface, given as paramter to the function,
it is not for ENET1 only. The correct name is already used
in the code, but the Kconfig had it wrong.

Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
2026-02-01 09:41:50 -03:00
hujun5
bb562cf8bf arch/armv8-r64: userspace PMU access
Enable ARCH_HAVE_PERF_EVENTS_USER_ACCESS capability for Cortex-R82 to
allow userspace applications to directly access hardware performance
counters. Move up_perf_gettime() outside kernel-only block so it can
be called from userspace for efficient profiling.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-27 21:57:37 +08:00
wangzhi16
364a633ec3 sched/signal: Optimize code logic
Adjust the up_schedule_sigaction function to facilitate subsequent spinlock optimization work.

Signed-off-by: wangzhi16 <wangzhi16@xiaomi.com>
2026-01-27 21:24:31 +08:00
hujun5
6c18cfd472 fvp: change memory map and Optimize MPU configuration
Extract fixed MPU region configuration into arm64_mpu_init_regiions() function to
allow board-specific initialization. Refactor memory layout to minimize fixed region
requirements and improve dynamic MPU configuration flexibility for FVP platform.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-26 20:59:04 +08:00
hujun5
4d956952c1 arch/arm64/src/common/arm64_mpu.h: simplified macro definition
Reduce macro definition duplication by consolidating REGION_*_ATTR macros into a unified
SHAREABLE_MSK definition. This improves code maintainability and reduces configuration
complexity while preserving all attribute functionality.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-26 20:59:04 +08:00
hujun5
41847b7445 arm64_mpu: Make the MPU interface of cortex-r82 consistent with other archs.
Refactor mpu_modify_region() and mpu_configure_region() functions to use direct parameters
(base, size, flags) instead of struct pointers. This ensures consistent interface across
all ARM64 MPU implementations including Cortex-R82, improving code uniformity.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-26 20:59:04 +08:00
hujun5
386457440a arm64_mpu.h: rename some MPU ATTR
Rename MPU region attribute macros (REGION_RAM_ATTR → REGION_RW_NA_ATTR,
REGION_URAM_ATTR → REGION_RW_RW_ATTR) to explicitly indicate access permissions.
Add new REGION_RO_RO_ATTR and REGION_RO_NA_ATTR macros for read-only region definitions.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-26 20:59:04 +08:00
hujun5
0383808b32 arm64/gic: remove GIC single security state configuration check
According to ARM GIC documentation, GICD_CTLR.DS bit is read-only and cannot be
modified by software. Remove the unnecessary runtime check that attempts to set this bit
for CONFIG_ARCH_SINGLE_SECURITY_STATE configuration, simplifying the GIC initialization flow.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-26 19:43:54 +08:00
hujun5
e9c33195a3 arm64: add mpu_usedregion interface
Add mpu_usedregion() function to query the number of MPU regions currently in use.
This interface complements existing mpu_allocregion() and mpu_freeregion() functions,
allowing callers to determine the occupancy of the MPU region pool.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-26 19:43:54 +08:00
hujun5
7d30afa589 arm64: enable mpu background region
Enable SCTLR_EL1.BR bit to activate MPU background region support. This simplifies MPU
configuration by providing a default MAIR attribute for unmapped regions, reducing the
need for exhaustive region coverage and improving MPU flexibility.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-26 19:43:54 +08:00
hujun5
78d05ff811 arm64: remove busy wait flag
Replace CONFIG_ARM64_SMP_BUSY_WAIT_FLAG_ADDR with global variable g_smp_busy_wait_flag for
SMP CPU synchronization. This improves flexibility over fixed memory addresses and aligns
with standard kernel variable patterns for multi-core startup.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-26 16:27:19 +08:00
hujun5
415be7f5b3 fvp-v8r: protect build support
Enable fvp_userspace.c compilation when
CONFIG_BUILD_PROTECTED is enabled, providing user-space
isolation support for FVP platform. Include
board memory map definitions for protected build
configuration and update MPU regions for
kernel/user space separation.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-26 16:27:19 +08:00
hujun5
be9d0665e4 arm64: support protectbuild
Add CONFIG_BUILD_PROTECTED support alongside
CONFIG_BUILD_KERNEL for saved register
pointers and task startup functions. Fix
arm64_fork() to properly handle Thumb bit masking.
Enable weak_function for up_allocate_kheap()
to support board-specific heap allocation.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-26 16:27:19 +08:00
trns1997
9159f6e353 build/cmake: Add toolchain C++ library linking for all platforms.
Extend CONFIG_LIBCXXTOOLCHAIN support to all remaining platforms
in CMake builds by explicitly locating and linking libstdc++.a
from the toolchain. This prevents build failures caused by STL
header/library mismatches where toolchain headers are included
without the corresponding library.
* Adds nuttx_find_toolchain_lib() calls for all platforms.
* Aligns CMake behavior with Make build system.

Signed-off-by: trns1997 <trns1997@gmail.com>
2026-01-24 19:30:21 +08:00
yinshengkai
5892554984 arch/arm64: fix backtrace return address precision
The return address stored in the frame should point to the instruction
after the call. To get the actual call site, we need to subtract the
instruction size (sizeof(void *)) from the saved return address.

This ensures that backtrace addresses correctly point to the calling
instruction rather than the next instruction.

Signed-off-by: yinshengkai <yinshengkai@bytedance.com>
2026-01-23 16:33:01 +08:00
hujun5
a3273e6a96 arch: Add stack alignment and stack size checking when CONFIG_TLS_ALIGNED=y
Add validation to ensure allocated stack size does not exceed TLS_MAXSTACK when
CONFIG_TLS_ALIGNED is enabled, and verify proper stack alignment using STACK_ALIGN_MASK
across all architectures. This improves stack safety and prevents potential TLS overflow conditions.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-22 22:18:11 +08:00
hujun5
b0cb4e5968 arm64: add MPU-based address environment support and refactor MMU variant
Rename arm64_addrenv.c to arm64_addrenv_mmu.c to separate MMU-specific logic.
Add new arm64_addrenv_mpu.c with stub implementations of address environment
functions for MPU-based systems. Enable address environment support in FVP ARMv8-R
Kconfig to support kernel stacks in protected mode. Conditionally build MPU or
MMU address environment code based on CONFIG_ARCH_USE_MMU/CONFIG_ARCH_USE_MPU.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-22 15:39:34 +08:00
hujun5
14e5d8a995 arm64: fix mpu_freeregion
The limit register contains the enable/disable bit for the MPU region,
so it must be written first before writing the base register to ensure
proper region disable operation.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-22 15:39:00 +08:00
hujun5
6f03601169 arch: rename STACK_ALIGNMENT to STACKFRAME_ALIGN across all architectures
Rename STACK_ALIGNMENT macro to STACKFRAME_ALIGN throughout the codebase
to provide clearer naming semantics. The new name better reflects the macro's
purpose of frame alignment rather than general stack alignment.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-22 15:37:24 +08:00
hujun5
63e59e26c0 arch: move some macros to public code.
Move stack alignment and kernel stack macros from architecture-specific internal
headers to public include/nuttx/irq.h. Consolidates duplicate definitions across
17 architecture families, reducing code duplication while enabling common code
to access these core alignment utilities without architecture dependencies.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-20 01:53:08 +08:00
xuxin19
00e79122af cmake(enhance):cmake support DYNLIB build
add `DYNLIB` option for nuttx_add_application for dynamic loadable lib

Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2026-01-19 14:45:37 +08:00
xuxin19
a7c6f589f9 cmake(bugfix):fix sim loadable elf build support
1.add sanity check for START_OBJS
2.make laodable -e entry setting in each arch elf.cmake
3.add sim elf.cmake

Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2026-01-19 14:45:37 +08:00
xuxin19
63dc48e713 cmake kernel build(bugfix): remove unused section in elf link
this will reduce the size of elf

Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2026-01-19 14:45:37 +08:00
xuxin19
6fa3031d9b cmake(feat):define elf option and enable apps module build
1.define elf option setting function ext;
2.unify loadable elf and kernel elf build config

Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2026-01-19 14:45:37 +08:00
hujun5
8bb250a4c0 arch: move STACK_ALIGNMENT to irq.h
Move STACK_ALIGNMENT macro definitions from architecture-specific internal
headers to public irq.h headers. This enables common code to directly access
STACK_ALIGNMENT without requiring internal header inclusion, improving code
organization and reducing header dependencies. Applies to all architectures:
ARM, ARM64, AVR, HC, MIPS, or1k, Renesas, RISC-V, SIM, SPARC, TriCore, x86,
x86_64, Xtensa, Z16, and Z80.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-19 14:43:43 +08:00
wangmingrong1
d757fe06f1 arm64/toolchain: fix compile warnning
Configuration/Tool: qemu-armv8a/mte
5282026-01-16 13:11:30
529------------------------------------------------------------------------------------
530  Cleaning...
531  Configuring...
532  Building NuttX...
533Makefile:142: target 'arm64_hwdebug.o' given more than once in the same rule
534Makefile:142: target 'arm64_hwdebug.o' given more than once in the same rule
535Makefile:142: target 'arm64_hwdebug.o' given more than once in the same rule
536Makefile:142: target 'arm64_hwdebug.o' given more than once in the same rule
537Makefile:142: target 'arm64_hwdebug.o' given more than once in the same rule
538

Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2026-01-19 14:27:02 +08:00
hujun5
7e02f08a83 arm64: fix stack pointer initialization when CONFIG_STACK_COLORATION disabled
Add else clause to advance stack pointer (x24) by SMP_STACK_SIZE when
CONFIG_STACK_COLORATION is not defined in ARM64 boot code. Ensures each
CPU's stack is properly skipped in multi-core initialization even when
stack coloration/validation is disabled, preventing stack corruption from
overlapping CPU stacks.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-18 23:05:37 +08:00
wangchengdong
d3f89c2661 arch/arm64: Add support to disable signals actions related data struct
Add support to disable signals actions related struct

Co-authored-by: guoshichao <guoshichao@xiaomi.com>
Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
2026-01-18 08:24:13 -03:00
hujun5
657ac8317e arch: fix addrenv_switch changing this_task causing exceptions
After addrenv_switch(), the current running task (this_task) may change due to
deferred work execution. Update all architecture interrupt, syscall, and exit
handlers to re-fetch tcb = this_task() after addrenv_switch(). Ensures scheduler
and context operations use the correct TCB, preventing context corruption and
exceptions across SMP and memory-protected builds.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-17 18:23:06 -03:00
ligd
113bb02568 checkstack: fix access overflow when checkstack
We should check length first, and then check the value

Signed-off-by: ligd <liguiding1@xiaomi.com>
2026-01-17 18:04:28 -03:00
hujun5
13d1092939 arm64: add missing REG_SCTLR_EL1 initialization in signal processing
Add REG_SCTLR_EL1 system register initialization in arm64_init_signal_process
when setting up register context for signal handlers. Initialize with current
sctlr_el1 value and apply CONFIG_ARM64_MTE settings if enabled. Fixes regression
where signal handler context was missing critical system control register setup.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-17 14:13:55 +08:00
Ari Kimari
fb7e5c5618 arch/imx9: Modify default ddr config handling
Remove default ddr config
Add imx9_ddr_config() function  to return default config

Signed-off-by: Ari Kimari <ari.kimari@tii.ae>
2026-01-17 11:41:57 +08:00
hujun5
6f87c092a1 arm: support AMP mode with GIC SGI inter-core interrupts
Enable SGI (Software Generated Interrupts) usage in AMP mode for inter-core
communication. Modify arm_cpu_sgi() to use SGI_TGTFILTER_LIST for both SMP and
AMP modes instead of requiring CONFIG_SMP. Add CPU0-only guard checks using
sched_getcpu() to ensure arm_gic0_initialize() executes only once on CPU0 during
initialization in both SMP and AMP configurations.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-16 14:05:24 -03:00
ligd
c000974700 arm64: fix compile failed
CC:  mm_heap/mm_mallinfo.c chip/bcm2711_serial.c: In function 'bcm2711_miniuart_attach':
chip/bcm2711_serial.c:571:3: error: implicit declaration of function 'up_prioritize_irq' [-Werror=implicit-function-declaration]
  571 |   up_prioritize_irq(BCM_IRQ_VC_AUX, 0);
      |   ^~~~~~~~~~~~~~~~~
CC:  mm_heap/mm_memalign.c chip/bcm2711_gpio.c: In function 'bcm2711_gpio_irqs_init':
chip/bcm2711_gpio.c:275:7: error: implicit declaration of function 'up_prioritize_irq' [-Werror=implicit-function-declaration]
  275 |       up_prioritize_irq(g_gpio_irqs[i], 0);
      |       ^~~~~~~~~~~~~~~~~
cc1: all warnings being treated as errors

Signed-off-by: ligd <liguiding1@xiaomi.com>
2026-01-16 10:26:58 -05:00
hujun5
79b6d27018 arm64: fix SP_EL0 register handling in syscall return path
Use regs[REG_SP_EL0] from register context instead of direct sp_el0 system
register read/write operations in arm64_syscall(). Replace read_sysreg(sp_el0)
with regs[REG_SP_EL0] and write_sysreg(usp, sp_el0) with direct assignment to
regs[REG_SP_EL0]. Ensures userspace stack pointer is correctly maintained from
register context during signal delivery, preventing userspace SP corruption on
syscall return.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-16 21:34:41 +08:00
hujun5
ad3abcd277 arm64: g_mpu_region need support SMP
Convert g_mpu_region from single-CPU global variable to per-CPU array indexed
by this_cpu(). Change declaration from "unsigned int g_mpu_region" to
"unsigned int g_mpu_region[CONFIG_SMP_NCPUS]". Update all accesses in
mpu_allocregion(), mpu_freeregion(), and mpu_modify_region() to use
g_mpu_region[this_cpu()] for proper per-CPU MPU region tracking in multi-core
configurations.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-16 20:37:25 +08:00
hujun5
ffb4c101d8 arm64: fix FIQ mask initialization in task state
Add FIQ bit (DAIF_FIQ_BIT) initialization to SPSR register when creating new
ARM64 tasks. By default, FIQ interrupts are masked unless CONFIG_ARM64_DECODEFIQ
is enabled. Ensures consistent FIQ masking behavior across all task contexts.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-16 20:37:17 +08:00
lipengfei28
efedf48cde arch/arm64: use up_prioritize_irq and up_set_type_irq instead
arm64_gic_irq_set_priority

use use up_prioritize_irq and up_set_type_irq as std api

Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2026-01-16 20:26:14 +08:00
lipengfei28
ddb797b0ab arch/arm64: add api to config irq type
arm64 add api to config irq type

Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2026-01-16 20:26:14 +08:00
hujun5
2a08860a08 arch/arm64: fix backtrace register access and gdbstub config guard
Fix arm64_backtrace to access TCB register context directly instead of using
running_regs(), which may not reflect the actual context being backtraced.
Add CONFIG_ARCH_HAVE_DEBUG guard to prevent undefined references in non-debug builds.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-16 08:55:47 -03:00
hujun5
ac8a61d70b arm64: add the interrupt status in the syscall
Set interrupt status flag in tpidr_el1 register (bit 0 set to 1) when entering
syscall handler to indicate IRQ-in-progress state, and clear it when exiting
to properly track kernel execution context across all code paths.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2026-01-16 08:55:07 -03:00
guoshichao
ba63a4d234 ghs: fix the UsageFault:INVSTATE error triggered by exception_common
when we build with greenhills compiler, if the exception_common function
is put into a separate section: ".text.exception_common", then the
address of exception_common function is an even number, for example "0x16a6c",
in this case, it will trigger the UsageFaults:INVSTATE error.
The reason for this error is that in the GHS compiler, a section declared
through the ".section" directive must specify at least the "a" attribute.
Otherwise, this section will not be linked into the final file, and this
is why the address of exception_common function is invalid.
The following is the official explanation in the GHS compiler documentation:
"The reason for this error is that in the GHS compiler, a section
declared through the .section directive must specify at least the "a"
attribute. Otherwise, this section will not be linked into the final
file. The following is the official explanation in the documentation:
"Sections that are intended be part of the final linked output should
have at least the `a` attribute"
and for GHS compiler, the .text section is recommended specify the
attribute of `ax`.

Signed-off-by: guoshichao <guoshichao@xiaomi.com>
2026-01-16 09:41:13 +08:00
anjiahao
0a2b01950c sched:use tcb_s inside of task_tcb_s , remove all cast
Simplify the code and remove different tcb

Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2025-12-22 17:55:45 +08:00
Yanfeng Liu
c38042941f arch/crt0.c: revert entry _start
This reverts crt0.c entry name to _start to fix LTO issue/17443,
needs apps/ side pull/3235.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2025-12-10 19:06:04 +08:00
lipengfei28
84d99b7329 arch/arm64: fix create page table err
arm64 only PA_BITS=52 level 0 can be used as BlockDescriptors

Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2025-12-09 20:25:02 +08:00
Jukka Laitinen
2e9a43571a arch/imx9/ethernet: Add a configuration option to use HPWORK queue
Add an option to use HPWORK queue for ethernet driver, to reduce
delays if more time critical messaging via ethernet is wanted.

Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
2025-12-01 10:20:29 -03:00
ouyangxiangzhen
d335cce43a arch/arm64: Add clkdev driver for generic timer.
This commit added clkdev driver for arm64 generic timer.

Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
2025-11-24 19:43:07 +08:00