Gregory Nutt
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0a32db5e05
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SAMA5: Delay loop calibrated; Correct sense of the RED LED
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2013-07-31 11:44:30 -06:00 |
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Gregory Nutt
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b0045bc7e2
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SAMA5: Add an NSH configuration of the SAMA5D3x-EK board
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2013-07-31 10:46:13 -06:00 |
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Gregory Nutt
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8413d3f837
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SAMA5: Add an NSH configuration of the SAMA5D3x-EK board
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2013-07-31 10:46:13 -06:00 |
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Gregory Nutt
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5470fc54e6
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SAMA5: Add an NSH configuration of the SAMA5D3x-EK board
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2013-07-31 10:46:13 -06:00 |
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Gregory Nutt
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ffdd034c35
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SAMA5: Add an NSH configuration of the SAMA5D3x-EK board
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2013-07-31 10:46:13 -06:00 |
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Gregory Nutt
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8695c89aa4
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SAMA5: Modification of some CPSR-related inline functions
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2013-07-31 09:11:24 -06:00 |
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Gregory Nutt
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aa1e0dfe2f
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SAMA5: Modification of some CPSR-related inline functions
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2013-07-31 09:11:24 -06:00 |
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Gregory Nutt
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7dfef5e22e
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SAMA5: Modification of some CPSR-related inline functions
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2013-07-31 09:11:24 -06:00 |
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Gregory Nutt
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db20c5fc43
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Fix Cortex-A CPSR register field definition
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2013-07-30 19:05:24 -06:00 |
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Gregory Nutt
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fde3777e9e
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Fix Cortex-A CPSR register field definition
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2013-07-30 19:05:24 -06:00 |
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Gregory Nutt
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794e22fba7
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SAMA5: Change mapping of vector tables to work around that fact that I don't understand how the AXI MATRIX remap works
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2013-07-30 16:19:52 -06:00 |
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Gregory Nutt
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391d300d4d
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SAMA5: Change mapping of vector tables to work around that fact that I don't understand how the AXI MATRIX remap works
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2013-07-30 16:19:52 -06:00 |
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Gregory Nutt
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bfa1a9545b
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SAMA5: Change mapping of vector tables to work around that fact that I don't understand how the AXI MATRIX remap works
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2013-07-30 16:19:52 -06:00 |
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Gregory Nutt
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1204756506
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ARMv7-A: Add cp15_disable_dcache(); SAMA5: nor_main.c no disables MMU and caches; Should not remap ISRAM to address 0x0 unless we booted into ISRAM
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2013-07-30 13:20:33 -06:00 |
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Gregory Nutt
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16371b50e4
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ARMv7-A: Add cp15_disable_dcache(); SAMA5: nor_main.c no disables MMU and caches; Should not remap ISRAM to address 0x0 unless we booted into ISRAM
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2013-07-30 13:20:33 -06:00 |
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Gregory Nutt
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8bfdf70766
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ARMv7-A: Add cp15_disable_dcache(); SAMA5: nor_main.c no disables MMU and caches; Should not remap ISRAM to address 0x0 unless we booted into ISRAM
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2013-07-30 13:20:33 -06:00 |
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Gregory Nutt
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a141d8fb87
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The last bit of a previous commit was still in the editor
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2013-07-30 12:07:51 -06:00 |
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Gregory Nutt
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b2da68028e
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The last bit of a previous commit was still in the editor
|
2013-07-30 12:07:51 -06:00 |
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Gregory Nutt
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6f99994722
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More DAC changes from John Wharington
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2013-07-30 11:41:53 -06:00 |
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Gregory Nutt
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c4c222ca3a
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More DAC changes from John Wharington
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2013-07-30 11:41:53 -06:00 |
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Gregory Nutt
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2faa069f82
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Add ARMv7-A irqdisable() inline function
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2013-07-30 11:37:09 -06:00 |
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Gregory Nutt
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b75a0cf8be
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Add ARMv7-A irqdisable() inline function
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2013-07-30 11:37:09 -06:00 |
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Gregory Nutt
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2c6b370c4a
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Add ARMv7-A irqdisable() inline function
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2013-07-30 11:37:09 -06:00 |
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Gregory Nutt
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84150fd7ed
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STM32 F3 I2C driver from John Wharington
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2013-07-30 10:35:17 -06:00 |
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Gregory Nutt
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5a94767c52
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STM32 F3 I2C driver from John Wharington
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2013-07-30 10:35:17 -06:00 |
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Gregory Nutt
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4bdcceb3b3
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STM32 DAC DMA fixes from John Wharington
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2013-07-30 08:54:32 -06:00 |
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Gregory Nutt
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b57f54fbd0
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STM32 DAC DMA fixes from John Wharington
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2013-07-30 08:54:32 -06:00 |
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Gregory Nutt
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7f0eacc754
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SAMA5: More cache and mmu inline utility functions
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2013-07-29 19:57:15 -06:00 |
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Gregory Nutt
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547f9be80f
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SAMA5: More cache and mmu inline utility functions
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2013-07-29 19:57:15 -06:00 |
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Gregory Nutt
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413aba0bf5
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SAMA5: More cache and mmu inline utility functions
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2013-07-29 19:57:15 -06:00 |
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Gregory Nutt
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95998c715f
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SAMA5: Separate cache operations into separate files
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2013-07-29 18:38:02 -06:00 |
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Gregory Nutt
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36b1cd0a6b
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SAMA5: Separate cache operations into separate files
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2013-07-29 18:38:02 -06:00 |
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Gregory Nutt
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fec43ffc3b
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Changes to ARMv7-A boot logic to handle the case where we execute out of NOR FLASH
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2013-07-29 17:54:56 -06:00 |
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Gregory Nutt
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f658bcdb13
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Changes to ARMv7-A boot logic to handle the case where we execute out of NOR FLASH
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2013-07-29 17:54:56 -06:00 |
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Gregory Nutt
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5351598323
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Changes to ARMv7-A boot logic to handle the case where we execute out of NOR FLASH
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2013-07-29 17:54:56 -06:00 |
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Gregory Nutt
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58b59e721f
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SAMA5: Add a little NuttX debug program to help debugger programs in NOR flash
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2013-07-29 13:57:32 -06:00 |
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Gregory Nutt
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1728594259
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SAMA5: Add a little NuttX debug program to help debugger programs in NOR flash
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2013-07-29 13:57:32 -06:00 |
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Gregory Nutt
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4e90fae5e8
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Add SAMA5 HSMC register definitions and logic to reconfigure the NOR FLASH
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2013-07-29 10:56:21 -06:00 |
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Gregory Nutt
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76164452ff
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Add SAMA5 HSMC register definitions and logic to reconfigure the NOR FLASH
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2013-07-29 10:56:21 -06:00 |
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Gregory Nutt
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f96c6793b9
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Add SAMA5 HSMC register definitions and logic to reconfigure the NOR FLASH
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2013-07-29 10:56:21 -06:00 |
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Gregory Nutt
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27a9da98f4
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SAMA5: Add file structure to support board-specific initialization of NOR flash
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2013-07-29 07:41:53 -06:00 |
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Gregory Nutt
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c24670de36
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SAMA5: Add file structure to support board-specific initialization of NOR flash
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2013-07-29 07:41:53 -06:00 |
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Gregory Nutt
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4ba648aaae
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SAMA5: Add file structure to support board-specific initialization of NOR flash
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2013-07-29 07:41:53 -06:00 |
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Gregory Nutt
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65c8abddb8
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SAMA5: The ostest configuration have been converted to run out of NOR flash. There is more to be done, however
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2013-07-28 15:07:35 -06:00 |
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Gregory Nutt
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afdd9a7416
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SAMA5: The ostest configuration have been converted to run out of NOR flash. There is more to be done, however
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2013-07-28 15:07:35 -06:00 |
|
Gregory Nutt
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9a94a3707c
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SAMA5: The ostest configuration have been converted to run out of NOR flash. There is more to be done, however
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2013-07-28 15:07:35 -06:00 |
|
Gregory Nutt
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7dfabf3507
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SAMA5: Correct a clock configuration bug; clarify some MMU memory types
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2013-07-28 12:44:06 -06:00 |
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Gregory Nutt
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7dc8dd4b50
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SAMA5: Correct a clock configuration bug; clarify some MMU memory types
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2013-07-28 12:44:06 -06:00 |
|
Gregory Nutt
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f191ac94c0
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SAMA5: Correct vector mapping
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2013-07-28 09:44:11 -06:00 |
|
Gregory Nutt
|
263678e05b
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SAMA5: Correct vector mapping
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2013-07-28 09:44:11 -06:00 |
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