esp_rtc_rdalarm() computed tv_sec and tv_nsec from two separate
evaluations of esp_hr_timer_time_us() + offset + deadline. The
high-resolution timer advances between the two calls, so a read that
straddles a second boundary yields an inconsistent timespec.
Compute the microsecond value once into a local variable and derive
both fields from that single snapshot.
Signed-off-by: yushuailong <yyyusl@qq.com>
The RWDT register offsets were incorrectly set to ESP32-S3 values
instead of ESP32 values. This was introduced when the code was
refactored from using the local NuttX header hardware/esp32_rtccntl.h
(which had the correct offsets) to using the HAL library headers, and
the offsets were moved inline into esp32_wdt.c with wrong values.
Correct the offsets to match the actual ESP32 register layout from
soc/rtc_cntl_reg.h (RTC_CNTL_WDTCONFIG0_REG at 0x8c, INT_ENA at
0x3c, etc). Without this fix, all RWDT operations (enable, configure
timeout, enable interrupt, acknowledge interrupt, feed, write-protect)
were targeting wrong memory addresses, rendering the RWDT completely
non-functional.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
Under the BOARD_LATE_INITIALIZE boot flow, rtc_clk_xtal_freq_get()
may return 0 (SOC_XTAL_FREQ_AUTO) because the XTAL frequency has
not yet been stored to the RTC register when the WDT driver is
initialized. This causes rtc_clk_cal() to divide by zero
internally (EXCCAUSE=0006) when computing the RTC slow clock
period.
Fix by explicitly calling rtc_clk_xtal_freq_update() with the
board's configured crystal frequency if rtc_clk_xtal_freq_get()
returns 0. Also add a guard in esp32_wdt_settimeout() to return
-EIO if ESP32_RWDT_CLK() still returns 0 cycles/ms, preventing
a subsequent divide-by-zero when computing the maximum timeout.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
Same issue as ESP32-S3/S2: with BOARD_LATE_INITIALIZE, the
constructor function enable_timer_group0_for_calibration() resets
Timer Group 0 registers after board_late_initialize() has
configured the MWDT0 prescaler, causing the watchdog to fire at an
incorrect rate.
Re-apply the prescaler, timeout, and feed the WDT counter in
esp32_wdt_start() just before enabling the timer.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
Same issue as ESP32-S3: with BOARD_LATE_INITIALIZE, the constructor
function enable_timer_group0_for_calibration() resets Timer Group 0
registers after board_late_initialize() has configured the MWDT0
prescaler, causing the watchdog to fire at an incorrect rate.
Re-apply the prescaler, timeout, and feed the WDT counter in
wdt_lh_start() just before enabling the timer.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
With the BOARD_LATE_INITIALIZE flow, board_late_initialize() runs
on a kernel thread and sets the MWDT0 prescaler. However, after it
returns, the init task (NSH) is spawned and lib_cxx_initialize()
invokes constructor functions, including
enable_timer_group0_for_calibration() from esp-hal-3rdparty which
calls timg_ll_reset_register(0), resetting all Timer Group 0
registers (including the WDT prescaler) back to their defaults.
Re-apply the prescaler, timeout, and feed the WDT counter in
wdt_lh_start() just before enabling the timer. This ensures
correct WDT configuration regardless of any intermediate register
resets by external code.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
Now that time_t is unconditionally 64-bit (signed int64_t) and the
struct timespec fields tv_sec / tv_nsec are wide enough on their own,
the explicit (uint64_t)/(int64_t)/(int) casts that used to guard the
multiplications and subtractions in *_us / *_ms / *_ns helpers are no
longer needed. Drop them to keep the timekeeping math readable and
consistent with the previous sclock_t/time_t cleanup.
In the same spirit, this commit also:
* Normalises the printf-style format specifiers and casts used to
print tv_sec / tv_nsec / tv_usec values across arch/, drivers/,
fs/, sched/ and libs/. The prior code was a mix of
"%d"/"%u"/"%ld"/"%lu"/"%lld"/PRIu32/PRIu64 with matching
(int)/(unsigned long)/(long long)/PRIu* casts; some formats
truncated time_t on 32-bit hosts, others mismatched signedness or
width. Replace all such cases with the portable POSIX-recommended
forms:
- tv_sec (time_t, signed, impl-defined width) -> %jd + (intmax_t)
- tv_nsec (long, signed) -> %ld (no cast)
- tv_usec (suseconds_t / long) -> %ld (no cast)
Add #include <stdint.h> where required.
* Drops a few stale `(FAR const time_t *)&ts.tv_sec` casts and
related `(FAR struct tm *)` / `(const time_t *)` casts in
gmtime_r() / localtime_r() / gmtime() callers; ts.tv_sec is plain
time_t now and the casts only obscured the type.
* Fixes one overflow in fs/procfs/fs_procfscritmon.c where
all_time.tv_sec * 1000000 could overflow on 32-bit time_t before
being multiplied again; cast to uint64_t at the start.
No behavioural change.
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
POSIX leaves the signedness of time_t and clock_t unspecified, but
mainstream implementations (Linux glibc/musl, the BSDs, macOS, RTEMS,
Zephyr's POSIX layer, Windows _time64) expose time_t as signed 64-bit.
NuttX has historically used uint64_t only because it was tied to the
CONFIG_SYSTEM_TIME64 knob; with that gone, switch:
time_t : uint64_t -> int64_t
clock_t : uint64_t -> int64_t
CLOCK_MAX: UINT64_MAX -> INT64_MAX
This lets (time_t)-1 sentinels, negative tick deltas, and host-side
headers behave as on every other POSIX system without source churn.
Headers updated:
- include/sys/types.h, include/limits.h, include/nuttx/clock.h
- include/nuttx/fs/hostfs.h (nuttx_time_t alias)
- include/nuttx/{mqueue.h,wdog.h,wqueue.h,timers/clkcnt.h}
Because clock_t is now signed 64-bit, the NuttX-internal sclock_t
alias becomes redundant: every sclock_t/SCLOCK_MAX use is folded
back to clock_t/CLOCK_MAX (notably in sched/wdog, sched/mqueue,
sched/sched, sched/clock, sched/timer, libs/libc/time, fs/vfs and
the drivers/arch consumers below).
Tick/period constants (NSEC_PER_SEC, USEC_PER_SEC, MSEC_PER_SEC,
SEC_PER_MIN, ...) in include/nuttx/clock.h are retyped from "long"
literals to INT64_C(...) so that 64-bit arithmetic no longer
depends on the host's long width.
Strip now-redundant (time_t)/(clock_t)/(unsigned long) casts and
unsigned-only branches across the tree:
- arch RTC / oneshot / tickless lowerhalfs:
arm: cxd56xx, efm32, imxrt, lc823450, max326xx, sam34, sama5,
samd5e5, samv7, stm32, stm32f7, stm32h7, stm32l4, stm32wb,
xmc4
mips: pic32mz sparc: bm3803 x86_64: intel64
risc-v/xtensa: espressif (esp_i2c[_slave], esp_rtc,
esp32c3{_i2c,_rtc,_wifi_adapter}, esp32{,s2,s3}_*),
mpfs_perf
- drivers: audio/tone, input/aw86225, power/pm/{activity,
stability}_governor, rpmsg/rpmsg_ping,
timers/{ds3231,mcp794xx,pcf85263,rx8010},
wireless/ieee80211/bcm43xxx, wireless/spirit/spirit_spi
- core: fs/vfs/{fs_poll,fs_timerfd}, mm/iob/iob_alloc,
libs/libc/{netdb/lib_dnscache,time/{lib_calendar2utc,
lib_time}}, net/icmp/icmp_pmtu, net/icmpv6/icmpv6_pmtu,
net/ipfrag, net/tcp/{tcp.h,tcp_timer},
net/utils/net_snoop, net/mld/mld_query (drop the now-dead
mld_mrc2mrd helper since signed math handles it directly),
sched/clock/{clock,clock_initialize},
sched/sched/{sched_profil,sched_setparam,sched_setscheduler},
sched/pthread/pthread_create,
sched/wdog/{wd_gettime,wd_start,wdog.h},
sched/timer/timer_gettime, sched/mqueue/*
Flip the few in-tree printf format strings that assumed an
unsigned 64-bit tv_sec:
* drivers/rpmsg/rpmsg_ping.c PRIu64 -> PRId64
* arch/xtensa/src/esp32{,s2,s3}/esp32*_oneshot_lowerhalf.c
PRIu32 (already wrong) -> PRId64
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
The 32-bit system clock has a limited range (~497 days) and the
configuration knob is no longer worth the complexity given that
practically every modern target already enables it. Make 64-bit
time_t/clock_t/sclock_t/nuttx_time_t the only supported flavor.
Specifically:
- Drop the SYSTEM_TIME64 Kconfig option and its dependent
PERF_OVERFLOW_CORRECTION/HRTIMER guards in sched/Kconfig.
- Remove every #ifdef CONFIG_SYSTEM_TIME64 branch in headers
(include/{sys/types.h,limits.h,inttypes.h,nuttx/clock.h,
nuttx/fs/hostfs.h}) and core code paths
(sched/clock/clock.h, drivers/power/pm/pm_procfs.c,
drivers/rpmsg/rpmsg_ping.c, fs/procfs/fs_procfsuptime.c,
libs/libc/wqueue/work_usrthread.c,
arch/avr/src/avrdx/avrdx_timerisr_tickless_alarm.c).
- Strip CONFIG_SYSTEM_TIME64=y from every board defconfig.
- Update Documentation/guides/rust.rst accordingly.
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
BREAKING CHANGE: remove PWM_MULTICHAN option
PWM_MULTICHAN option is redundant, we can just set CONFIG_PWM_NCHANNELS > 1.
At default CONFIG_PWM_NCHANNELS is set to 1, so the default behavior is preserved.
Access to single channel API is now `info->channels[0].XXX` instead of `info->XXX`
This is the first step to simplify PWM implementation and make it more portable.
Signed-off-by: raiden00pl <raiden00@railab.me>
The goal is to only execute recipes when there is an actual change in
the prerequisites.
There are several issues which cause the nuttx binary target to be
re-made every time the top level make is run.
1. Previously the target nuttx$(EXEEXT), was used, but make resolved
this in the relative directory make -C $(ARCH_SRC), and couldn’t find
it (need an absolute path: `$(TOPDIR)/..).
2. The .tmp prerequisite for nuttx was always deleted
3. libboard's recipe had a sub-make which may or may not update that
target. This was a phony target, and was therefore always considered out
of date.
These issues were causing the nuttx recipe to be run every make, which
was hiding some missing prerequisites:
1. the .config is a prerequisite for the .tmp target
2. libapps.a (and other linklibs) are pre-requisites for nuttx
Changes:
The changes are only in the build system, and only for arm.
Track nuttx$(EXEEXT) via vpath so Make knows when it's already up to
date without an explicit path. Add $(TOPDIR)/.config as a dependency
to the linker script preprocessing so config changes trigger
re-preprocessing.
Keep the .tmp linker script on disk (clean already removes it) so
timestamp-based dependency checking works across builds. These .tmp
files need to be added to the gitignore or the CI will complain.
Use FORCE pattern for board/libboard to ensure it's always checked
but use the actual library file as the link dependency so nuttx is
only re-linked when library content changes. Add staging libs as
dependency to nuttx link rule so changed app libs trigger re-link.
Signed-off-by: Liam Hickey <williamhickey@geotab.com>
After recent changes on the event handler for the RISC-V-based
Espressif SoCs, the same set of changes were ported back to xtensa
devices.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
In esp_espnow_pktradio.c, after ESP-NOW is successfully initialized in espnow_ifup, call netdev_carrier_on(dev).
In espnow_ifdown, call netdev_carrier_off(dev).
Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
The PR #18654 removed the Kconfig option `RMT_LOOP_TEST_MODE` used
by Espressif's RMT peripheral. This commit reintroduces it as a
lower-half driver interface used to enable internal loopback tests.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
- fix a "a label can only be part of a statement and
a declaration is not a statement" compile error.
- toolchain xtensa-esp32s3-elf-gcc
(crosstool-NG esp-2021r2) 8.4.0
Signed-off-by: Shunchao Hu <ankohuu@gmail.com>
During startup we should avoid using _info since the system is not
fully initialized. Default to use ets_printf which is safe for
this scenario.
Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
When ESP32's flat build mode is selected with the external PSRAM
on USER_HEAP mode, the ROM strdup internally calls malloc which may
be mapped to a different heap than lib_free, causing cross-heap
allocation issues and system crashes.
This commit adds a new Kconfig option ESP32_DONT_USE_ROM_LIBC to
allow using NuttX libc instead of ROM newlib functions. When
USER_HEAP mode is selected, this option is automatically enabled.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
In ESP32-S3 flat build with USER_HEAP mode, ROM strdup internally calls
malloc which may be mapped to a different heap than lib_free, causing
cross-heap allocation issues and system crashes.
This commit adds a new Kconfig option ESP32S3_DONT_USE_ROM_LIBC to
allow using NuttX libc instead of ROM newlib functions. When USER_HEAP
mode is selected, this option is automatically enabled.
Fixes: 60ca804b56 ("esp32s3: Fix bug related to the PSRAM-allocated task stack")
Signed-off-by: 461911662 <461911662@qq.com>
Reviewed-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
Reviewed-by: Almir Okato <almir.okato@espressif.com>
Reviewed-by: Eren Terzioglu <eren.terzioglu@espressif.com>
Wi-Fi used a locally allocated vector_desc, so those CPU interrupt lines
were never recorded in the HAL non_iram_int_mask.
During SPI flash, esp_intr_noniram_disable() therefore did not mask them,
and Wi-Fi ISRs could still run with the cache off.
Now, Wi-Fi IRQs are treated as non-IRAM and get masked while flash/cache is suspended.
Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
Replace direct putreg32/getreg32 register accesses in esp32s3_cam.c
with cam_ll_* inline functions from Espressif's esp_hal_cam component.
This reduces maintenance burden by using the vendor-provided HAL
abstraction instead of raw register manipulation.
Changes:
- Add lcd_cam_dev_t *hw pointer to driver struct
- Use cam_ll_start/stop/reset/fifo_reset for CAM control
- Use cam_ll_get_interrupt_status/clear_interrupt_status for ISR
- Use cam_ll_set_recv_data_bytelen for DMA buffer length
- Use cam_ll_select_clk_src/set_group_clock_coeff for clock config
- Use cam_ll_enable_vsync_filter/set_vsync_filter_thres
- Use cam_ll_enable_vsync_generate_eof/enable_rgb_yuv_convert
- Use struct access for interrupt enable (cam_ll_enable_interrupt
requires __DECLARE_RCC_ATOMIC_ENV not available in NuttX)
- Add esp_hal_cam include paths to hal.mk
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
This adds support for the PBKDF2 algorithm in the ESP32 crypto
driver. Here, it will take advantage of the hardware-accelerated
implementation of SHA.
Signed-off-by: Vlad Pruteanu <pruteanuvlad1611@yahoo.com>
Implement imgdata_ops alloc/free callbacks so the V4L2 framework
can use MMAP mode to allocate frame buffers with proper GDMA
alignment. This lets applications avoid hardcoding platform-
specific alignment values.
- Add esp32s3_cam_alloc() using kmm_memalign with the alignment
derived from the GDMA external memory block size setting.
- Add esp32s3_cam_free() wrapper around kmm_free.
- Introduce ESP32S3_CAM_EXT_MEMBLK / ESP32S3_CAM_DMA_ALIGN macros
so the block size enum and byte alignment are defined in one
place and stay in sync automatically.
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
Fix several issues in the ESP32-S3 CAM driver:
- stop_capture: reset DMA channel, CAM module and AFIFO under
spinlock to fully quiesce hardware before returning. Clear
pending VSYNC interrupt to prevent stale ISR firing.
- uninit: reset CAM/AFIFO before releasing DMA to prevent
in-flight transfers after channel detach. Use esp_teardown_irq
with correct peripheral ID (ESP32S3_PERIPH_LCD_CAM) instead of
irq_detach which corrupts the shared IRQ mapping table. Mask
interrupts and clear pending flags under spinlock before
detaching handler.
- uninit: preserve XCLK output so the sensor remains accessible
via I2C for subsequent re-initialization.
- set_buf/uninit: track driver-allocated vs user-provided frame
buffers with fb_allocated flag to prevent double-free when
using V4L2 USERPTR mode.
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
Protect the common Espressif Wi-Fi netdev RX queue with a spinlock. The Wi-Fi RX callback enqueues packets while the netdev upper-half RX thread dequeues them, and the IOB queue helpers are not internally serialized.
Under sustained receive traffic that race can corrupt the queue state, strand IOBs, and degrade throughput over time as reported in issue #16915.
Initialize the lock during device setup and use it when clearing the queue on ifup, enqueueing received packets, and dequeuing them for the upper half.
Signed-off-by: aviralgarg05 <gargaviral99@gmail.com>
debug.h is a NuttX-specific, non-POSIX header. Placing it in the
top-level include/ directory creates naming conflicts with external
projects that define their own debug.h.
This commit moves the canonical header to include/nuttx/debug.h,
following the NuttX convention for non-POSIX/non-standard headers,
and updates all in-tree references.
A backward-compatibility shim is left at include/debug.h that
emits a deprecation #warning and re-includes <nuttx/debug.h>,
allowing out-of-tree code to continue building while migrating.
Signed-off-by: Piyush Patle <piyushpatle228@gmail.com>
esp_ws2812.h exposes esp_ws2812_setup() with a struct rmt_dev_s * argument
but did not include esp_rmt.h directly.
After guarding the LIRC board registration path with CONFIG_DRIVERS_RC,
non-RC ESP configs no longer pulled in the RMT type indirectly and CI
started failing with an incomplete struct rmt_dev_s declaration.
Include esp_rmt.h in the Xtensa and RISC-V ws2812 headers.
Signed-off-by: Piyush Patle <piyushpatle228@gmail.com>
Add documentation for the RC/LIRC character driver subsystem covering
device registration, the LIRC interface, and usage from user space.
Remove placeholder empty files under drivers/rmt that were left over
from the rmtchar era and are no longer referenced.
Signed-off-by: Piyush Patle <piyushpatle228@gmail.com>
Replace the ESP-specific rmtchar upper-half with arch-local esp_lirc
adapters for Xtensa and RISC-V.
This moves the RMT upper-half out of drivers/rmt, registers LIRC
devices from the ESP board bring-up paths, and removes the old common
rmtchar driver and headers.
Also update the ESP Kconfig and build wiring to build esp_lirc when
ESP_RMT and DRIVERS_RC are enabled.
Fixes discovered during hardware validation:
- register TX as /dev/lirc1 so RX and TX do not collide
- parse the RX worker thread argument from the correct argv slot
- keep RX devices from advertising TX capability
Signed-off-by: Piyush Patle <piyushpatle228@gmail.com>
The I2S BCLK frequency is calculated as:
bclk = sample_rate * total_slot * data_width
Previously, total_slot was always taken from the static config
(esp_i2s0_config / esp_i2s1_config), which is hardcoded to 2.
This is correct for mono and stereo, but wrong for TDM modes
with more than 2 channels (e.g. 4-channel recording with ES7210).
With 4 channels but total_slot=2, the BCLK is only half of what
it should be, causing the actual sample rate to be half of the
requested rate (e.g. requesting 16 kHz actually samples at 8 kHz).
Replace priv->config->total_slot with MAX(priv->channels, 2) in
all three BCLK calculation sites (i2s_check_mclkfrequency and
i2s_set_clock for both master and slave paths). The MIN of 2
preserves the I2S protocol requirement that at least 2 slots
exist even for mono, while correctly scaling for multi-channel
TDM configurations.
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
Fix multiple bugs in the I2S RX receive path on ESP32-S3 with GDMA:
- Set streaming=true in i2s_rxdma_start so completed buffers are not
incorrectly marked AUDIO_APB_FINAL
- Restore up_enable_irq calls for DMA interrupt after esp_dma_load
resets the channel
- Skip i2s_hal_rx_reset/rx_reset_fifo on ESP32-S3 which clears the
TDM slot configuration set by i2s_configure
- Accept 1-16 RX channels on ESP32-S3 (was limited to 2)
- Add getreg32 read-back after DMA start to flush CPU write buffer
- Auto-stop RX channel when no pending buffers remain, preventing
hardware from running without DMA descriptors after stop
- Remove duplicate return OK in i2s_rxdma_start
- Fix i2s_ll_tx_enable_mono_mode to i2s_ll_rx_enable_mono_mode in
i2s_rxchannels
- Fix tx_slot_cfg.std to rx_slot_cfg.std in RX PCM slot config
- Fix DMA direction, peripheral ID, data_width, rx_start sequencing,
and rx_eof_num word count in RX path
- Fix esp32s3_board_i2s.c I2S port index
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
- Remove debug polling loop from esp32s3_cam_start_capture() that
busy-waited on DMA status register.
- Fix DMA ISR race: stop DMA before invoking capture callback to
prevent ISR re-triggering while callback processes the buffer.
Check priv->capturing before restarting DMA in ISR.
- Move DMA descriptors from struct to heap allocation, avoiding
stack/BSS alignment issues with cache-line-aligned descriptors.
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
This commit updates the common-source integration for Xtensa-based
Espressif devices (ESP32, ESP32-S2, and ESP32-S3). This is part of a larger
common-source update split by architecture for better maintainability.
Major components updated:
- IRQ allocator refactoring with intr_alloc integration
- Common-source drivers (GPIO, RMT, I2C, SPI, UART, etc.)
- Espressif components upgrade to release/master.b-test
- Peripheral drivers (ADC, PWM, LEDC, MCPWM, PCNT, Temperature Sensor, etc.)
- Wireless adapters (Wi-Fi and BLE)
- esp_timer migration to the common-source path for Xtensa devices
- Common-source power management implementation (auto-sleep and wakeup paths)
- Board defconfigs for all Xtensa Espressif boards
- SMP support improvements for ESP32-S3
- Critical section handling improvements
Key architectural changes:
- IRQ Allocator: The new interrupt allocator enables multiple mapping
options from interrupt sources to CPU interrupts, providing flexibility
required by modern peripherals. Although this introduces breaking changes
to the interrupt handling API, the required ARCH_MINIMAL_VECTORTABLE
Kconfig option is explicitly checked during startup to ensure proper
configuration. This validation prevents runtime issues from configuration
mismatches.
- Xtensa-specific interrupt handling via esp_xtensa_intr.c providing
NuttX-native implementations of xt_ints_on/off and interrupt handlers,
avoiding conflicts with NuttX's core Xtensa macros.
- Timer/RTC unification: ESP32/ESP32-S2/ESP32-S3 move from chip-specific
RTC/RT-timer code to common-source Espressif integration, including
esp_timer_adapter/esp_rtc paths and the required bringup/defconfig updates.
- Power management consolidation: Xtensa PM follows the common-source
implementation, including common-source auto-sleep behavior, UART/Wi-Fi
wakeup coordination, and tickless-safe sleep flow compatibility.
Note: This is a large commit to maintain bisectability. Breaking the
changes into smaller commits would result in non-building intermediate
states across the common-source infrastructure update.
Tested configurations:
- All defconfigs were tested, including `ostest`.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
Fix 269 occurrences of duplicate "the" word typo found in 209 files
across source code, header files, and configuration.
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
Add ESP32-S3 CAM controller driver implementing the NuttX imgdata
interface. Supports 8-bit DVP camera input with DMA-based frame
capture, VSYNC interrupt handling, and PSRAM frame buffer allocation.
The driver is sensor-agnostic: resolution and pixel format are
negotiated at runtime through the V4L2 pipeline. XCLK output
(24 MHz) is started during initialization for sensor communication.
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
This commits adds a function that can be implemented by any vendor
to allow SoC-specific functions to be called by `up_initialize`.
Please note that `up_initialize` is provided by the arch level, but
it doesn't allow SoC-specific initialization. Although it could be
possible to run such initialization on board-level, semantically
it isn't related to the board, but with the SoC. As an example of
such implementation, some SoCs require RTC subsystem initialization
to occur before the OS is completely initialized.
Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
The esp32_spi_poll_exchange() function previously used a hardcoded
length of sizeof(uint32_t) (4 bytes) for memcpy() operations and
pointer increments, disregarding the actual remaining transfer_size.
When an SPI transaction involved a data length not aligned to 4 bytes
(such as a 1-byte payload commonly used in sub-GHz radio drivers),
the driver forced a 4-byte memory transfer. This caused out-of-bounds
reads and writes, leading to stack smashing and fatal CPU exceptions
(e.g., EXCCAUSE=0000).
This patch resolves the memory corruption vulnerability by:
1. Calculating a precise `chunk` size for each iteration, strictly
bounded by the remaining `transfer_size`.
2. Limiting the memcpy() operations and the subsequent pointer
increments (tp and rp) to this exact chunk size.
3. Zero-initializing the temporary TX register (w_wd) before copying
to clear padding and prevent reading uninitialized memory.
4. Adding a NULL check for the receive pointer (rp) prior to the
memcpy operation to prevent unintended memory writes.
Signed-off-by: Chip L. <chplee@gmail.com>
When using a key that is longer than the block size of the hashing
algorithm used, the key must be hashed before it is used.
Signed-off-by: Vlad Pruteanu <pruteanuvlad1611@yahoo.com>
Intermediate files of make depend like .ddc and .dds may remain
when make is interrupted. Remove them using make distclean.
Signed-off-by: SPRESENSE <41312067+SPRESENSE@users.noreply.github.com>
The benefits of doing this are:
1. It makes the code logic clearer, with different resources protected by different locks.
2. It improves system responsiveness and avoids contention issues caused by acquiring the same large lock.
Signed-off-by: wangzhi16 <wangzhi16@xiaomi.com>
