When stdio buffering is disabled, fgetc/getchar on stdin always returned EOF
because fs_cookie and fs_oflags were left uninitialized and lib_fread_unlocked
bails out on (fs_oflags & O_RDOK) == 0.
Fix this by moving the initialization of the fs_cookie and fs_oflags outside the
CONFIG check; these fields need to be initialized regardless of
CONFIG_STDIO_DISABLE_BUFFERING.
In addition, initializing stream[i].fs_iofunc pointers to NULL is redundant
since the task group is allocated with kmm_zalloc/group_zalloc. Zero
allocation was already assumed on fs_flags, so remove the unnecessary code.
Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
On a cache miss arp_find() returns the MAC of any interface holding the
address, ignoring the egress device. Two interfaces on one subnet then
leave the peer unreachable until the entry is relearned.
Assisted-by: Claude Code:claude-opus-5
Signed-off-by: Felipe Moura <moura.fmo@gmail.com>
The -EINPROGRESS path jumps over the netdev_unlock() below it, so the
caller waits holding d_lock. The receive path needs that same lock to
dispatch the ARP reply, and the interface stalls for good.
Assisted-by: Claude Code:claude-opus-5
Signed-off-by: Felipe Moura <moura.fmo@gmail.com>
esp_reconnect_work_cb() dereferences g_sta_reconnect, which is only
declared under ESP_WLAN_HAS_STA, so CONFIG_ESPRESSIF_WIFI_SOFTAP alone
fails to compile. Guard the callback as the Xtensa counterpart does.
Assisted-by: Claude Code:claude-opus-5
Signed-off-by: Felipe Moura <moura.fmo@gmail.com>
For kernel builds where CONFIG_ARCH_TEXT_VBASE is set to 0, allow a NULL
buffer in file_readv() to prevent ELF binary loading failures for
binaries located at address 0.
This fix was originally introduced in #18830, but was inadvertently
reverted by someone unaware that platforms with CONFIG_ARCH_TEXT_VBASE
equal to 0 cannot function at all without it. This commit restores the
necessary check to prevent regressions in zero-based text kernel
configurations. Most platforms remain completely unaffected since only
about 5 boards utilize a text virtual base of zero.
Signed-off-by: Lwazi Dube <lwazeh@gmail.com>
* According to strdup(3) manual strdup() allocates memory with malloc(3)
and that memory should be released with free(3) when no longer needed.
* For non existent path or file open error mkversion used exit() with no
prior free() for allocated memory.
* This change introduces ret variable, exit label, and free on exit in order
to avoid potential memory leak.
* tools/mkversion is a tiny short-lived utility and the memory gets freed
by the OS upon application termination so that was not a bit issue, but now
memory leak scanners should be happy as we have free() in pair to strdup().
Reported-by: xjDeng.
Signed-off-by: Tomasz 'CeDeROM' CEDRO <tomek@cedro.info>
Expose the bundled LAME and libmad headers to the sim:alsa arch target and include LAME through its installed public header name. This lets the CMake build compile sim_offload.c without relying on host codec development packages.
Assisted-by: Zed:GPT-5.6 Terra
Signed-off-by: Marco Casaroli <marco.casaroli@gmail.com>
SPI_VIA_IOMUX used SPI2 IOMUX pin macros that are undefined when SPI2
is disabled or on chips without IOMUX SPI pins (e.g. ESP32-P4), so the
driver took the IOMUX path and never routed SPI3 via the GPIO matrix.
Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
The `rx_pin` configuration when `CONFIG_S32K3XX_FLEXCAN2` is defined is
overwritten if `PIN_CAN2_ENABLE` is defined, breaking the flexcan config
for S32K3 MCU.
Signed-off-by: Javier Alonso <javieralonso@geotab.com>
The `rx_pin` configuration when `CONFIG_KINETIS_FLEXCAN2` is defined is
overwritten if `PIN_CAN2_ENABLE` is defined, breaking the flexcan config
for Kinetis MCU. Additionally, the `.enable_high` configuration points to
a non-defined constant/macro (looks like a legacy from the first driver
definition). Based on regularly maintained drivers (such as s32k3), this
was changed to `CAN2_ENABLE_OUT`
Signed-off-by: Javier Alonso <javieralonso@geotab.com>
The `rx_pin` configuration when `CONFIG_S32K1XX_FLEXCAN2` is defined is
overwritten if `PIN_CAN2_ENABLE` is defined, breaking the flexcan config
for S32K1 MCU. Additionally, the `.enable_high` configuration points to
a non-defined constant/macro (looks like a legacy from the first driver
definition). Based on regularly maintained drivers (such as s32k3), this
was changed to `CAN2_ENABLE_OUT`
Signed-off-by: Javier Alonso <javieralonso@geotab.com>
Rename abi "x86-softfloat" to just "softfloat" to enable compatibility
with newer rust nightly versions.
Rust recently changed the name of the softfloat abi to one more unified
across targets, and more recently, removed the compat alias.
Signed-off-by: Kay Lambdadelta <lambdadeltakay@proton.me>
Change the arch/mips/src/Makefile to build nuttx with CONFIG_ALLSYMS
enabled in MIPS architecture. This enables symbol name showing in
system, such as 'dumpstack 3' shows both functions name and addresses.
This change is referred to arch/tricore/src/Makefile and updated to
work well with MIPS. And it works with and without CONFIG_ALLSYMS enabled.
Fixes apache#19728
Signed-off-by: wangtao <twangpicasso@gmail.com>
Replace the iLLD helpers IfxCpu_resetAndStartCounters() and
IfxCpu_getClockCounter() in the performance-counter path with direct
CSR accesses via tricore_mtcr()/tricore_mfcr().
tricore_reset_ccnt() disables the CPU cycle counter (CPU_CCTRL), clears
CPU_CCNT, then re-enables it; up_perf_gettime() reads CPU_CCNT directly.
This removes the arch/tricore perf path's dependency on the Infineon
iLLD layer. No behavior change.
Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
Replace the iLLD register structures (Ifx_CPU_PCON0/1/2, Ifx_CPU_DCON0/1/2)
and the IfxCpu_cfg.h cache-size/line-size macros in the cache path with
direct CSR accesses via tricore_mtcr()/tricore_mfcr() and locally defined
PCON/DCON bit masks. Also switch __isync()/__dsync() to the UP_ISB()/
UP_DSB() barrier wrappers.
This removes the arch/tricore cache path's dependency on the Infineon
iLLD layer. No behavior change.
Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
Add tricore_mtcr()/tricore_mfcr() inline-assembly wrappers for the
MTCR/MFCR (move to/from Core Special Function Register) instructions.
These let arch/tricore code access CSRs directly without relying on the
Infineon iLLD intrinsics, and are used by the following iLLD-removal
change in the performance-counter path.
Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
cromfs_read()'s fast path decompresses a block directly into the
caller's buffer whenever a read reaches a block at its start and the
caller has room for the whole decompressed block, bypassing the
per-file decompression cache (ff_buffer). It nonetheless marked that
block as cached by setting ff_offset, without ever writing ff_buffer
itself.
A later read of the same block that fell onto the slow path trusted
that false cache tag, skipped decompression, and copied from
ff_buffer without it ever having been populated for that block. A
repeated identical fast-path read of the same block hit the same
false tag and skipped decompression entirely, leaving the caller's
buffer untouched and returning whatever was already there.
Fixed by having the fast path only read the cache, never populate it:
reuse ff_buffer when a prior slow-path read already cached the same
block, otherwise decompress straight into the caller's buffer without
touching ff_offset/ff_buffer.
Co-authored-by: Pavlo
Assisted-by: Claude Code:claude-sonnet-5
Signed-off-by: alexcekay <alexander@auterion.com>
romfs_cachenode() tracked the allocated size of rn_child in a uint8_t
while rn_count is a uint16_t. Past 256 entries the size wraps to zero,
the grow condition rn_count == num - 1 can never be true again and the
array is not reallocated: entries are written beyond the allocation,
corrupting the heap.
Track the allocated size in a size_t.
Signed-off-by: raiden00pl <raiden00@railab.me>
Assisted-by: Claude Code
Correct the number of GPIO ports (STM32_NPORTS) from 8 to 9 and include
GPIOI in the g_gpiobase array. Also fix the comparison that would
prevent the GPIOI clock from being enabled (this is really a no-op,
though).
Signed-off-by: Darryl Ring <darryl@bluerobotics.com>
The signal frame was built inside the 128 byte red zone of the
interrupted user code and inherited its stack alignment, so a leaf
function could lose live data to the siginfo copy and the handler
could fault on an SSE access. Build the frame below the red zone,
16 byte aligned; the naked trampoline calls the handler itself and
its call provides the return address slot.
Signed-off-by: raiden00pl <raiden00@railab.me>
Assisted-by: Claude Code
For a thread interrupted in user mode the trampoline ran on the user
stack, where the signal handler then grows over its frame. Run it on
the thread kernel stack, unused while the thread is in user mode. The
stack cannot be selected from the saved CS: up_initial_state() records
the caller CS, a kernel selector even for user threads.
Signed-off-by: raiden00pl <raiden00@railab.me>
Assisted-by: Claude Code
SYS_signal_handler_return restored RSP from saved_rsp, which is not
written when a task signals itself: synchronous dispatch skips
up_schedule_sigaction(), so the kernel stack pointer was set to zero
and the next push faulted. Save the kernel stack pointer at dispatch
in xcp.kstkptr, as risc-v does, and restore that.
Signed-off-by: raiden00pl <raiden00@railab.me>
Assisted-by: Claude Code
Initialize i2c_ll_hw_cmd_t in sendstart/startrecv so ack_exp/done are
not left with stack garbage that can NACK or skip the address byte.
Program i2c_hal_set_bus_timing() with the requested bus_freq instead of
the board default so msg frequency is applied.
Affects only Espressif devices.
Co-authored-by: Cursor <cursoragent@cursor.com>
Signed-off-by: Filipe Cavalcanti <filipe.cavalcanti@espressif.com>
RGBTO8 shifted each component up before masking:
(((uint8_t)(r) << 5) & 0xe0)
The cast is promoted to int before the shift, so the mask keeps bits 5:7
of the shifted value, which are bits 0:2 of r. The macro therefore
encoded the three least significant bits of red and green and the two
least significant bits of blue, rather than the most significant.
This disagrees with RGBTO16 in the same file, which correctly takes the
high bits, and with RGB8RED/RGB8GREEN/RGB8BLUE immediately below it,
which are documented as the inverse transformation but read the result
as high bits.
All in-tree callers pass full 8-bit components, so all were affected:
RGBTO8(39, 64, 139) in apps/examples/nxterm, intended as midnight blue,
evaluates to 0xe3 -- full red plus full blue, i.e. magenta.
Take the high bits instead, so that RGBTO8 matches RGBTO16 and the
RGB8xxx macros become its true inverse.
Tested on a RISC-V LiteX/VexRiscv target with an 8bpp RGB332 frame
buffer, and with a host round-trip check over all 256 representable
colours.
Assisted-by: Claude:claude-opus-5
Signed-off-by: William Byatt <william@byatt.io>
cdcuart_txempty() held priv->lock across EP_POLL(), which re-enters the
class through cdcacm_wrcomplete() and takes that same non-recursive lock,
and then took it a second time to read nwrq. Release it after the
disconnected check, matching cdcuart_txready()/cdcuart_rxavailable().
Fixes: cc067ab199 ("drivers/usbdev/cdcacm.c: Use small lock to protect cdcacm")
Signed-off-by: Felipe Moura <moura.fmo@gmail.com>
The registry is a singly linked list of static structures, so registering
one of them a second time does not add a second entry: it points that
entry's own link at itself, and the list stops having an end.
Nothing notices while every device that turns up matches something near
the head, because the search returns before it reaches the loop. The
first device that matches nothing at all, meaning anything without a
class driver built in, walks the list to look for it and never comes back,
holding the registry lock. On a multiprocessor the rest of the system
follows it down: every other processor that touches the registry spins,
and on the one measured here that included the console, so a board with a
USB keyboard and no keyboard driver came up and then answered nothing.
Registering twice is easy to do by accident. drivers_initialize() calls
usbhost_drivers_initialize(), which registers every class the
configuration selected, and board code that also registers one, which
many boards do, gets a second call for free.
So look before linking, and treat a repeat registration as the no-op the
caller expected it to be.
Assisted-by: Claude:claude-opus-5
Signed-off-by: Justin Hammond <justin@dynam.ac>
Use CONFIG_STM32_UART8_SERIALDRIVER so g_uart8rxbuffer and
g_uart8txbuffer are compiled when UART8 is enabled.
Signed-off-by: Joao Mario Lago <joao.mario.lago@hotmail.com>
Build fs_link.c unconditionally so link() remains available even when
CONFIG_PSEUDOFS_SOFTLINKS is disabled. Return ENOSYS in that
configuration instead of leaving applications with an undefined symbol.
Signed-off-by: Felipe Moura <moura.fmo@gmail.com>
Replace the divergent board conventions for the timer input clock
frequency with a single uniform convention provided by every board:
- STM32_APBx_TIMn_CLKIN and BOARD_TIMn_FREQUENCY -> STM32_TIMn_CLKIN
- STM32_APBx_LPTIMn_CLKIN, BOARD_LPTIMn_FREQUENCY and
STM32_LPTIMn_FREQUENCY -> STM32_LPTIMn_CLKIN
- STM32_APB1_THRTIM1_CLKIN and BOARD_HRTIM1_FREQUENCY ->
STM32_HRTIM1_CLKIN
All STM32 consumers (tim/lptim/pwm/adc/dac/capture/sdadc/dfsdm/
pulsecount) updated to match; the timer input clock is now bus-agnostic
in the drivers.
Boards that carried the same timer clock in more than one convention now
define STM32_TIMn_CLKIN exactly once, derived from the APB bus clock
(PCLKx with the x2 doubler when the APB prescaler is greater than 1),
instead of redefining it with a second, sometimes different, value.
BREAKING CHANGE: The timer input-clock board macros STM32_APBx_TIMn_CLKIN,
BOARD_TIMn_FREQUENCY, STM32_APBx_LPTIMn_CLKIN, BOARD_LPTIMn_FREQUENCY,
STM32_LPTIMn_FREQUENCY, STM32_APB1_THRTIM1_CLKIN and
BOARD_HRTIM1_FREQUENCY are removed in favor of STM32_TIMn_CLKIN,
STM32_LPTIMn_CLKIN and STM32_HRTIM1_CLKIN. Out-of-tree boards must
define the new macros (drop the APB bus from the name, keep the value),
and out-of-tree drivers referencing the old names must be updated.
Signed-off-by: raiden00pl <raiden00@railab.me>
The ihm07m1_b16 (FOC motor control) configuration overflows the
STM32F302R8 64 KiB flash region by ~470 bytes, so it no longer links.
Enable GNU Full LTO (CONFIG_LTO_FULL=y); cross-module dead-code
elimination brings the image back under the limit (flash drops from
~66.0 KiB to ~57.7 KiB, 88%).
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
build will fail with the following error
arm-none-eabi-ld: /awork/android/NuttX/nuttx/nuttx section flash'
arm-none-eabi-ld: region .text' will not fit in region flash' overflowed by 1144 bytes
before
Register: qe
Register: nsh
Register: sh
LD: nuttx
arm-none-eabi-ld: /awork/android/NuttX/nuttx/nuttx section .text will not fit in region flash
arm-none-eabi-ld: region flash overflowed by 1144 bytes
Memory region Used Size Region Size %age Used
flash: 66680 B 64 KB 101.75%
sram: 5136 B 16 KB 31.35%
make[1]: *** [Makefile:230: nuttx] Error 1
make: *** [tools/Unix.mk:569: nuttx] Error 2
after
Register: qe
Register: nsh
Register: sh
LD: nuttx
Memory region Used Size Region Size %age Used
flash: 38008 B 64 KB 58.00%
sram: 4132 B 16 KB 25.22%
CP: nuttx.hex
CP: nuttx.bin
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
STM32_ETHMAC selects NETDEVICES, but NETDEVICES depends on NET. Enabling
ETHMAC without NET produced an invalid Kconfig
Signed-off-by: raiden00pl <raiden00@railab.me>
Enabling STM32_FOC without MOTOR_FOC failed to build with
"unknown type name 'foc_current_t'". Add the dependency on MOTOR_FOC.
Signed-off-by: raiden00pl <raiden00@railab.me>
Grow the in-memory pseudofile buffer by doubling instead of
1<<LOG2_CEIL, which can under-allocate on 32-bit targets for large
expand sizes. Also:
* reject size_t wrap before expand on write (-EFBIG)
* clear newly addressed bytes when the file grows
* route truncate growth through the same expand path
Impact: CONFIG_PSEUDOFS_FILE expand/write/truncate only; no API or
build-system change.
Testing: host arithmetic PoC blocked; WSL sim:pseudofile-poc
(SIM_M32+KASAN) write returns -ENOMEM instead of SIGSEGV in memcpy.
Signed-off-by: ywhkkx <2076064543@qq.com>
igmp_input() verified the packet length with:
if (dev->d_len < NET_LL_HDRLEN(dev) + (iphdrlen + IGMP_HDRLEN))
but dev->d_len at this point holds the IPv4 total length (IP header plus
payload) without the link-layer header, consistent with the convention
established in ipv4_in()/ipv6_in() (which do `dev->d_len -=
NET_LL_HDRLEN(dev)`) and used by all other transport input handlers
(icmp, tcp, udp), none of which reference NET_LL_HDRLEN.
Adding NET_LL_HDRLEN(dev) to the right-hand side made the check always
true for valid IGMP packets:
iphdrlen + IGMP_HDRLEN < NET_LL_HDRLEN + iphdrlen + IGMP_HDRLEN
(= 0 < NET_LL_HDRLEN)
so every well-formed IGMP message hit the "Length error" path and was
silently dropped, breaking IGMP membership query/report processing.
Drop the extra NET_LL_HDRLEN(dev) so the check matches the other
protocol handlers.
Signed-off-by: zhekunren <zhekunren@qq.com>
CRYPTO_CHACHA20 implements the RFC 8439/IETF parameterization (32-bit
counter + 96-bit nonce). SSH's chacha20-poly1305@openssh.com uses the
original DJB construction instead: a 64-bit block counter in state
words 12..13 and a 64-bit nonce in words 14..15 (libtomcrypt's
chacha_ivctr64). The two layouts produce different keystreams for the
same key, so an SSH server cannot interoperate with OpenSSH clients
through the IETF variant.
Signed-off-by: Felipe Moura <moura.fmo@gmail.com>
