The fixed list of type names holds neither uint64_t nor any NuttX
typedef, so declarations using them went unchecked.
Signed-off-by: raiden00pl <raiden00@railab.me>
Assisted-by: Claude Code
The brace was compared against the line before it rather than the line
the statement began on, so a macro broken over two lines was reported.
Signed-off-by: raiden00pl <raiden00@railab.me>
Assisted-by: Claude Code
Only lines beginning with a C keyword were checked, so an assignment or
a call could sit at any column.
Signed-off-by: raiden00pl <raiden00@railab.me>
Assisted-by: Claude Code
A residue modulo four expresses neither the indentation unit nor the
alignment of case logic, and all of it was disabled from the first
switch to the end of the enclosing function.
Signed-off-by: raiden00pl <raiden00@railab.me>
Assisted-by: Claude Code
1. use _atomic as wrapper because if _Atomic empty, may affects the compilation of other files:
2. for clang builtin function, it donot accept param with keyword "_Atomic"
Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
The check added by the preceding commit reports ten braces in nxstyle.c
that do not line up with the brace they close, and a comment that does
not share the column of the run it belongs to. Bring the whole file
into line with the standard, so that the checks added by the commits
that follow are not introduced against a file that breaks them.
Signed-off-by: raiden00pl <raiden00@railab.me>
Assisted-by: Claude Code
Braces were only tested against a multiple of the indentation unit, so
one at the wrong level still passed.
Signed-off-by: raiden00pl <raiden00@railab.me>
Assisted-by: Claude Code
The standard requires braces after 'if', 'else', 'while', 'for' and 'do'
even when the body is a single statement. Nothing checked this.
Signed-off-by: raiden00pl <raiden00@railab.me>
Assisted-by: Claude Code
Add a shared NuttX PWM lower-half for the Realtek Ameba PWM timer in
arch/arm/src/common/ameba, driven through the SDK fwlib. TIM8 provides a
single time base feeding eight compare channels (CCR0..CCR7) that share one
frequency while each carries its own duty, so a single /dev/pwm0 exposes the
multichannel output via CONFIG_PWM_NCHANNELS. The fwlib PWM routines are
split ROM/RAM: the time-base calls resolve from on-chip ROM, while the
capture/compare calls live in fwlib ram_common/ameba_tim.c, which the build
pulls into AMEBA_FWLIB_SRCS when CONFIG_AMEBA_PWM is set.
Per-chip wiring (timer index, channel count, register base, input clock,
IRQ, clock masks and the crossbar pad-mux code table) lives in
arch/arm/src/rtl8721dx/ameba_pwm_chip.h so a port to another Ameba chip only
supplies a same-named header; the pad-mux codes are a per-channel table
(AMEBA_PWM_PINMUX_FIDS) rather than a computed base, so chips with a single
shared code or codes grouped per timer are expressed by the header alone.
The timer registers as /dev/pwm0 from pke8721daf bring-up through the stock
PWM character driver; a dedicated `pwm` defconfig drives examples/pwm for
validation.
Signed-off-by: dechao_gong <dechao_gong@realsil.com.cn>
Assisted-by: Claude <noreply@anthropic.com>
Add a shared NuttX SPI master lower-half for the Realtek Ameba SPI
controllers (SPI0/SPI1) in arch/arm/src/common/ameba, driven through the
SDK fwlib in polling mode with full-duplex exchange and a software chip
select. Per-chip wiring (controller count, register bases, clock masks,
crossbar pad-mux codes and the fwlib SSI_InitTypeDef layout) lives in
arch/arm/src/rtl8721dx/ameba_spi_chip.h so a port to the other Ameba
chips only supplies a same-named header.
Each controller registers as /dev/spiN from pke8721daf bring-up through
the stock SPI character driver; a dedicated `spi` defconfig drives the
spitool for validation.
Assisted-by: Claude <noreply@anthropic.com>
Signed-off-by: dechao_gong <dechao_gong@realsil.com.cn>
Add a shared NuttX I2C master lower-half for the Realtek Ameba I2C
controllers (I2C0/I2C1) in arch/arm/src/common/ameba, driven through
the SDK fwlib in polling mode. Per-chip wiring (controller count,
register bases, clock masks, crossbar pad-mux codes and the fwlib
I2C_InitTypeDef layout) lives in arch/arm/src/rtl8721dx/ameba_i2c_chip.h
so a port to the other Ameba chips only supplies a same-named header.
Each controller registers as /dev/i2cN from pke8721daf bring-up through
the stock I2C character driver; a dedicated `i2c` defconfig drives the
i2ctool for validation.
Assisted-by: Claude <noreply@anthropic.com>
Signed-off-by: dechao_gong <dechao_gong@realsil.com.cn>
Wire the RTL8721F km4tz core up to a working NuttShell:
- irq.h: renumber the KM4TZ external vector table to the RTL8721F
APIRQn map (UART_LOG=24, IPC=5, +GPIOB/C, TIMER7/8, ...).
- ameba_loguart.c: fix the LOG-UART base to 0x40810000. The former
0x401C6000 belongs to a different Ameba part; the wrong base bus-
faulted on the RX interrupt-enable write while TX still worked
(LOGUART_PutChar uses its own ROM-internal base).
- ameba_app_start.c: adjust the MPU read-only / RAM regions for the
RTL8721F memory map and seed the RTC on first power-on so the
SDM32K-clocked SYSTIMER comes up (mirrors the SDK app_rtc_init).
- ameba_ipc.c: move the km4tz<->km4ns IPC to APIRQn 5 (IPC_CPU0).
- ameba_board.mk: pull in fwlib ameba_rtc.c for the RTC_* symbols.
- defconfig: RTL8721F RAM map, enable TIMER/TIMER_ARCH/ARMV8M_SYSTICK
for a live system tick, and drop the WiFi/NET stack for now.
- scripts/Make.defs: use the RTL8721F_NOR flash profile.
Boots cleanly to nsh> on hardware; tick, RX and builtin apps verified.
Signed-off-by: dechao_gong <dechao_gong@realsil.com.cn>
Add a shared Ameba high-speed UART driver on top of the GPIO driver's
common/ameba/ infrastructure, exposing UART0/UART1 through the NuttX
serial upper half.
- arch/arm/src/common/ameba/ameba_uart.c/.h: serial lower-half driver
built on the SDK fwlib UART register layer (ROM symbol table). RX/TX
dispatch through NuttX-native interrupts; TERMIOS get/set supported.
The pins are muxed to the direction-specific UART crossbar function
codes (TXD/RXD per controller) required by the amebadplus pinmux, and
RX is pulled high through the SDK ROM.
- arch/arm/src/common/ameba/Kconfig: AMEBA_UART option (selects SERIAL
and ARCH_HAVE_SERIAL_TERMIOS) plus RX/TX buffer-size knobs.
- arch/arm/src/rtl8721dx: wire ameba_uart.c into the Make/CMake builds
and pull the fwlib ram_common UART table into the fwlib link set.
- boards/arm/rtl8721dx/pke8721daf: board UART port table registering
UART0 at /dev/ttyS1 (PB18/PB19, 115200), bring-up hook, and a uart
NSH config with the serialrx/serialblaster examples.
- Documentation: describe the driver and the uart board config.
Verified on hardware (PKE8721DAF): pinmux routing, TX/RX and interrupt
paths, and the TERMIOS ioctl path via loopback.
Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
Signed-off-by: dechao_gong <dechao_gong@realsil.com.cn>
Add a board-agnostic GPIO driver for Realtek Ameba chips, exposing pins
through the NuttX GPIO (ioexpander) upper half at /dev/gpioN.
- arch/arm/src/common/ameba/ameba_gpio.{c,h}: the shared driver, sitting
directly on the SDK fwlib register layer. The fwlib GPIO API it calls
resolves at link time from the on-chip ROM symbol table, except
GPIO_INTStatusGet/ClearEdge which are not in ROM and are compiled in
from fwlib ram_common/ameba_gpio.c (that object also carries GPIO_Init,
harmlessly overriding the equivalent ROM copy). Pin interrupts are
dispatched NuttX-natively: the port's NVIC vector is owned by NuttX
via irq_attach, and the ISR reads and clears status through the fwlib
GPIO_INTStatus* helpers.
- The driver keeps nothing IC-specific: the port count, the per-port
NVIC vectors and the RCC gate bits come from a per-chip
<ameba_gpio_chip.h> resolved on the include path, so bringing up a new
Ameba chip only adds that header, not a change to the shared driver.
- arch/arm/src/common/ameba/Kconfig: a shared "Ameba Peripheral Support"
menu with the AMEBA_GPIO option, sourced by each Ameba chip's Kconfig so
it is reused across ICs (RTL8721Dx, RTL8720F, ...).
- arch/arm/src/rtl8721dx: provide ameba_gpio_chip.h, wire the driver into
both the Make/Kconfig and CMake builds, and compile the fwlib
ameba_gpio.c register layer into libameba_fwlib for the RTL8721Dx.
- boards/arm/rtl8721dx/pke8721daf: board pin table (rtl8721dx_gpio.c),
bring-up registration, and a standalone gpio defconfig.
- Documentation: describe the gpio configuration and pin encoding.
tools/nxstyle: whitelist the Ameba "GPIO_" SDK ROM symbol prefix (alongside
the existing FLASH_/IPC_/... Ameba prefixes) so the vendor GPIO API's mixed-case
identifiers do not trip nxstyle, matching how the other Ameba SDK prefixes are
handled.
Assisted-by: Claude Code:claude-opus-4-8
Signed-off-by: dechao_gong <dechao_gong@realsil.com.cn>
New RISC-V chip port for the GigaDevice GD32VW55x (Nuclei N307, Wi-Fi 6
and BLE 5.3 combo), with the GD32VW553K-START board.
Core:
- ECLIC interrupt controller, clock tree (160 MHz / 40 MHz HXTAL),
64-bit machine timer, serial (USART0/UART1/UART2) and RTC.
- The instruction cache must be enabled in head.S or the UART drops
characters under load; the mask ROM uses the first 0x200 bytes of SRAM
so the image is linked at 0x20000200; the RTC needs PMU_CTL0.BKPWEN or
the register writes are silently discarded.
- The ECLIC only auto-clears the interrupt pending bit in hardware-vectored
mode, so the trap dispatch clears it for edge-triggered sources or they
re-fire forever (level-triggered peripherals clear their own).
Peripherals: DMA (8 channels), GPIO + EXTI, SPI (optional DMA), I2C0/I2C1
(the new STM32-v2-style IP, not the GD32F4 one), ADC, PWM and input
capture on the timers, both watchdogs, PROGMEM, TRNG and CRC. All use
the standard NuttX lower-half interfaces and direct register access, not
the vendor SPL. Three user LEDs (GPIOC), and a software reset through the
Nuclei SysTimer.
Internal flash: it is a system-in-package NOR die behind the real-time
decryption block, so it is not programmed through the FMC registers -- the
driver goes through the mask ROM API (rom_flash_*), the same way the
vendor code does. PROGMEM can be mounted as LittleFS; the region sits
below the Wi-Fi NVDS and must not overlap it.
Wi-Fi (wlan0), station and softAP:
- The MAC/PHY, RF and WPA supplicant are linked as prebuilt BSD-3
libraries. They are RTOS-agnostic, so the OS binding is a sys_* facade
on NuttX primitives (gdwifi/wrapper_nuttx.c). Critical sections mask by
ECLIC priority threshold, not by disabling every interrupt, or the MAC
misses its microsecond deadlines.
- The lwIP stack of the SDK is not used: the interface is a
netdev_lowerhalf driver driven by the standard tools (wapi, ifup, renew,
ping, dhcpd). EAPOL is handed to the supplicant instead of the IP
stack. The lowerhalf "priority" field is the work-queue id (HPWORK/
LPWORK), not a task priority -- a wrong value makes receive() never run
and every packet is dropped.
- The vendor gives the radio 32 KB of shared SRAM as an extra heap; this
needs CONFIG_MM_REGIONS >= 2 or the kernel silently drops the region.
- The DHCP client needs CONFIG_NETUTILS_DHCPC_BOOTP_FLAGS=0x8000 so the
server answers the OFFER by broadcast.
- softAP (wapi master mode -> wifi_management_ap_start): the single-VIF
firmware does station or AP at a time. Use WPA2, not WPA3: the SAE
handshake is deep on the stack and overflows the elliptic-curve crypto
with the default task stacks, so the Wi-Fi configs raise
CONFIG_INIT_STACKSIZE/DEFAULT_TASK_STACKSIZE.
Vendor SDK: cloned by the build at "context" time, pinned to a validated
commit and patched in place -- so CI can build with nothing preinstalled,
the same pattern as esp-hal-3rdparty. The prebuilt libraries are built
for the hard-float ilp32f ABI.
BLE 5.3, marked EXPERIMENTAL and off by default: the prebuilt libble is an
all-in-one controller plus RivieraWaves host (GAP/GATT/SMP inside the blob)
with no HCI transport, so the port drives the vendor host directly
(ble_adp_*, ble_adv_*, ble_gap_*) instead of registering a bt_driver_s.
The SDK's radio interrupt handlers must be attached to the NuttX IRQ table
(they are reached through the ECLIC hardware vector table in the vendor
build); attaching also keeps --gc-sections from dropping them. It ships
with no configuration; enabling it advertises as "NuttX", connectable.
Boards: gd32vw553k-start with nsh, wapi, sta_softap, periph and littlefs
configurations, and the board added to the CI build list.
Tested on hardware (GD32VW553K-START): NSH, the peripheral drivers
(TRNG entropy and the LEDs exercised), LittleFS (write, read, survives a
reboot), the full Wi-Fi station path (scan, WPA2, DHCP, ping to the
internet), the softAP (a client associates with WPA2, gets an address
from the board's DHCP server, and pings the board), and BLE (advertises as
"NuttX"; a central connects and enumerates the GATT database).
Assisted-by: Claude Opus 4.8
Signed-off-by: Jorge Guzman <jorge.gzm@gmail.com>
Added a Mixed case exclusion for MQTTErrors defined in
apps/netutils/mqttc/MQTT-C/include/mqtt.h
Signed-off-by: Mihai Pacuraru <mpacuraru@protonmail.com>
This file does not build with minor modifications due to nxstyle issues.
Adding symbols to the white_content_list to address_this.
Testing: "gcc -o nxstyle nxstyle.c" builds fine.
Signed-off-by: Catalin Visinescu <catalin_visinescu@yahoo.com>
The Micro XRCE-DDS Client custom-transport API expects user
callbacks with prototypes of the form
bool open_cb (struct uxrCustomTransport *transport);
size_t read_cb(struct uxrCustomTransport *transport, ...);
The struct tag is fixed by the upstream public header
<uxr/client/profile/transport/custom/custom_transport.h> and
cannot be renamed. nxstyle currently flags every callback
signature in apps/system/microros/transport with 'Mixed case
identifier found'.
Add the 'uxrCustom' prefix to g_white_prefix, following the same
pattern used for the ROS 2 message type names added in
commit bc3a2596c8 ("tools/nxstyle: Whitelist ROS 2 message type
identifiers.").
Signed-off-by: Arjav Patel <arjav1528@gmail.com>
The ROS 2 C client API generates symbols via rosidl token-pasting
macros. Each message type ends up with a name of the form
<pkg>__msg__<Type>, and the bare type token (Int32, Float64, ...)
appears in user code as an argument to ROSIDL_GET_MSG_TYPE_SUPPORT().
Neither form can be renamed without breaking the public API.
Add the ROS 2 standard message package prefixes (std_msgs,
geometry_msgs, sensor_msgs, nav_msgs, builtin_interfaces,
rcl_interfaces) and the rosidl scalar type names (Int8/16/32/64,
UInt8/16/32/64, Float32/64) to g_white_prefix so nxstyle does not
flag the resulting mixed-case identifiers in apps that consume
micro-ROS via apps/system/microros.
Signed-off-by: Arjav Patel <arjav1528@gmail.com>
When checking the first line of a block, the returned value is
incremented by one.
This commit updates doc to explain why.
Signed-off-by: Jiri Vlasak <jvlasak@elektroline.cz>
Fix 269 occurrences of duplicate "the" word typo found in 209 files
across source code, header files, and configuration.
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
To skip the style issue:
Error: /home/runner/work/nuttx/nuttx/nuttx/arch/arm/src/phy62xx/irq.c:194:5: error: Mixed case identifier found
Error: /home/runner/work/nuttx/nuttx/nuttx/arch/arm/src/phy62xx/irq.c:196:5: error: Mixed case identifier found
Error: /home/runner/work/nuttx/nuttx/nuttx/arch/arm/src/phy62xx/irq.c:199:5: error: Mixed case identifier found
Error: /home/runner/work/nuttx/nuttx/nuttx/arch/arm/src/phy62xx/phyplus_wdt.c:61:28: error: Mixed case identifier found
Error: /home/runner/work/nuttx/nuttx/nuttx/arch/arm/src/phy62xx/phyplus_wdt.c:104:2: error: Mixed case identifier found
Error: /home/runner/work/nuttx/nuttx/nuttx/arch/arm/src/phy62xx/phyplus_wdt.c:162:50: error: Mixed case identifier found
Signed-off-by: wangzhi16 <wangzhi16@xiaomi.com>
Update nxstyle whitelist to allow MixedCase
identifiers used by the Xedge (Barracuda App Server) example.
The following prefixes were added to g_white_prefix[]:
- Ba
- Thread
- LThread
- Http
- Disk
- Xedge
The following exact identifiers were added to g_white_content_list[]:
- baGetUnixTime
- baParseDate
- setDispExit
- xedgeInitDiskIo
- xedgeOpenAUX
- platformInitDiskIo
- ltMgr
- Lt
Signed-off-by: Jorge Guzman <jorge.gzm@gmail.com>
fix defined but not used warning from CI:
Warning: nxstyle.c:767:13: warning: ‘backslash_to_slash’ defined but not used [-Wunused-function]
767 | static void backslash_to_slash(char *str)
Signed-off-by: raiden00pl <raiden00@railab.me>
fix
error: Relative file path does not match actual file
Windows paths are different from Unix.
Added:
realpath replacement macro.
my_strndup() Implementation of strndup() for Windows Native.
backslash_to_slash() Replace backslashes \ to forward slashes /. Used to verify the relative path of a file.
Signed-off-by: simbit18 <simbit18@gmail.com>
Whitelist all symbols starting with "TEEC_" and a few
entire struct field names from tee_client_api.h.
Signed-off-by: George Poulios <gpoulios@census-labs.com>
Newer AVR chips (DA/DB family) use mixed-case constants in header
file defining constants for I/O register values (provided
by manufacturer.)
Based on mailing list discussion, this patch adds some
of the lowercase suffixes used (the less prevalent constants
are then redefined in NuttX.)
The zlib compression functions are used in network utilities
for compression/decompression. These functions need to be added to
the nxstyle white list to prevent style checking errors since they
follow the zlib naming convention rather than NuttX's style guide.
Specifically, these functions are used in:
- apps/netutils/telnetc/telnetc.c for compressed data handling
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
1. Since the implementation of gcov has changed since clang17, versions before clang17 need to use the libunwind.a file
Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
To skip the style issue:
arch/arm/src/phy62xx/uart.c:59:15: error: Mixed case identifier found
arch/arm/src/phy62xx/uart.c:64:2: error: Mixed case identifier found
arch/arm/src/phy62xx/uart.c:65:2: error: Mixed case identifier found
arch/arm/src/phy62xx/uart.c:70:2: error: Mixed case identifier found
arch/arm/src/phy62xx/uart.c:71:2: error: Mixed case identifier found
arch/arm/src/phy62xx/uart.c:75:2: error: Mixed case identifier found
arch/arm/src/phy62xx/uart.c:77:7: error: Mixed case identifier found
Signed-off-by: chao an <anchao@lixiang.com>
Add heap current used to note.
Plot it in segger sysview data plot.
Signed-off-by: xuxingliang <xuxingliang@xiaomi.com>
Signed-off-by: Neo Xu <neo.xu1990@gmail.com>
Add the new symbol `NativeSymbol` to the white list,
and update the comments about the symbols that are
from WAMR project.
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
Most tools used for compliance and SBOM generation use SPDX identifiers
This change brings us a step closer to an easy SBOM generation.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* Fix nxstyle check so it does not report error on comments on the same
line as if statements
* Rework if statement checks
* Report warning instead of error for is statements check fail
It can only read the contents of the first buffer, so fblen should be changed to ensure that it can read the second buffer as well.
Signed-off-by: jianglianfang <jianglianfang@xiaomi.com>
This patch fixes the issue reported by PR #12345 where the file
path existent in the second line of each source file on NuttX.
Sometimes the path could be too long and could raise a nxstyle
issue during the CI test.
Signed-off-by: Alan C. Assis <acassis@gmail.com>
The video_controls.h is a public header file, and it is used by
videoio.h. So it should be moved to the include/sys directory.
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
