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30 commits

Author SHA1 Message Date
Marco Casaroli
abbe0df26d !arch/arm: Use r9 as the PIC base register.
ARM PIC has used r10 as the base register, but the tree has never been
consistent about it.  Toolchain.defs gives CONFIG_BUILD_PIC
-mpic-register=r9 and CONFIG_PIC -mpic-register=r10, twenty-five lines
apart, and arm_initialstate.c sets REG_R9 from inline assembly under one
and REG_PIC under the other, with a comment reading "Set the PIC base
register (probably R10)".  This settles it on r9 for all of PIC: NXFLAT,
ELF PIC and CONFIG_BUILD_PIC alike.

r9 is the right choice rather than an arbitrary one.  It is the AAPCS
platform register, the "static base", and it is what GCC itself picks
for -msingle-pic-base on an EABI target; r10 is the non-EABI default.

It also removes a combination that cannot build today.  Stack checking
adds -ffixed-r10 in armv7-m/Toolchain.defs and armv8-m/Toolchain.defs,
while CONFIG_PIC adds -mpic-register=r10, and GCC rejects the pair with
"unable to use 'r10' for PIC register".  The comment above REG_PIC has
always said the register "can be R9 if stack checking is enabled", but
the definition was unconditionally REG_R10, so it would have named the
wrong register even had the build succeeded.

The thunk generator moves with the firmware.  NXFLAT import stubs had
the register baked in as "add ip,ip,sl", so a module built for r9 would
load and then branch to a wild address on its first call out.  The stubs
now come from NXFLAT_PIC_REG in the in-tree tool, which is built only
when CONFIG_NXFLAT is set, following the
CONFIG_BOARD_ETC_ROMFS_PASSWD_ENABLE precedent in tools/Unix.mk.

That leaves modules built before this change, and they are the reason
for the ABI marker.  The NXFLAT header cannot carry a version: h_magic
is written by ldnxflat, which is GPL, derived from elf2flt, and stays
out of this repository, so it can never be changed in step with the
loader.  The import table can, because both of its ends are in-tree --
mknxflat emits it and nxflat_bindimports() reads it -- and ldnxflat
passes it through untouched.  So every module now imports
__nxflat_abi_v2, the base firmware defines it, and a module that does
not import it is refused.

Making the marker a real exported symbol rather than a name the loader
special-cases is what keeps it out of the build system's way: a board's
symbol table picks it up exactly as it picks up printf, so mksymtab.sh
and its equivalents need no change.  It also gives the reverse direction
a diagnosis for free -- a module built against a newer ABI than its
firmware fails with "Exported symbol __nxflat_abi_v2 not found".

Most of the remaining churn is boards restating a default.  ARCHPICFLAGS
is a "?=" default so that a board only speaks up when it differs, and
twenty-six were assigning the value the default already had.  MKNXFLAT
gets the same treatment: thirteen boards named the same tool, and the
only thing that varies is ARM versus Thumb-2, which falls out of
CONFIG_ARM_THUMB.  LDNXFLAT gains a default too -- it stays an
out-of-tree PATH lookup, but naming it centrally fixes boards that never
assigned it, where it expanded to nothing and handed make a recipe
beginning "-e", whose leading dash make ate as "ignore errors".

The non-ARM boards carrying -mpic-register=r10 lose it: it is an
ARM-only option, reachable only through CPICFLAGS, which is only used to
build NXFLAT modules, and no non-ARM board enables NXFLAT.

Boards keep nothing about PIC flags any more.  ARCHPICFLAGS was set by
sixty-three of them and only ever fed CPICFLAGS, which is only used to
build NXFLAT modules; no board outside arch/arm enables NXFLAT, so every
non-ARM copy was setting a variable nothing read.  Those are removed
rather than moved somewhere more central, which would only make dead
text look load-bearing.  LDNXFLAT goes the same way as MKNXFLAT, for the
same reason: thirteen boards named the same tool that Toolchain.defs now
names once.

One of them was not merely redundant.  am67/t3-gem-o1 asked for
"-mpic-register=r10 -ffixed-r10", which GCC refuses outright with
"unable to use 'r10' for PIC register" -- the very combination the
filter-out machinery in Toolchain.defs exists to prevent.  It has
survived because that board does not build NXFLAT modules, so the flags
are never handed to a compiler.  Renaming the register would have
carried the fault forward unchanged, so the line goes.

Tested on lm3s6965-ek:qemu-nxflat under QEMU, configured and built with
no overrides.  The nxflat example runs the errno, hello and struct
modules with output identical to the same config built from master.
Built with the old out-of-tree thunk generator instead, the same
firmware refuses all three with ENOEXEC rather than locking up in a
HardFault, which is what this change is for.  mps3-an547:picostest,
which is CONFIG_PIC without CONFIG_NXFLAT, builds clean and does not
build the thunk generator.

The .def files pick up two cosmetic changes here alongside the register:
a "Dyanamic" typo that codespell rejects, and a reworded comment in each
thunk_*.c.  Neither appears in the emitted thunk -- both are in C
comments -- so the generated text is still what the upstream tool
produces, modulo the register itself.

BREAKING CHANGE: ARM PIC moves from r10 to r9.  An NXFLAT module built
before this change has r10 baked into its import stubs and will not run
against a firmware carrying it; the two cannot be mixed.  The module is
refused with ENOEXEC rather than branching to a wild address, by way of the
__nxflat_abi_v2 marker described below.

Quick fix: rebuild the module against this tree.  Its source needs no
change.  A board that reserved r10 by hand, or that assigned ARCHPICFLAGS
or MKNXFLAT to restate a default, should drop those assignments; nothing
else is affected, and CONFIG_PIC without CONFIG_NXFLAT needs no action.

Assisted-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
Signed-off-by: Marco Casaroli <marco.casaroli@gmail.com>
2026-08-06 01:38:23 +08:00
Alin Jerpelea
4ef01d98d5 boards/xtensa/esp32s3: migrate to SPDX identifier
Most tools used for compliance and SBOM generation use SPDX identifiers
This change brings us a step closer to an easy SBOM generation.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2024-11-12 22:20:59 +08:00
Tiago Medicci Serrano
d1fd1ed8f6 boards/esp32s3: Merge MCUboot and "simple-boot" linker scripts
To make it easier to keep the linker scripts updated for both
MCUboot and "simple-boot", this commit merges them into a single
linker script with macros to enable/disable specific sections.
2024-10-23 22:26:39 +08:00
anjiahao
9ed93c6b1e unify MODULE & ELF flag to Toolchain.defs
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2024-10-08 19:56:33 +08:00
guoshichao
4c01594d5b nuttx: remove the unnecessary -pipe build option
Signed-off-by: guoshichao <guoshichao@xiaomi.com>
2024-08-31 10:22:20 +08:00
Tiago Medicci Serrano
5680e9d5a4 espressif: Update internal libraries reference
Update internal reference to get the most updated Espressif's
libraries. Those libraries are based on branch `release/v5.1` of
the ESP-IDF and include `v5.1.4` version of it.
2024-08-21 23:28:45 +08:00
Almir Okato
d098c1dc87 esp32s3: add simple boot support
The Simple Boot feature for Espressif chips is a method of booting
that doesn't depend on a 2nd stage bootloader. Its not the
intention to replace a 2nd stage bootloader such as MCUboot and
ESP-IDF bootloader, but to have a minimal and straight-forward way
of booting, and also simplify the building.

This commit also removes deprecated code and makes this bootloader
configuration as default for esp32s3 targets and removes the need
for running 'make bootloader' command for it.

Other related fix, but not directly to Simple Boot:
- Instrumentation is required to run from IRAM to support it during
initialization. `is_eco0` function also needs to run from IRAM.
- `rtc.data` section placement was fixed.
- Provide arch-defined interfaces for efuses, in order to decouple
board config level from arch-defined values.

Signed-off-by: Almir Okato <almir.okato@espressif.com>
2024-04-17 19:43:05 +08:00
Petro Karashchenko
655d00b1e7 arch/xtensa/esp32s3: initial effort to get BLE running on ESP32-S3
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-08-14 16:29:21 -03:00
Almir Okato
8f3c425067 xtensa/esp32s3: Enable booting from MCUboot bootloader
Add support for booting from MCUboot bootloader on ESP32-S3.

Signed-off-by: Almir Okato <almir.okato@espressif.com>
2022-12-15 00:42:13 +08:00
Gustavo Henrique Nihei
ca16e9bbd5 xtensa/esp32s3: Simplify board linker script selection
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-12-08 21:55:29 +08:00
Gustavo Henrique Nihei
bfc40c74d0 xtensa/esp32s3: Add support for Protected Mode
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-12-07 03:07:45 +08:00
Gustavo Henrique Nihei
1befe6076f xtensa/esp32s3: Move linker scripts to folder common to all boards
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-11-02 16:04:00 +01:00
Gustavo Henrique Nihei
1014c3e795 esp32s3: Fix Data allocation offset within shared Internal SRAM1
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-08-25 10:06:31 +08:00
Xiang Xiao
1f920e55d3 Move warning option from Make.defs to Toolchain.defs
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-15 15:40:35 +03:00
Xiang Xiao
aeb9c5d822 boards: Move -fno-strict-aliasing from Make.defs to Toolchain.defs
and migrate MAXOPTIMIZATION into ARCHOPTIMIZATION

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-05-01 11:36:41 +03:00
Xiang Xiao
b12c0a1e31 boards: Remove -std=c++1x from Make.defs
let the implementation of standard library choice what they want

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-29 21:08:14 -03:00
Xiang Xiao
8f8ee25a9c boards: Move -g from Make.defs to Toolchain.defs
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-25 16:23:03 +03:00
Xiang Xiao
75326e563d boards: Move -fno-common from Make.defs to Toolchain.defs
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-25 07:57:29 +03:00
Xiang Xiao
547c85b0ae boards: Switch the elf link script to binfmt/libelf/gnu-elf.ld
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-24 17:02:37 +02:00
chao.an
1c8e12406e compile/opt: add config DEBUG_LINK_MAP
Selecting this option will pass "-Map=$(TOPDIR)$(DELIM)nuttx.map" to ld
when linking NuttX ELF. That file can be useful for verifying
and debugging magic section games, and for seeing which
pieces of code get eliminated with DEBUG_OPT_UNUSED_SECTIONS.

Signed-off-by: chao.an <anchao@xiaomi.com>
2022-04-22 01:37:23 +08:00
chao.an
64d7326ed5 compile/opt: add config DEBUG_OPT_UNUSED_SECTIONS
Enable this option to optimization the unused input sections with the
linker by compiling with " -ffunction-sections -fdata-sections ", and
linking with " --gc-sections ".

Signed-off-by: chao.an <anchao@xiaomi.com>
2022-04-22 01:37:23 +08:00
Gustavo Henrique Nihei
06d0a9f1ad xtensa|risc-v: Make CXX exception and RTTI depend on Kconfig options
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-03-30 11:19:29 +08:00
Xiang Xiao
ee931c137f boards: Remove -fno-builtin
it's more efficent to generate the machine code directly if possible

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-03-10 19:46:01 +02:00
Alan C. Assis
dc1b6776b9 xtensa/esp32s3: Add SPI RAM/PSRAM Support 2022-03-09 19:22:56 +02:00
Xiang Xiao
54b886ca0d boards: Add -fno-common to ARCHCFLAGS and ARCHCXXFLAGS
since elf loader can't handle SHN_COMMON

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-23 22:00:32 +08:00
Xiang Xiao
163fe4ff0b boards: Replace CONFIG_CYGWIN_WINTOOL with CONVERT_PATH
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-20 21:15:36 +01:00
Xiang Xiao
1d1bdd85a3 Remove the double blank line from source files
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-20 20:10:14 +01:00
Alan Rosenthal
8defb843aa Remove duplicate linker script definitions
## Summary
A lot of linker scripts were listed twice, once for unix, once for windows.

This PR cleans up the logic so they're only listed once.

 ## Impact
Any opportunity to use a single source of truth and reduce lines of code is a win!

 ## Testing
CI will test all build
2022-02-17 02:55:25 +08:00
Abdelatif Guettouche
94fb8f4d2a esp32s3_rom.ld: Lowercase cache related function to comply with nxstyle.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2022-01-31 23:35:50 +08:00
Gustavo Henrique Nihei
b0d24f53c4 xtensa: Add initial support for ESP32-S3
Co-authored-by: Alan Carvalho de Assis <alan.carvalho@espressif.com>
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-01-27 13:46:50 -03:00