arch/risc-v: Correct format of 32-bit insn in misaligned handler

FIx:
Format specifies type 'unsigned long' but the argument has type 'uint32_t' (aka 'unsigned int')

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>

arch/risc-v/src/common/riscv_misaligned.c

@@ -447,7 +447,7 @@ static bool decode_insn(uintptr_t *regs, riscv_insn_ctx_t *ctx)
       case INSN_FSD:
         _alert("Misaligned float instruction not support yet\n");
       default:
-        _alert("Uncompressed: %lx\n", insn.insn);
+        _alert("Uncompressed: %x\n", insn.insn);
         return false;
     }