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arch/arm/src/common/stm32: enable backup domain access for LSI on U5

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On U5 LSION is in RCC_BDCR, which is write-protected after reset.
Without PWR DBP set the LSION write is ignored and stm32_rcc_enablelsi()
waits forever for LSIRDY.

- Add STM32_HAVE_IP_PWR_M33_V1 (U5) to the common PWR register
  dispatcher and the common stm32_pwr.h, so common code can reach the
  U5 PWR definitions and stm32_pwr_enablebkp().
- Rename stm32u5/hardware/stm32_pwr.h to stm32u5xx_pwr.h, so the common
  dispatcher can include it.
- In stm32_lsi.c enable backup domain write access around the BDCR
  update, as the common LSE drivers do.

Signed-off-by: raiden00pl <raiden00@railab.me>
Assisted-by: Claude Code
This commit is contained in:
raiden00pl 2026-10-08 12:45:03 +02:00 • committed by Xiang Xiao
parent a98162efc6
commit db514c3e63
8 changed files with 45 additions and 7 deletions
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@ -4568,7 +4568,6 @@ arch/arm/src/stm32u5/hardware/stm32_gpio.h mijung@gmx.net alin.jerpelea@sony.com
arch/arm/src/stm32u5/hardware/stm32_i2c.h cheshmedzhiev@gmail.com alin.jerpelea@sony.com
arch/arm/src/stm32u5/hardware/stm32_memorymap.h mijung@gmx.net cheshmedzhiev@gmail.com alin.jerpelea@sony.com 101105604+simbit18@users.noreply.github.com
arch/arm/src/stm32u5/hardware/stm32_pinmap.h mijung@gmx.net cheshmedzhiev@gmail.com alin.jerpelea@sony.com
arch/arm/src/stm32u5/hardware/stm32_pwr.h mijung@gmx.net devel@sumpfralle.de alin.jerpelea@sony.com xiaoxiang@xiaomi.com
arch/arm/src/stm32u5/hardware/stm32_rcc.h cheshmedzhiev@gmail.com devel@sumpfralle.de alin.jerpelea@sony.com 101105604+simbit18@users.noreply.github.com
arch/arm/src/stm32u5/hardware/stm32_spi.h mijung@gmx.net cheshmedzhiev@gmail.com alin.jerpelea@sony.com 101105604+simbit18@users.noreply.github.com
arch/arm/src/stm32u5/hardware/stm32_syscfg.h mijung@gmx.net cheshmedzhiev@gmail.com alin.jerpelea@sony.com
@ -4576,6 +4575,7 @@ arch/arm/src/stm32u5/hardware/stm32_tim.h mijung@gmx.net devel@sumpfralle.de ali
arch/arm/src/stm32u5/hardware/stm32_uart.h mijung@gmx.net alin.jerpelea@sony.com
arch/arm/src/stm32u5/hardware/stm32u5xx_dbgmcu.h cheshmedzhiev@gmail.com alin.jerpelea@sony.com
arch/arm/src/stm32u5/hardware/stm32u5xx_pinmap.h cheshmedzhiev@gmail.com devel@sumpfralle.de alin.jerpelea@sony.com
arch/arm/src/stm32u5/hardware/stm32u5xx_pwr.h mijung@gmx.net devel@sumpfralle.de alin.jerpelea@sony.com xiaoxiang@xiaomi.com
arch/arm/src/stm32u5/hardware/stm32u5xx_spi.h cheshmedzhiev@gmail.com 101105604+simbit18@users.noreply.github.com alin.jerpelea@sony.com
arch/arm/src/stm32u5/hardware/stm32u5xx_syscfg.h cheshmedzhiev@gmail.com 101105604+simbit18@users.noreply.github.com alin.jerpelea@sony.com
arch/arm/src/stm32u5/stm32.h mijung@gmx.net alin.jerpelea@sony.com