arm/stm32h7: fix nxstyle errors

Fix nxstyle errors in stm32_gpio.c and stm32h7x3xx_rcc.c.

Assisted-by: Claude Code
Signed-off-by: raiden00pl <raiden00@railab.me>
This commit is contained in:
raiden00pl 2026-10-06 19:03:05 +02:00 • committed by simbit18
parent dcd93b0f67
commit ba9619bc2b
2 changed files with 17 additions and 16 deletions

View file

@ -395,23 +395,23 @@ int stm32_configgpio(uint32_t cfgset)
*/
if (alt_setting == 0)
{
if (pin < 8)
{
regoffset = STM32_GPIO_AFRL_OFFSET;
pos = pin;
}
else
{
regoffset = STM32_GPIO_AFRH_OFFSET;
pos = pin - 8;
}
{
if (pin < 8)
{
regoffset = STM32_GPIO_AFRL_OFFSET;
pos = pin;
}
else
{
regoffset = STM32_GPIO_AFRH_OFFSET;
pos = pin - 8;
}
regval = getreg32(base + regoffset);
regval &= ~GPIO_AFR_MASK(pos);
regval |= (alt_setting << GPIO_AFR_SHIFT(pos));
putreg32(regval, base + regoffset);
}
regval = getreg32(base + regoffset);
regval &= ~GPIO_AFR_MASK(pos);
regval |= (alt_setting << GPIO_AFR_SHIFT(pos));
putreg32(regval, base + regoffset);
}
/* Set speed (Only outputs and alternate function pins) */

View file

@ -630,6 +630,7 @@ static inline void rcc_enableapb3(void)
*/
uint32_t rcc_gcr = getreg32(STM32_RCC_GCR);
rcc_gcr |= RCC_GCR_WW1RSC;
putreg32(rcc_gcr, STM32_RCC_GCR);
regval |= RCC_APB3ENR_WWDG1EN;