From ba9619bc2b6914cea45e85a5ed563881d3835bcb Mon Sep 17 00:00:00 2001
From: raiden00pl <raiden00@railab.me>
Date: Tue, 6 Oct 2026 19:03:05 +0200
Subject: [PATCH] arm/stm32h7: fix nxstyle errors

Fix nxstyle errors in stm32_gpio.c and stm32h7x3xx_rcc.c.

Assisted-by: Claude Code
Signed-off-by: raiden00pl <raiden00@railab.me>
---
 arch/arm/src/stm32h7/stm32_gpio.c      | 32 +++++++++++++-------------
 arch/arm/src/stm32h7/stm32h7x3xx_rcc.c |  1 +
 2 files changed, 17 insertions(+), 16 deletions(-)

diff --git a/arch/arm/src/stm32h7/stm32_gpio.c b/arch/arm/src/stm32h7/stm32_gpio.c
index 93b6253b49b..ddf5ad8b616 100644
--- a/arch/arm/src/stm32h7/stm32_gpio.c
+++ b/arch/arm/src/stm32h7/stm32_gpio.c
@@ -395,23 +395,23 @@ int stm32_configgpio(uint32_t cfgset)
    */
 
   if (alt_setting == 0)
-      {
-        if (pin < 8)
-          {
-            regoffset = STM32_GPIO_AFRL_OFFSET;
-            pos       = pin;
-          }
-        else
-          {
-            regoffset = STM32_GPIO_AFRH_OFFSET;
-            pos       = pin - 8;
-          }
+    {
+      if (pin < 8)
+        {
+          regoffset = STM32_GPIO_AFRL_OFFSET;
+          pos       = pin;
+        }
+      else
+        {
+          regoffset = STM32_GPIO_AFRH_OFFSET;
+          pos       = pin - 8;
+        }
 
-        regval  = getreg32(base + regoffset);
-        regval &= ~GPIO_AFR_MASK(pos);
-        regval |= (alt_setting << GPIO_AFR_SHIFT(pos));
-        putreg32(regval, base + regoffset);
-      }
+      regval  = getreg32(base + regoffset);
+      regval &= ~GPIO_AFR_MASK(pos);
+      regval |= (alt_setting << GPIO_AFR_SHIFT(pos));
+      putreg32(regval, base + regoffset);
+    }
 
   /* Set speed (Only outputs and alternate function pins) */
 
diff --git a/arch/arm/src/stm32h7/stm32h7x3xx_rcc.c b/arch/arm/src/stm32h7/stm32h7x3xx_rcc.c
index d9e2ff31b66..13737b7b0b7 100644
--- a/arch/arm/src/stm32h7/stm32h7x3xx_rcc.c
+++ b/arch/arm/src/stm32h7/stm32h7x3xx_rcc.c
@@ -630,6 +630,7 @@ static inline void rcc_enableapb3(void)
    */
 
   uint32_t rcc_gcr = getreg32(STM32_RCC_GCR);
+
   rcc_gcr |= RCC_GCR_WW1RSC;
   putreg32(rcc_gcr, STM32_RCC_GCR);
   regval |= RCC_APB3ENR_WWDG1EN;