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drivers/net/igb: Access registers at the required width.

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Launder each register value through a register with an empty asm, on
loads and stores both, so the access is the width the source specifies.
Same fix as usbhost_xhci_pci.c commit 4b702058f6.

Signed-off-by: raiden00pl <raiden00@railab.me>
Assisted-by: Claude Code
This commit is contained in:
raiden00pl 2026-08-18 12:01:32 +02:00 • committed by Xiang Xiao
parent 25f8f0ad12
commit ad02edd8d4
1 changed files with 13 additions and 2 deletions
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15
drivers/net/igb.c
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@ -274,6 +274,12 @@ static const struct netdev_ops_s g_igb_ops =
* Private Functions
*****************************************************************************/
/* The device requires 32-bit register accesses, but volatile does not pin
* the access width: GCC 16 narrows a 32-bit load feeding a single bit test
* into a byte load. Launder the value through a register with an empty
* asm, on loads and stores both, to force the full-width access.
*/
/*****************************************************************************
* Name: igb_getreg_mem
*****************************************************************************/
@ -281,8 +287,11 @@ static const struct netdev_ops_s g_igb_ops =
static uint32_t igb_getreg_mem(FAR struct igb_driver_s *priv,
unsigned int offset)
{
uintptr_t addr = priv->base + offset;
return *((FAR volatile uint32_t *)addr);
uintptr_t addr = priv->base + offset;
uint32_t regval = *((FAR volatile uint32_t *)addr);
__asm__ __volatile__("" : "+r"(regval));
return regval;
}
/*****************************************************************************
@ -294,6 +303,8 @@ static void igb_putreg_mem(FAR struct igb_driver_s *priv,
uint32_t value)
{
uintptr_t addr = priv->base + offset;
__asm__ __volatile__("" : "+r"(value));
*((FAR volatile uint32_t *)addr) = value;
}