Aksal/nuttx
3
1
Fork 1
mirror of https://github.com/apache/nuttx.git synced 2026-08-19 04:28:21 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions 2

Merged nuttx/nuttx into master

Browse source
This commit is contained in:
ziggurat29 2016-07-12 13:18:01 -05:00
commit 67d5144ee3
69 changed files with 4342 additions and 2589 deletions
Download patch file Download diff file Expand all files Collapse all files

13
Makefile.unix
View file

@ -280,16 +280,6 @@ tools/cnvwindeps$(HOSTEXEEXT):
# setting up symbolic links with 'generic' directory names to specific,
# configured directories.
#
# Link the apps/include directory to include/apps
include/apps: Make.defs
ifneq ($(APPDIR),)
@echo "LN: include/apps to $(APPDIR)/include"
$(Q) if [ -d $(TOPDIR)/$(APPDIR)/include ]; then \
$(DIRLINK) $(TOPDIR)/$(APPDIR)/include include/apps; \
fi
endif
# Link the arch/<arch-name>/include directory to include/arch
include/arch: Make.defs
@ -324,7 +314,7 @@ ifneq ($(CONFIG_ARCH_CHIP),)
$(Q) $(DIRLINK) $(TOPDIR)/$(ARCH_INC)/$(CONFIG_ARCH_CHIP) include/arch/chip
endif
dirlinks: include/arch include/arch/board include/arch/chip $(ARCH_SRC)/board $(ARCH_SRC)/chip include/apps
dirlinks: include/arch include/arch/board include/arch/chip $(ARCH_SRC)/board $(ARCH_SRC)/chip
# context
#
@ -354,7 +344,6 @@ clean_context:
$(Q) $(DIRUNLINK) include/arch
$(Q) $(DIRUNLINK) $(ARCH_SRC)/board
$(Q) $(DIRUNLINK) $(ARCH_SRC)/chip
$(Q) $(DIRUNLINK) include/apps
# check_context
#

16
Makefile.win
View file

@ -275,19 +275,6 @@ tools\mkdeps$(HOSTEXEEXT):
# setting up symbolic links with 'generic' directory names to specific,
# configured directories.
#
# Link the apps\include directory to include\apps
include\apps: Make.defs
ifneq ($(APPDIR),)
@echo LN: include\apps $(APPDIR)\include
ifeq ($(CONFIG_WINDOWS_MKLINK),y)
$(Q) /user:administrator mklink /d include\apps $(APPDIR)\include
else
$(Q) xcopy $(APPDIR)\include include\apps /c /q /s /e /y /i
$(Q) echo FAKELNK > include\apps\.fakelnk
endif
endif
# Link the arch\<arch-name>\include directory to include\arch
include\arch: Make.defs
@ -347,7 +334,7 @@ else
endif
endif
dirlinks: include\arch include\arch\board include\arch\chip $(ARCH_SRC)\board $(ARCH_SRC)\chip include\apps
dirlinks: include\arch include\arch\board include\arch\chip $(ARCH_SRC)\board $(ARCH_SRC)\chip
# context
#
@ -374,7 +361,6 @@ clean_context:
$(call DELDIR, include\arch)
$(call DELDIR, $(ARCH_SRC)\board)
$(call DELDIR, $(ARCH_SRC)\chip)
$(call DELDIR, include\apps)
# check_context
#

46
arch/arm/src/kinetis/Kconfig
View file

@ -205,19 +205,22 @@ config KINETIS_UART5
config KINETIS_ENET
bool "Ethernet"
default n
depends on ARCH_FAMILY_K60
select NET
depends on ARCH_FAMILY_K60 || ARCH_FAMILY_K64
select ARCH_HAVE_PHY
select ARCH_HAVE_NETDEV_STATISTICS
select NET
select NETDEVICES
select NET_MULTIBUFFER
---help---
Support Ethernet (K60 only)
Support Ethernet (K6x only)
config KINETIS_RNGB
bool "Random number generator"
default n
depends on ARCH_FAMILY_K60
depends on ARCH_FAMILY_K60 || ARCH_FAMILY_K64
select ARCH_HAVE_RNG
---help---
Support the random number generator(K60 only)
Support the random number generator(K6x only)
config KINETIS_FLEXCAN0
bool "FlexCAN0"
@ -478,7 +481,7 @@ config KINETIS_FTM2_CHANNEL
If FTM2 is enabled for PWM usage, you also need specifies the timer output
channel {0,..,1}
comment "Kinetis GPIO Interrupt Configuration"
menu "Kinetis GPIO Interrupt Configuration"
config GPIO_IRQ
bool "GPIO pin interrupts"
@ -513,55 +516,54 @@ config KINETIS_PORTEINTS
Enable support for 32 interrupts from GPIO port E pins
endif
endmenu # Kinetis GPIO Interrupt Configuration
if KINETIS_ENET
menu "Kinetis Ethernet Configuration"
depends on KINETIS_ENET
comment "Kinetis Ethernet Configuration"
config ENET_ENHANCEDBD
config KINETIS_ENETENHANCEDBD
bool "Use enhanced buffer descriptors"
default n
---help---
Use enhanced, 32-byte buffer descriptors
config ENET_NETHIFS
config KINETIS_ENETNETHIFS
int "Number of Ethernet interfaces"
default 1
---help---
Number of Ethernet interfaces supported by the hardware. Must be
one for now.
config ENET_NRXBUFFERS
config KINETIS_ENETNRXBUFFERS
int "Number of Ethernet Rx buffers"
default 6
---help---
Number of Ethernet Rx buffers to use. The size of one buffer is
determined by NET_BUFSIZE
config ENET_NTXBUFFERS
config KINETIS_ENETNTXBUFFERS
int "Number of Ethernet Tx buffers"
default 2
---help---
Number of Ethernet Tx buffers to use. The size of one buffer is
determined by NET_BUFSIZE
config ENET_PHYADDR
config KINETIS_ENETPHYADDR
int "PHY address"
default 1
---help---
MII/RMII address of the PHY
config ENET_USEMII
config KINETIS_ENETUSEMII
bool "Use MII interface"
default n
---help---
The the MII PHY interface. Default: Use RMII interface
endif
endmenu # Kinetis Ethernet Configuration
if KINETIS_SDHC
comment "Kinetis SDHC Configuration"
menu "Kinetis SDHC Configuration"
depends on KINETIS_SDHC
config KINETIS_SDHC_ABSFREQ
bool "Custom transfer frequencies"
@ -611,11 +613,13 @@ config KINETIS_SDHC_DMAPRIO
---help---
SDHC DMA priority
endif
endmenu # Kinetis SDHC Configuration
comment "Kinetis UART Configuration"
menu "Kinetis UART Configuration"
config KINETIS_UARTFIFOS
bool "Enable UART0 FIFO"
default n
depends on KINETIS_UART0
endmenu # Kinetis UART Configuration

0
arch/arm/src/kinetis/chip/kinetis_k40memormap.h → arch/arm/src/kinetis/chip/kinetis_k40memorymap.h
View file

0
arch/arm/src/kinetis/chip/kinetis_k60memormap.h → arch/arm/src/kinetis/chip/kinetis_k60memorymap.h
View file

155
arch/arm/src/kinetis/kinetis_enet.c
View file

@ -76,23 +76,23 @@
* Pre-processor Definitions
****************************************************************************/
/* CONFIG_ENET_NETHIFS determines the number of physical interfaces
/* CONFIG_KINETIS_ENETNETHIFS determines the number of physical interfaces
* that will be supported.
*/
#if CONFIG_ENET_NETHIFS != 1
# error "CONFIG_ENET_NETHIFS must be one for now"
#if CONFIG_KINETIS_ENETNETHIFS != 1
# error "CONFIG_KINETIS_ENETNETHIFS must be one for now"
#endif
#if CONFIG_ENET_NTXBUFFERS < 1
#if CONFIG_KINETIS_ENETNTXBUFFERS < 1
# error "Need at least one TX buffer"
#endif
#if CONFIG_ENET_NRXBUFFERS < 1
#if CONFIG_KINETIS_ENETNRXBUFFERS < 1
# error "Need at least one RX buffer"
#endif
#define NENET_NBUFFERS (CONFIG_ENET_NTXBUFFERS+CONFIG_ENET_NRXBUFFERS)
#define NENET_NBUFFERS (CONFIG_KINETIS_ENETNTXBUFFERS+CONFIG_KINETIS_ENETNRXBUFFERS)
#ifndef CONFIG_NET_MULTIBUFFER
# error "CONFIG_NET_MULTIBUFFER is required in the configuration"
@ -108,14 +108,47 @@
#define MII_MAXPOLLS (0x1ffff)
#define LINK_WAITUS (500*1000)
/* PHY hardware specifics. This was copied from the FreeScale code examples.
* this is a vendor specific register and bit settings. I really should
* do the research and find out what this really is.
/* PHY definitions.
*
* The selected PHY must be selected from the drivers/net/Kconfig PHY menu.
* A description of the PHY must be provided here. That description must
* include:
*
* 1. BOARD_PHY_NAME: A PHY name string (for debug output),
* 2. BOARD_PHYID1 and BOARD_PHYID2: The PHYID1 and PHYID2 values (from
* include/nuttx/net/mii.h)
* 3. BOARD_PHY_STATUS: The address of the status register to use when
* querying link status (from include/nuttx/net/mii.h)
* 4. BOARD_PHY_ISDUPLEX: A macro that can convert the status register
* value into a boolean: true=duplex mode, false=half-duplex mode
* 5. BOARD_PHY_10BASET: A macro that can convert the status register
* value into a boolean: true=10Base-T, false=Not 10Base-T
* 6. BOARD_PHY_100BASET: A macro that can convert the status register
* value into a boolean: true=100Base-T, false=Not 100Base-T
*
* The Tower SER board uses a KSZ8041 PHY.
* The Freedom K64F board uses a KSZ8081 PHY
*/
#define PHY_STATUS (0x1f)
#define PHY_DUPLEX_STATUS (4 << 2)
#define PHY_SPEED_STATUS (1 << 2)
#if defined(CONFIG_ETH0_PHY_KSZ8041)
# define BOARD_PHY_NAME "KSZ8041"
# define BOARD_PHYID1 MII_PHYID1_KSZ8041
# define BOARD_PHYID2 MII_PHYID2_KSZ8041
# define BOARD_PHY_STATUS MII_KSZ8041_PHYCTRL2
# define BOARD_PHY_ISDUPLEX(s) (((s) & (4 << MII_PHYCTRL2_MODE_SHIFT)) != 0)
# define BOARD_PHY_10BASET(s) (((s) & (1 << MII_PHYCTRL2_MODE_SHIFT)) != 0)
# define BOARD_PHY_100BASET(s) (((s) & (2 << MII_PHYCTRL2_MODE_SHIFT)) != 0)
#elif defined(CONFIG_ETH0_PHY_KSZ8081)
# define BOARD_PHY_NAME "KSZ8081"
# define BOARD_PHYID1 MII_PHYID1_KSZ8081
# define BOARD_PHYID2 MII_PHYID2_KSZ8081
# define BOARD_PHY_STATUS MII_KSZ8081_PHYCTRL2
# define BOARD_PHY_ISDUPLEX(s) (((s) & (4 << MII_PHYCTRL2_MODE_SHIFT)) != 0)
# define BOARD_PHY_10BASET(s) (((s) & (1 << MII_PHYCTRL2_MODE_SHIFT)) != 0)
# define BOARD_PHY_100BASET(s) (((s) & (2 << MII_PHYCTRL2_MODE_SHIFT)) != 0)
#else
# error "Unrecognized or missing PHY selection"
#endif
/* Estimate the hold time to use based on the peripheral (bus) clock:
*
@ -188,7 +221,7 @@ struct kinetis_driver_s
* Private Data
****************************************************************************/
static struct kinetis_driver_s g_enet[CONFIG_ENET_NETHIFS];
static struct kinetis_driver_s g_enet[CONFIG_KINETIS_ENETNETHIFS];
/****************************************************************************
* Private Function Prototypes
@ -222,8 +255,8 @@ static int kinetis_interrupt(int irq, FAR void *context);
/* Watchdog timer expirations */
static void kinetis_polltimer(int argc, uint32_t arg, ...);
static void kinetis_txtimeout(int argc, uint32_t arg, ...);
static void kinetis_polltimer(int argc, uint32_t arg, ...);
/* NuttX callback functions */
@ -241,6 +274,10 @@ static int kinetis_ioctl(struct net_driver_s *dev, int cmd, long arg);
/* PHY/MII support */
static inline void kinetis_initmii(struct kinetis_driver_s *priv);
static int kinetis_writemii(struct kinetis_driver_s *priv, uint8_t phyaddr,
uint8_t regaddr, uint16_t data);
static int kinetis_readmii(struct kinetis_driver_s *priv, uint8_t phyaddr,
uint8_t regaddr, uint16_t *data);
static inline void kinetis_initphy(struct kinetis_driver_s *priv);
/* Initialization */
@ -323,7 +360,7 @@ static bool kinetics_txringfull(FAR struct kinetis_driver_s *priv)
*/
txnext = priv->txhead + 1;
if (txnext >= CONFIG_ENET_NTXBUFFERS)
if (txnext >= CONFIG_KINETIS_ENETNTXBUFFERS)
{
txnext = 0;
}
@ -375,7 +412,7 @@ static int kinetis_transmit(FAR struct kinetis_driver_s *priv)
txdesc = &priv->txdesc[priv->txhead];
priv->txhead++;
if (priv->txhead >= CONFIG_ENET_NTXBUFFERS)
if (priv->txhead >= CONFIG_KINETIS_ENETNTXBUFFERS)
{
priv->txhead = 0;
}
@ -392,7 +429,7 @@ static int kinetis_transmit(FAR struct kinetis_driver_s *priv)
*/
txdesc->length = kinesis_swap16(priv->dev.d_len);
#ifdef CONFIG_ENET_ENHANCEDBD
#ifdef CONFIG_KINETIS_ENETENHANCEDBD
txdesc->bdu = 0x00000000;
txdesc->status2 = TXDESC_INT | TXDESC_TS; /* | TXDESC_IINS | TXDESC_PINS; */
#endif
@ -668,7 +705,7 @@ static void kinetis_receive(FAR struct kinetis_driver_s *priv)
/* Update the index to the next descriptor */
priv->rxtail++;
if (priv->rxtail >= CONFIG_ENET_NRXBUFFERS)
if (priv->rxtail >= CONFIG_KINETIS_ENETNRXBUFFERS)
{
priv->rxtail = 0;
}
@ -708,7 +745,7 @@ static void kinetis_txdone(FAR struct kinetis_driver_s *priv)
/* Yes.. bump up the tail pointer, making space for a new TX descriptor */
priv->txtail++;
if (priv->txtail >= CONFIG_ENET_NTXBUFFERS)
if (priv->txtail >= CONFIG_KINETIS_ENETNTXBUFFERS)
{
priv->txtail = 0;
}
@ -961,7 +998,7 @@ static int kinetis_ifup(struct net_driver_s *dev)
/* Select legacy of enhanced buffer descriptor format */
#ifdef CONFIG_ENET_ENHANCEDBD
#ifdef CONFIG_KINETIS_ENETENHANCEDBD
putreg32(ENET_ECR_EN1588, KINETIS_ENET_ECR);
#else
putreg32(0, KINETIS_ENET_ECR);
@ -1216,7 +1253,7 @@ static int kinetis_ioctl(struct net_driver_s *dev, int cmd, long arg)
{
struct mii_ioctl_data_s *req =
(struct mii_ioctl_data_s *)((uintptr_t)arg);
req->phy_id = CONFIG_ENET_PHYADDR;
req->phy_id = CONFIG_KINETIS_ENETPHYADDR;
ret = OK;
}
break;
@ -1424,13 +1461,41 @@ static inline void kinetis_initphy(struct kinetis_driver_s *priv)
{
usleep(LINK_WAITUS);
phydata = 0xffff;
kinetis_readmii(priv, CONFIG_ENET_PHYADDR, MII_PHYID1, &phydata);
kinetis_readmii(priv, CONFIG_KINETIS_ENETPHYADDR, MII_PHYID1, &phydata);
}
while (phydata == 0xffff);
#if CONFIG_DEBUG_NET_ERROR
/* Verify PHYID1. Compare OUI bits 3-18 */
ninfo("%s: PHYID1: %04x\n", BOARD_PHY_NAME, phydata);
if (phydata != BOARD_PHYID1)
{
nerr("ERROR: PHYID1=%04x incorrect for %s. Expected %04x\n",
phydata, BOARD_PHY_NAME, BOARD_PHYID1);
}
else
{
/* Read PHYID2 */
kinetis_readmii(priv, CONFIG_KINETIS_ENETPHYADDR, MII_PHYID2, &phydata);
ninfo("%s: PHYID2: %04x\n", BOARD_PHY_NAME, phydata);
/* Verify PHYID2: Compare OUI bits 19-24 and the 6-bit model number
* (ignoring the 4-bit revision number).
*/
if ((phydata & 0xfff0) != (BOARD_PHYID2 & 0xfff0))
{
nerr("ERROR: PHYID2=%04x incorrect for %s. Expected %04x\n",
(phydata & 0xfff0), BOARD_PHY_NAME, (BOARD_PHYID2 & 0xfff0));
}
}
#endif
/* Start auto negotiation */
kinetis_writemii(priv, CONFIG_ENET_PHYADDR, MII_MCR,
kinetis_writemii(priv, CONFIG_KINETIS_ENETPHYADDR, MII_MCR,
(MII_MCR_ANRESTART | MII_MCR_ANENABLE));
/* Wait (potentially forever) for auto negotiation to complete */
@ -1438,21 +1503,24 @@ static inline void kinetis_initphy(struct kinetis_driver_s *priv)
do
{
usleep(LINK_WAITUS);
kinetis_readmii(priv, CONFIG_ENET_PHYADDR, MII_MSR, &phydata);
kinetis_readmii(priv, CONFIG_KINETIS_ENETPHYADDR, MII_MSR, &phydata);
}
while ((phydata & MII_MSR_ANEGCOMPLETE) == 0);
ninfo("%s: MII_MSR: %04x\n", BOARD_PHY_NAME, phydata);
/* When we get here we have a link - Find the negotiated speed and duplex. */
phydata = 0;
kinetis_readmii(priv, CONFIG_ENET_PHYADDR, PHY_STATUS, &phydata);
kinetis_readmii(priv, CONFIG_KINETIS_ENETPHYADDR, BOARD_PHY_STATUS, &phydata);
/* Set up the transmit and receive contrel registers based on the
ninfo("%s: BOARD_PHY_STATUS: %04x\n", BOARD_PHY_NAME, phydata);
/* Set up the transmit and receive control registers based on the
* configuration and the auto negotiation results.
*/
#ifdef CONFIG_ENET_USEMII
#ifdef CONFIG_KINETIS_ENETUSEMII
rcr = ENET_RCR_MII_MODE | ENET_RCR_CRCFWD |
CONFIG_NET_ETH_MTU << ENET_RCR_MAX_FL_SHIFT |
ENET_RCR_MII_MODE;
@ -1468,7 +1536,7 @@ static inline void kinetis_initphy(struct kinetis_driver_s *priv)
/* Setup half or full duplex */
if ((phydata & PHY_DUPLEX_STATUS) != 0)
if (BOARD_PHY_ISDUPLEX(phydata))
{
/* Full duplex */
@ -1481,12 +1549,17 @@ static inline void kinetis_initphy(struct kinetis_driver_s *priv)
rcr |= ENET_RCR_DRT;
}
if ((phydata & PHY_SPEED_STATUS) != 0)
if (BOARD_PHY_10BASET(phydata))
{
/* 10Mbps */
rcr |= ENET_RCR_RMII_10T;
}
else if (!BOARD_PHY_100BASET(phydata))
{
nerr("ERROR: Neither 10- nor 100-BaseT reported: PHY STATUS=%04x\n",
phydata);
}
putreg32(rcr, KINETIS_ENET_RCR);
putreg32(tcr, KINETIS_ENET_TCR);
@ -1520,7 +1593,7 @@ static void kinetis_initbuffers(struct kinetis_driver_s *priv)
/* Get an aligned RX descriptor (array) address */
addr += CONFIG_ENET_NTXBUFFERS * sizeof(struct enet_desc_s);
addr += CONFIG_KINETIS_ENETNTXBUFFERS * sizeof(struct enet_desc_s);
priv->rxdesc = (struct enet_desc_s *)addr;
/* Get the beginning of the first aligned buffer */
@ -1529,12 +1602,12 @@ static void kinetis_initbuffers(struct kinetis_driver_s *priv)
/* Then fill in the TX descriptors */
for (i = 0; i < CONFIG_ENET_NTXBUFFERS; i++)
for (i = 0; i < CONFIG_KINETIS_ENETNTXBUFFERS; i++)
{
priv->txdesc[i].status1 = 0;
priv->txdesc[i].length = 0;
priv->txdesc[i].data = (uint8_t *)kinesis_swap32((uint32_t)addr);
#ifdef CONFIG_ENET_ENHANCEDBD
#ifdef CONFIG_KINETIS_ENETENHANCEDBD
priv->txdesc[i].status2 = TXDESC_IINS | TXDESC_PINS;
#endif
addr += KINETIS_BUF_SIZE;
@ -1542,12 +1615,12 @@ static void kinetis_initbuffers(struct kinetis_driver_s *priv)
/* Then fill in the RX descriptors */
for (i = 0; i < CONFIG_ENET_NRXBUFFERS; i++)
for (i = 0; i < CONFIG_KINETIS_ENETNRXBUFFERS; i++)
{
priv->rxdesc[i].status1 = RXDESC_E;
priv->rxdesc[i].length = 0;
priv->rxdesc[i].data = (uint8_t *)kinesis_swap32((uint32_t)addr);
#ifdef CONFIG_ENET_ENHANCEDBD
#ifdef CONFIG_KINETIS_ENETENHANCEDBD
priv->rxdesc[i].bdu = 0;
priv->rxdesc[i].status2 = RXDESC_INT;
#endif
@ -1556,8 +1629,8 @@ static void kinetis_initbuffers(struct kinetis_driver_s *priv)
/* Set the wrap bit in the last descriptors to form a ring */
priv->txdesc[CONFIG_ENET_NTXBUFFERS-1].status1 |= TXDESC_W;
priv->rxdesc[CONFIG_ENET_NRXBUFFERS-1].status1 |= RXDESC_W;
priv->txdesc[CONFIG_KINETIS_ENETNTXBUFFERS-1].status1 |= TXDESC_W;
priv->rxdesc[CONFIG_KINETIS_ENETNRXBUFFERS-1].status1 |= RXDESC_W;
/* We start with RX descriptor 0 and with no TX descriptors in use */
@ -1631,7 +1704,7 @@ int kinetis_netinitialize(int intf)
/* Get the interface structure associated with this interface number. */
DEBUGASSERT(intf < CONFIG_ENET_NETHIFS);
DEBUGASSERT(intf < CONFIG_KINETIS_ENETNETHIFS);
priv = &g_enet[intf];
/* Enable the ENET clock */
@ -1646,9 +1719,9 @@ int kinetis_netinitialize(int intf)
putreg32(0, KINETIS_MPU_CESR);
#ifdef CONFIG_KINETIS_ENETUSEMII
/* Configure all ENET/MII pins */
#ifdef CONFIG_ENET_USEMII
kinetis_pinconfig(PIN_MII0_MDIO);
kinetis_pinconfig(PIN_MII0_MDC);
kinetis_pinconfig(PIN_MII0_RXDV);
@ -1668,6 +1741,8 @@ int kinetis_netinitialize(int intf)
kinetis_pinconfig(PIN_MII0_CRS);
kinetis_pinconfig(PIN_MII0_COL);
#else
/* Use RMII subset */
kinetis_pinconfig(PIN_RMII0_MDIO);
kinetis_pinconfig(PIN_RMII0_MDC);
kinetis_pinconfig(PIN_RMII0_CRS_DV);
@ -1773,7 +1848,7 @@ int kinetis_netinitialize(int intf)
*
****************************************************************************/
#if CONFIG_ENET_NETHIFS == 1
#if CONFIG_KINETIS_ENETNETHIFS == 1
void up_netinitialize(void)
{
(void)kinetis_netinitialize(0);

20
arch/arm/src/stm32/stm32_tim.c
View file

@ -158,9 +158,12 @@
# undef CONFIG_STM32_TIM17
#endif
#undef HAVE_TIM_GPIOCONFIG
#if defined(CONFIG_STM32_TIM1)
# if defined(GPIO_TIM1_CH1OUT) ||defined(GPIO_TIM1_CH2OUT)||\
defined(GPIO_TIM1_CH3OUT) ||defined(GPIO_TIM1_CH4OUT)
# undef HAVE_TIM_GPIOCONFIG
# define HAVE_TIM_GPIOCONFIG 1
# define HAVE_TIM1_GPIOCONFIG 1
#endif
#endif
@ -168,6 +171,8 @@
#if defined(CONFIG_STM32_TIM2)
# if defined(GPIO_TIM2_CH1OUT) ||defined(GPIO_TIM2_CH2OUT)||\
defined(GPIO_TIM2_CH3OUT) ||defined(GPIO_TIM2_CH4OUT)
# undef HAVE_TIM_GPIOCONFIG
# define HAVE_TIM_GPIOCONFIG 1
# define HAVE_TIM2_GPIOCONFIG 1
#endif
#endif
@ -175,6 +180,8 @@
#if defined(CONFIG_STM32_TIM3)
# if defined(GPIO_TIM3_CH1OUT) ||defined(GPIO_TIM3_CH2OUT)||\
defined(GPIO_TIM3_CH3OUT) ||defined(GPIO_TIM3_CH4OUT)
# undef HAVE_TIM_GPIOCONFIG
# define HAVE_TIM_GPIOCONFIG 1
# define HAVE_TIM3_GPIOCONFIG 1
#endif
#endif
@ -182,6 +189,8 @@
#if defined(CONFIG_STM32_TIM4)
# if defined(GPIO_TIM4_CH1OUT) ||defined(GPIO_TIM4_CH2OUT)||\
defined(GPIO_TIM4_CH3OUT) ||defined(GPIO_TIM4_CH4OUT)
# undef HAVE_TIM_GPIOCONFIG
# define HAVE_TIM_GPIOCONFIG 1
# define HAVE_TIM4_GPIOCONFIG 1
#endif
#endif
@ -189,6 +198,8 @@
#if defined(CONFIG_STM32_TIM5)
# if defined(GPIO_TIM5_CH1OUT) ||defined(GPIO_TIM5_CH2OUT)||\
defined(GPIO_TIM5_CH3OUT) ||defined(GPIO_TIM5_CH4OUT)
# undef HAVE_TIM_GPIOCONFIG
# define HAVE_TIM_GPIOCONFIG 1
# define HAVE_TIM5_GPIOCONFIG 1
#endif
#endif
@ -196,6 +207,8 @@
#if defined(CONFIG_STM32_TIM8)
# if defined(GPIO_TIM8_CH1OUT) ||defined(GPIO_TIM8_CH2OUT)||\
defined(GPIO_TIM8_CH3OUT) ||defined(GPIO_TIM8_CH4OUT)
# undef HAVE_TIM_GPIOCONFIG
# define HAVE_TIM_GPIOCONFIG 1
# define HAVE_TIM8_GPIOCONFIG 1
#endif
#endif
@ -314,7 +327,10 @@ static void stm32_tim_reload_counter(FAR struct stm32_tim_dev_s *dev);
static void stm32_tim_enable(FAR struct stm32_tim_dev_s *dev);
static void stm32_tim_disable(FAR struct stm32_tim_dev_s *dev);
static void stm32_tim_reset(FAR struct stm32_tim_dev_s *dev);
#ifdef HAVE_TIM_GPIOCONFIG
static void stm32_tim_gpioconfig(uint32_t cfg, stm32_tim_channel_t mode);
#endif
/* Timer methods */
@ -637,9 +653,7 @@ static void stm32_tim_reset(FAR struct stm32_tim_dev_s *dev)
* Name: stm32_tim_gpioconfig
************************************************************************************/
#if defined(HAVE_TIM1_GPIOCONFIG)||defined(HAVE_TIM2_GPIOCONFIG)||\
defined(HAVE_TIM3_GPIOCONFIG)||defined(HAVE_TIM4_GPIOCONFIG)||\
defined(HAVE_TIM5_GPIOCONFIG)||defined(HAVE_TIM8_GPIOCONFIG)
#ifdef HAVE_TIM_GPIOCONFIG
static void stm32_tim_gpioconfig(uint32_t cfg, stm32_tim_channel_t mode)
{
/* TODO: Add support for input capture and bipolar dual outputs for TIM8 */

2
arch/arm/src/stm32l4/chip/stm32l4_pinmap.h
View file

@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/stm32l4/chip/stm32_pinmap.h
* arch/arm/src/stm32l4/chip/stm32l4_pinmap.h
*
* Copyright (C) 2015 Sebastien Lorquet. All rights reserved.
* Author: Sebastien Lorquet <sebastien@lorquet.fr>

2
arch/arm/src/stm32l4/stm32l4.h
View file

@ -57,7 +57,7 @@
#include "chip.h"
#include "stm32l4_adc.h"
//#include "stm32_bkp.h"
//#include "stm32l4_bkp.h"
#include "stm32l4_can.h"
#include "stm32l4_dbgmcu.h"
#include "stm32l4_dma.h"

26
arch/arm/src/stm32l4/stm32l4_freerun.c
View file

@ -57,14 +57,14 @@
* Private Functions
****************************************************************************/
static struct stm32l4_freerun_s *g_freerun;
FAR static struct stm32l4_freerun_s *g_freerun;
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_freerun_handler
* Name: stm32l4_freerun_handler
*
* Description:
* Timer interrupt callback. When the freerun timer counter overflows,
@ -81,9 +81,9 @@ static struct stm32l4_freerun_s *g_freerun;
*
****************************************************************************/
static int stm32_freerun_handler(int irq, void *context)
static int stm32l4_freerun_handler(int irq, FAR void *context)
{
struct stm32l4_freerun_s *freerun = g_freerun;
FAR struct stm32l4_freerun_s *freerun = g_freerun;
DEBUGASSERT(freerun != NULL && freerun->overflow < UINT32_MAX);
freerun->overflow++;
@ -115,8 +115,8 @@ static int stm32_freerun_handler(int irq, void *context)
*
****************************************************************************/
int stm32l4_freerun_initialize(struct stm32l4_freerun_s *freerun, int chan,
uint16_t resolution)
int stm32l4_freerun_initialize(FAR struct stm32l4_freerun_s *freerun, int chan,
uint16_t resolution)
{
uint32_t frequency;
@ -149,7 +149,7 @@ int stm32l4_freerun_initialize(struct stm32l4_freerun_s *freerun, int chan,
/* Set up to receive the callback when the counter overflow occurs */
STM32L4_TIM_SETISR(freerun->tch, stm32_freerun_handler, 0);
STM32L4_TIM_SETISR(freerun->tch, stm32l4_freerun_handler, 0);
/* Set timer period */
@ -173,7 +173,7 @@ int stm32l4_freerun_initialize(struct stm32l4_freerun_s *freerun, int chan,
* Input Parameters:
* freerun Caller allocated instance of the freerun state structure. This
* structure must have been previously initialized via a call to
* stm32_freerun_initialize();
* stm32l4_freerun_initialize();
* ts The location in which to return the time from the free-running
* timer.
*
@ -183,8 +183,8 @@ int stm32l4_freerun_initialize(struct stm32l4_freerun_s *freerun, int chan,
*
****************************************************************************/
int stm32l4_freerun_counter(struct stm32l4_freerun_s *freerun,
struct timespec *ts)
int stm32l4_freerun_counter(FAR struct stm32l4_freerun_s *freerun,
FAR struct timespec *ts)
{
uint64_t usec;
uint32_t counter;
@ -197,7 +197,7 @@ int stm32l4_freerun_counter(struct stm32l4_freerun_s *freerun,
DEBUGASSERT(freerun && freerun->tch && ts);
/* Temporarily disable the overflow counter. NOTE that we have to be
* careful here because stm32_tc_getpending() will reset the pending
* careful here because stm32l4_tc_getpending() will reset the pending
* interrupt status. If we do not handle the overflow here then, it will
* be lost.
*/
@ -267,7 +267,7 @@ int stm32l4_freerun_counter(struct stm32l4_freerun_s *freerun,
* Input Parameters:
* freerun Caller allocated instance of the freerun state structure. This
* structure must have been previously initialized via a call to
* stm32_freerun_initialize();
* stm32l4_freerun_initialize();
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned
@ -275,7 +275,7 @@ int stm32l4_freerun_counter(struct stm32l4_freerun_s *freerun,
*
****************************************************************************/
int stm32l4_freerun_uninitialize(struct stm32l4_freerun_s *freerun)
int stm32l4_freerun_uninitialize(FAR struct stm32l4_freerun_s *freerun)
{
DEBUGASSERT(freerun && freerun->tch);

6
arch/arm/src/stm32l4/stm32l4_freerun.h
View file

@ -56,7 +56,7 @@
****************************************************************************/
/* The freerun client must allocate an instance of this structure and called
* stm32_freerun_initialize() before using the freerun facilities. The client
* stm32l4_freerun_initialize() before using the freerun facilities. The client
* should not access the contents of this structure directly since the
* contents are subject to change.
*/
@ -118,7 +118,7 @@ int stm32l4_freerun_initialize(struct stm32l4_freerun_s *freerun, int chan,
* Input Parameters:
* freerun Caller allocated instance of the freerun state structure. This
* structure must have been previously initialized via a call to
* stm32_freerun_initialize();
* stm32l4_freerun_initialize();
* ts The location in which to return the time remaining on the
* oneshot timer.
*
@ -140,7 +140,7 @@ int stm32l4_freerun_counter(struct stm32l4_freerun_s *freerun,
* Input Parameters:
* freerun Caller allocated instance of the freerun state structure. This
* structure must have been previously initialized via a call to
* stm32_freerun_initialize();
* stm32l4_freerun_initialize();
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned

2
arch/arm/src/stm32l4/stm32l4_gpio.h
View file

@ -268,7 +268,7 @@ EXTERN const uint32_t g_gpiobase[STM32L4_NPORTS];
* Description:
* Configure a GPIO pin based on bit-encoded description of the pin.
* Once it is configured as Alternative (GPIO_ALT|GPIO_CNF_AFPP|...)
* function, it must be unconfigured with stm32_unconfiggpio() with
* function, it must be unconfigured with stm32l4_unconfiggpio() with
* the same cfgset first before it can be set to non-alternative function.
*
* Returns:

33
arch/arm/src/stm32l4/stm32l4_oneshot.c
View file

@ -65,7 +65,7 @@ static struct stm32l4_oneshot_s *g_oneshot;
****************************************************************************/
/****************************************************************************
* Name: stm32_oneshot_handler
* Name: stm32l4_oneshot_handler
*
* Description:
* Timer interrupt callback. When the oneshot timer interrupt expires,
@ -83,11 +83,11 @@ static struct stm32l4_oneshot_s *g_oneshot;
*
****************************************************************************/
static int stm32_oneshot_handler(int irq, void *context)
static int stm32l4_oneshot_handler(int irq, FAR void *context)
{
struct stm32l4_oneshot_s *oneshot = g_oneshot;
FAR struct stm32l4_oneshot_s *oneshot = g_oneshot;
oneshot_handler_t oneshot_handler;
void *oneshot_arg;
FAR void *oneshot_arg;
tmrinfo("Expired...\n");
DEBUGASSERT(oneshot != NULL && oneshot->handler);
@ -138,8 +138,8 @@ static int stm32_oneshot_handler(int irq, void *context)
*
****************************************************************************/
int stm32l4_oneshot_initialize(struct stm32l4_oneshot_s *oneshot, int chan,
uint16_t resolution)
int stm32l4_oneshot_initialize(FAR struct stm32l4_oneshot_s *oneshot, int chan,
uint16_t resolution)
{
uint32_t frequency;
@ -174,14 +174,15 @@ int stm32l4_oneshot_initialize(struct stm32l4_oneshot_s *oneshot, int chan,
}
/****************************************************************************
* Name: stm32_oneshot_max_delay
* Name: stm32l4_oneshot_max_delay
*
* Description:
* Determine the maximum delay of the one-shot timer (in microseconds)
*
****************************************************************************/
int stm32l4_oneshot_max_delay(struct stm32l4_oneshot_s *oneshot, uint64_t *usec)
int stm32l4_oneshot_max_delay(FAR struct stm32l4_oneshot_s *oneshot,
FAR uint64_t *usec)
{
DEBUGASSERT(oneshot != NULL && usec != NULL);
@ -199,7 +200,7 @@ int stm32l4_oneshot_max_delay(struct stm32l4_oneshot_s *oneshot, uint64_t *usec)
* Input Parameters:
* oneshot Caller allocated instance of the oneshot state structure. This
* structure must have been previously initialized via a call to
* stm32_oneshot_initialize();
* stm32l4_oneshot_initialize();
* handler The function to call when when the oneshot timer expires.
* arg An opaque argument that will accompany the callback.
* ts Provides the duration of the one shot timer.
@ -210,9 +211,9 @@ int stm32l4_oneshot_max_delay(struct stm32l4_oneshot_s *oneshot, uint64_t *usec)
*
****************************************************************************/
int stm32l4_oneshot_start(struct stm32l4_oneshot_s *oneshot,
oneshot_handler_t handler, void *arg,
const struct timespec *ts)
int stm32l4_oneshot_start(FAR struct stm32l4_oneshot_s *oneshot,
oneshot_handler_t handler, FAR void *arg,
FAR const struct timespec *ts)
{
uint64_t usec;
uint64_t period;
@ -259,7 +260,7 @@ int stm32l4_oneshot_start(struct stm32l4_oneshot_s *oneshot,
/* Set up to receive the callback when the interrupt occurs */
STM32L4_TIM_SETISR(oneshot->tch, stm32_oneshot_handler, 0);
STM32L4_TIM_SETISR(oneshot->tch, stm32l4_oneshot_handler, 0);
/* Set timer period */
@ -294,7 +295,7 @@ int stm32l4_oneshot_start(struct stm32l4_oneshot_s *oneshot,
* Input Parameters:
* oneshot Caller allocated instance of the oneshot state structure. This
* structure must have been previously initialized via a call to
* stm32_oneshot_initialize();
* stm32l4_oneshot_initialize();
* ts The location in which to return the time remaining on the
* oneshot timer. A time of zero is returned if the timer is
* not running. ts may be zero in which case the time remaining
@ -307,8 +308,8 @@ int stm32l4_oneshot_start(struct stm32l4_oneshot_s *oneshot,
*
****************************************************************************/
int stm32l4_oneshot_cancel(struct stm32l4_oneshot_s *oneshot,
struct timespec *ts)
int stm32l4_oneshot_cancel(FAR struct stm32l4_oneshot_s *oneshot,
FAR struct timespec *ts)
{
irqstate_t flags;
uint64_t usec;

6
arch/arm/src/stm32l4/stm32l4_oneshot.h
View file

@ -63,7 +63,7 @@
typedef void (*oneshot_handler_t)(void *arg);
/* The oneshot client must allocate an instance of this structure and called
* stm32_oneshot_initialize() before using the oneshot facilities. The client
* stm32l4_oneshot_initialize() before using the oneshot facilities. The client
* should not access the contents of this structure directly since the
* contents are subject to change.
*/
@ -139,7 +139,7 @@ int stm32l4_oneshot_max_delay(struct stm32l4_oneshot_s *oneshot, uint64_t *usec)
* Input Parameters:
* oneshot Caller allocated instance of the oneshot state structure. This
* structure must have been previously initialized via a call to
* stm32_oneshot_initialize();
* stm32l4_oneshot_initialize();
* handler The function to call when when the oneshot timer expires.
* arg An opaque argument that will accompany the callback.
* ts Provides the duration of the one shot timer.
@ -166,7 +166,7 @@ int stm32l4_oneshot_start(struct stm32l4_oneshot_s *oneshot,
* Input Parameters:
* oneshot Caller allocated instance of the oneshot state structure. This
* structure must have been previously initialized via a call to
* stm32_oneshot_initialize();
* stm32l4_oneshot_initialize();
* ts The location in which to return the time remaining on the
* oneshot timer. A time of zero is returned if the timer is
* not running.

2097
arch/arm/src/stm32l4/stm32l4_otgfsdev.c
View file

File diff suppressed because it is too large Load diff

1524
arch/arm/src/stm32l4/stm32l4_otgfshost.c
View file

File diff suppressed because it is too large Load diff

387
arch/arm/src/stm32l4/stm32l4_pwm.c
View file

@ -95,7 +95,7 @@
/* Debug ********************************************************************/
#ifdef CONFIG_DEBUG_PWM_INFO
# define pwm_dumpgpio(p,m) stm32_dumpgpio(p,m)
# define pwm_dumpgpio(p,m) stm32l4_dumpgpio(p,m)
#else
# define pwm_dumpgpio(p,m)
#endif
@ -104,41 +104,41 @@
* Private Types
****************************************************************************/
enum stm32_timmode_e
enum stm32l4_timmode_e
{
STM32_TIMMODE_COUNTUP = 0,
STM32_TIMMODE_COUNTDOWN = 1,
STM32_TIMMODE_CENTER1 = 2,
STM32_TIMMODE_CENTER2 = 3,
STM32_TIMMODE_CENTER3 = 4,
STM32L4_TIMMODE_COUNTUP = 0,
STM32L4_TIMMODE_COUNTDOWN = 1,
STM32L4_TIMMODE_CENTER1 = 2,
STM32L4_TIMMODE_CENTER2 = 3,
STM32L4_TIMMODE_CENTER3 = 4,
};
enum stm32_chanmode_e
enum stm32l4_chanmode_e
{
STM32_CHANMODE_PWM1 = 0,
STM32_CHANMODE_PWM2 = 1,
STM32_CHANMODE_COMBINED1 = 2,
STM32_CHANMODE_COMBINED2 = 3,
STM32_CHANMODE_ASYMMETRIC1 = 4,
STM32_CHANMODE_ASYMMETRIC2 = 5,
STM32L4_CHANMODE_PWM1 = 0,
STM32L4_CHANMODE_PWM2 = 1,
STM32L4_CHANMODE_COMBINED1 = 2,
STM32L4_CHANMODE_COMBINED2 = 3,
STM32L4_CHANMODE_ASYMMETRIC1 = 4,
STM32L4_CHANMODE_ASYMMETRIC2 = 5,
};
struct stm32_pwmchan_s
struct stm32l4_pwmchan_s
{
uint8_t channel; /* Timer output channel: {1,..4} */
uint32_t pincfg; /* Output pin configuration */
enum stm32_chanmode_e mode;
enum stm32l4_chanmode_e mode;
};
/* This structure represents the state of one PWM timer */
struct stm32_pwmtimer_s
struct stm32l4_pwmtimer_s
{
FAR const struct pwm_ops_s *ops; /* PWM operations */
uint8_t timid; /* Timer ID {1,...,17} */
struct stm32_pwmchan_s channels[PWM_NCHANNELS];
struct stm32l4_pwmchan_s channels[PWM_NCHANNELS];
uint8_t timtype; /* See the TIMTYPE_* definitions */
enum stm32_timmode_e mode;
enum stm32l4_timmode_e mode;
#ifdef CONFIG_PWM_PULSECOUNT
uint8_t irq; /* Timer update IRQ */
uint8_t prev; /* The previous value of the RCR (pre-loaded) */
@ -160,48 +160,48 @@ struct stm32_pwmtimer_s
****************************************************************************/
/* Register access */
static uint16_t pwm_getreg(struct stm32_pwmtimer_s *priv, int offset);
static void pwm_putreg(struct stm32_pwmtimer_s *priv, int offset, uint16_t value);
static uint16_t stm32l4pwm_getreg(struct stm32l4_pwmtimer_s *priv, int offset);
static void stm32l4pwm_putreg(struct stm32l4_pwmtimer_s *priv, int offset, uint16_t value);
#ifdef CONFIG_DEBUG_PWM_INFO
static void pwm_dumpregs(struct stm32_pwmtimer_s *priv, FAR const char *msg);
static void stm32l4pwm_dumpregs(struct stm32l4_pwmtimer_s *priv, FAR const char *msg);
#else
# define pwm_dumpregs(priv,msg)
# define stm32l4pwm_dumpregs(priv,msg)
#endif
/* Timer management */
static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
FAR const struct pwm_info_s *info);
static int stm32l4pwm_timer(FAR struct stm32l4_pwmtimer_s *priv,
FAR const struct pwm_info_s *info);
#if defined(CONFIG_PWM_PULSECOUNT) && (defined(CONFIG_STM32L4_TIM1_PWM) || defined(CONFIG_STM32L4_TIM8_PWM))
static int pwm_interrupt(struct stm32_pwmtimer_s *priv);
static int stm32l4pwm_interrupt(struct stm32l4_pwmtimer_s *priv);
#if defined(CONFIG_STM32L4_TIM1_PWM)
static int pwm_tim1interrupt(int irq, void *context);
static int stm32l4pwm_tim1interrupt(int irq, void *context);
#endif
#if defined(CONFIG_STM32L4_TIM8_PWM)
static int pwm_tim8interrupt(int irq, void *context);
static int stm32l4pwm_tim8interrupt(int irq, void *context);
#endif
static uint8_t pwm_pulsecount(uint32_t count);
static uint8_t stm32l4pwm_pulsecount(uint32_t count);
#endif
/* PWM driver methods */
static int pwm_setup(FAR struct pwm_lowerhalf_s *dev);
static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev);
static int stm32l4pwm_setup(FAR struct pwm_lowerhalf_s *dev);
static int stm32l4pwm_shutdown(FAR struct pwm_lowerhalf_s *dev);
#ifdef CONFIG_PWM_PULSECOUNT
static int pwm_start(FAR struct pwm_lowerhalf_s *dev,
FAR const struct pwm_info_s *info,
FAR void *handle);
static int stm32l4pwm_start(FAR struct pwm_lowerhalf_s *dev,
FAR const struct pwm_info_s *info,
FAR void *handle);
#else
static int pwm_start(FAR struct pwm_lowerhalf_s *dev,
FAR const struct pwm_info_s *info);
static int stm32l4pwm_start(FAR struct pwm_lowerhalf_s *dev,
FAR const struct pwm_info_s *info);
#endif
static int pwm_stop(FAR struct pwm_lowerhalf_s *dev);
static int pwm_ioctl(FAR struct pwm_lowerhalf_s *dev,
int cmd, unsigned long arg);
static int stm32l4pwm_stop(FAR struct pwm_lowerhalf_s *dev);
static int stm32l4pwm_ioctl(FAR struct pwm_lowerhalf_s *dev,
int cmd, unsigned long arg);
/****************************************************************************
* Private Data
@ -210,15 +210,15 @@ static int pwm_ioctl(FAR struct pwm_lowerhalf_s *dev,
static const struct pwm_ops_s g_pwmops =
{
.setup = pwm_setup,
.shutdown = pwm_shutdown,
.start = pwm_start,
.stop = pwm_stop,
.ioctl = pwm_ioctl,
.setup = stm32l4pwm_setup,
.shutdown = stm32l4pwm_shutdown,
.start = stm32l4pwm_start,
.stop = stm32l4pwm_stop,
.ioctl = stm32l4pwm_ioctl,
};
#ifdef CONFIG_STM32L4_TIM1_PWM
static struct stm32_pwmtimer_s g_pwm1dev =
static struct stm32l4_pwmtimer_s g_pwm1dev =
{
.ops = &g_pwmops,
.timid = 1,
@ -264,7 +264,7 @@ static struct stm32_pwmtimer_s g_pwm1dev =
#endif
#ifdef CONFIG_STM32L4_TIM2_PWM
static struct stm32_pwmtimer_s g_pwm2dev =
static struct stm32l4_pwmtimer_s g_pwm2dev =
{
.ops = &g_pwmops,
.timid = 2,
@ -310,7 +310,7 @@ static struct stm32_pwmtimer_s g_pwm2dev =
#endif
#ifdef CONFIG_STM32L4_TIM3_PWM
static struct stm32_pwmtimer_s g_pwm3dev =
static struct stm32l4_pwmtimer_s g_pwm3dev =
{
.ops = &g_pwmops,
.timid = 3,
@ -356,7 +356,7 @@ static struct stm32_pwmtimer_s g_pwm3dev =
#endif
#ifdef CONFIG_STM32L4_TIM4_PWM
static struct stm32_pwmtimer_s g_pwm4dev =
static struct stm32l4_pwmtimer_s g_pwm4dev =
{
.ops = &g_pwmops,
.timid = 4,
@ -402,7 +402,7 @@ static struct stm32_pwmtimer_s g_pwm4dev =
#endif
#ifdef CONFIG_STM32L4_TIM5_PWM
static struct stm32_pwmtimer_s g_pwm5dev =
static struct stm32l4_pwmtimer_s g_pwm5dev =
{
.ops = &g_pwmops,
.timid = 5,
@ -448,7 +448,7 @@ static struct stm32_pwmtimer_s g_pwm5dev =
#endif
#ifdef CONFIG_STM32L4_TIM8_PWM
static struct stm32_pwmtimer_s g_pwm8dev =
static struct stm32l4_pwmtimer_s g_pwm8dev =
{
.ops = &g_pwmops,
.timid = 8,
@ -494,7 +494,7 @@ static struct stm32_pwmtimer_s g_pwm8dev =
#endif
#ifdef CONFIG_STM32L4_TIM15_PWM
static struct stm32_pwmtimer_s g_pwm15dev =
static struct stm32l4_pwmtimer_s g_pwm15dev =
{
.ops = &g_pwmops,
.timid = 15,
@ -526,7 +526,7 @@ static struct stm32_pwmtimer_s g_pwm15dev =
#endif
#ifdef CONFIG_STM32L4_TIM16_PWM
static struct stm32_pwmtimer_s g_pwm16dev =
static struct stm32l4_pwmtimer_s g_pwm16dev =
{
.ops = &g_pwmops,
.timid = 16,
@ -551,7 +551,7 @@ static struct stm32_pwmtimer_s g_pwm16dev =
#endif
#ifdef CONFIG_STM32L4_TIM17_PWM
static struct stm32_pwmtimer_s g_pwm17dev =
static struct stm32l4_pwmtimer_s g_pwm17dev =
{
.ops = &g_pwmops,
.timid = 17,
@ -580,7 +580,7 @@ static struct stm32_pwmtimer_s g_pwm17dev =
****************************************************************************/
/****************************************************************************
* Name: pwm_getreg
* Name: stm32l4pwm_getreg
*
* Description:
* Read the value of an PWM timer register.
@ -594,13 +594,13 @@ static struct stm32_pwmtimer_s g_pwm17dev =
*
****************************************************************************/
static uint16_t pwm_getreg(struct stm32_pwmtimer_s *priv, int offset)
static uint16_t stm32l4pwm_getreg(struct stm32l4_pwmtimer_s *priv, int offset)
{
return getreg16(priv->base + offset);
}
/****************************************************************************
* Name: pwm_putreg
* Name: stm32l4pwm_putreg
*
* Description:
* Read the value of an PWM timer register.
@ -614,7 +614,8 @@ static uint16_t pwm_getreg(struct stm32_pwmtimer_s *priv, int offset)
*
****************************************************************************/
static void pwm_putreg(struct stm32_pwmtimer_s *priv, int offset, uint16_t value)
static void stm32l4pwm_putreg(struct stm32l4_pwmtimer_s *priv, int offset,
uint16_t value)
{
if (priv->timtype == TIMTYPE_GENERAL32 &&
(offset == STM32L4_GTIM_CNT_OFFSET ||
@ -639,7 +640,7 @@ static void pwm_putreg(struct stm32_pwmtimer_s *priv, int offset, uint16_t value
}
/****************************************************************************
* Name: pwm_dumpregs
* Name: stm32l4pwm_dumpregs
*
* Description:
* Dump all timer registers.
@ -653,50 +654,51 @@ static void pwm_putreg(struct stm32_pwmtimer_s *priv, int offset, uint16_t value
****************************************************************************/
#ifdef CONFIG_DEBUG_PWM_INFO
static void pwm_dumpregs(struct stm32_pwmtimer_s *priv, FAR const char *msg)
static void stm32l4pwm_dumpregs(struct stm32l4_pwmtimer_s *priv,
FAR const char *msg)
{
pwminfo("%s:\n", msg);
pwminfo(" CR1: %04x CR2: %04x SMCR: %04x DIER: %04x\n",
pwm_getreg(priv, STM32L4_GTIM_CR1_OFFSET),
pwm_getreg(priv, STM32L4_GTIM_CR2_OFFSET),
pwm_getreg(priv, STM32L4_GTIM_SMCR_OFFSET),
pwm_getreg(priv, STM32L4_GTIM_DIER_OFFSET));
stm32l4pwm_getreg(priv, STM32L4_GTIM_CR1_OFFSET),
stm32l4pwm_getreg(priv, STM32L4_GTIM_CR2_OFFSET),
stm32l4pwm_getreg(priv, STM32L4_GTIM_SMCR_OFFSET),
stm32l4pwm_getreg(priv, STM32L4_GTIM_DIER_OFFSET));
pwminfo(" SR: %04x EGR: %04x CCMR1: %04x CCMR2: %04x\n",
pwm_getreg(priv, STM32L4_GTIM_SR_OFFSET),
pwm_getreg(priv, STM32L4_GTIM_EGR_OFFSET),
pwm_getreg(priv, STM32L4_GTIM_CCMR1_OFFSET),
pwm_getreg(priv, STM32L4_GTIM_CCMR2_OFFSET));
stm32l4pwm_getreg(priv, STM32L4_GTIM_SR_OFFSET),
stm32l4pwm_getreg(priv, STM32L4_GTIM_EGR_OFFSET),
stm32l4pwm_getreg(priv, STM32L4_GTIM_CCMR1_OFFSET),
stm32l4pwm_getreg(priv, STM32L4_GTIM_CCMR2_OFFSET));
pwminfo(" CCER: %04x CNT: %04x PSC: %04x ARR: %04x\n",
pwm_getreg(priv, STM32L4_GTIM_CCER_OFFSET),
pwm_getreg(priv, STM32L4_GTIM_CNT_OFFSET),
pwm_getreg(priv, STM32L4_GTIM_PSC_OFFSET),
pwm_getreg(priv, STM32L4_GTIM_ARR_OFFSET));
stm32l4pwm_getreg(priv, STM32L4_GTIM_CCER_OFFSET),
stm32l4pwm_getreg(priv, STM32L4_GTIM_CNT_OFFSET),
stm32l4pwm_getreg(priv, STM32L4_GTIM_PSC_OFFSET),
stm32l4pwm_getreg(priv, STM32L4_GTIM_ARR_OFFSET));
pwminfo(" CCR1: %04x CCR2: %04x CCR3: %04x CCR4: %04x\n",
pwm_getreg(priv, STM32L4_GTIM_CCR1_OFFSET),
pwm_getreg(priv, STM32L4_GTIM_CCR2_OFFSET),
pwm_getreg(priv, STM32L4_GTIM_CCR3_OFFSET),
pwm_getreg(priv, STM32L4_GTIM_CCR4_OFFSET));
stm32l4pwm_getreg(priv, STM32L4_GTIM_CCR1_OFFSET),
stm32l4pwm_getreg(priv, STM32L4_GTIM_CCR2_OFFSET),
stm32l4pwm_getreg(priv, STM32L4_GTIM_CCR3_OFFSET),
stm32l4pwm_getreg(priv, STM32L4_GTIM_CCR4_OFFSET));
#if defined(CONFIG_STM32L4_TIM1_PWM) || defined(CONFIG_STM32L4_TIM8_PWM)
if (priv->timtype == TIMTYPE_ADVANCED)
{
pwminfo(" RCR: %04x BDTR: %04x DCR: %04x DMAR: %04x\n",
pwm_getreg(priv, STM32L4_ATIM_RCR_OFFSET),
pwm_getreg(priv, STM32L4_ATIM_BDTR_OFFSET),
pwm_getreg(priv, STM32L4_ATIM_DCR_OFFSET),
pwm_getreg(priv, STM32L4_ATIM_DMAR_OFFSET));
stm32l4pwm_getreg(priv, STM32L4_ATIM_RCR_OFFSET),
stm32l4pwm_getreg(priv, STM32L4_ATIM_BDTR_OFFSET),
stm32l4pwm_getreg(priv, STM32L4_ATIM_DCR_OFFSET),
stm32l4pwm_getreg(priv, STM32L4_ATIM_DMAR_OFFSET));
}
else
#endif
{
pwminfo(" DCR: %04x DMAR: %04x\n",
pwm_getreg(priv, STM32L4_GTIM_DCR_OFFSET),
pwm_getreg(priv, STM32L4_GTIM_DMAR_OFFSET));
stm32l4pwm_getreg(priv, STM32L4_GTIM_DCR_OFFSET),
stm32l4pwm_getreg(priv, STM32L4_GTIM_DMAR_OFFSET));
}
}
#endif
/****************************************************************************
* Name: pwm_timer
* Name: stm32l4pwm_timer
*
* Description:
* (Re-)initialize the timer resources and start the pulsed output
@ -710,8 +712,8 @@ static void pwm_dumpregs(struct stm32_pwmtimer_s *priv, FAR const char *msg)
*
****************************************************************************/
static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
FAR const struct pwm_info_s *info)
static int stm32l4pwm_timer(FAR struct stm32l4_pwmtimer_s *priv,
FAR const struct pwm_info_s *info)
{
#ifdef CONFIG_PWM_MULTICHAN
int i;
@ -760,8 +762,8 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
/* Disable all interrupts and DMA requests, clear all pending status */
#ifdef CONFIG_PWM_PULSECOUNT
pwm_putreg(priv, STM32L4_GTIM_DIER_OFFSET, 0);
pwm_putreg(priv, STM32L4_GTIM_SR_OFFSET, 0);
stm32l4pwm_putreg(priv, STM32L4_GTIM_DIER_OFFSET, 0);
stm32l4pwm_putreg(priv, STM32L4_GTIM_SR_OFFSET, 0);
#endif
/* Calculate optimal values for the timer prescaler and for the timer reload
@ -831,7 +833,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
* 15-17 CKD[1:0] ARPE OPM URS UDIS CEN
*/
cr1 = pwm_getreg(priv, STM32L4_GTIM_CR1_OFFSET);
cr1 = stm32l4pwm_getreg(priv, STM32L4_GTIM_CR1_OFFSET);
/* Disable the timer until we get it configured */
@ -861,23 +863,23 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
switch (priv->mode)
{
case STM32_TIMMODE_COUNTUP:
case STM32L4_TIMMODE_COUNTUP:
cr1 |= GTIM_CR1_EDGE;
break;
case STM32_TIMMODE_COUNTDOWN:
case STM32L4_TIMMODE_COUNTDOWN:
cr1 |= GTIM_CR1_EDGE | GTIM_CR1_DIR;
break;
case STM32_TIMMODE_CENTER1:
case STM32L4_TIMMODE_CENTER1:
cr1 |= GTIM_CR1_CENTER1;
break;
case STM32_TIMMODE_CENTER2:
case STM32L4_TIMMODE_CENTER2:
cr1 |= GTIM_CR1_CENTER2;
break;
case STM32_TIMMODE_CENTER3:
case STM32L4_TIMMODE_CENTER3:
cr1 |= GTIM_CR1_CENTER3;
break;
@ -893,12 +895,12 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
*/
cr1 &= ~GTIM_CR1_CKD_MASK;
pwm_putreg(priv, STM32L4_GTIM_CR1_OFFSET, cr1);
stm32l4pwm_putreg(priv, STM32L4_GTIM_CR1_OFFSET, cr1);
/* Set the reload and prescaler values */
pwm_putreg(priv, STM32L4_GTIM_ARR_OFFSET, (uint16_t)reload);
pwm_putreg(priv, STM32L4_GTIM_PSC_OFFSET, (uint16_t)(prescaler - 1));
stm32l4pwm_putreg(priv, STM32L4_GTIM_ARR_OFFSET, (uint16_t)reload);
stm32l4pwm_putreg(priv, STM32L4_GTIM_PSC_OFFSET, (uint16_t)(prescaler - 1));
/* Set the advanced timer's repetition counter */
@ -906,7 +908,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
if (priv->timtype == TIMTYPE_ADVANCED)
{
/* If a non-zero repetition count has been selected, then set the
* repitition counter to the count-1 (pwm_start() has already
* repitition counter to the count-1 (stm32l4pwm_start() has already
* assured us that the count value is within range).
*/
@ -922,22 +924,22 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
* value.
*/
priv->prev = pwm_pulsecount(info->count);
pwm_putreg(priv, STM32L4_ATIM_RCR_OFFSET, (uint16_t)priv->prev - 1);
priv->prev = stm32l4pwm_pulsecount(info->count);
stm32l4pwm_putreg(priv, STM32L4_ATIM_RCR_OFFSET, (uint16_t)priv->prev - 1);
/* Generate an update event to reload the prescaler. This should
* preload the RCR into active repetition counter.
*/
pwm_putreg(priv, STM32L4_GTIM_EGR_OFFSET, ATIM_EGR_UG);
stm32l4pwm_putreg(priv, STM32L4_GTIM_EGR_OFFSET, ATIM_EGR_UG);
/* Now set the value of the RCR that will be loaded on the next
* update event.
*/
priv->count = info->count;
priv->curr = pwm_pulsecount(info->count - priv->prev);
pwm_putreg(priv, STM32L4_ATIM_RCR_OFFSET, (uint16_t)priv->curr - 1);
priv->curr = stm32l4pwm_pulsecount(info->count - priv->prev);
stm32l4pwm_putreg(priv, STM32L4_ATIM_RCR_OFFSET, (uint16_t)priv->curr - 1);
}
/* Otherwise, just clear the repetition counter */
@ -947,11 +949,11 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
{
/* Set the repetition counter to zero */
pwm_putreg(priv, STM32L4_ATIM_RCR_OFFSET, 0);
stm32l4pwm_putreg(priv, STM32L4_ATIM_RCR_OFFSET, 0);
/* Generate an update event to reload the prescaler */
pwm_putreg(priv, STM32L4_GTIM_EGR_OFFSET, ATIM_EGR_UG);
stm32l4pwm_putreg(priv, STM32L4_GTIM_EGR_OFFSET, ATIM_EGR_UG);
}
}
else
@ -959,7 +961,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
{
/* Generate an update event to reload the prescaler (all timers) */
pwm_putreg(priv, STM32L4_GTIM_EGR_OFFSET, ATIM_EGR_UG);
stm32l4pwm_putreg(priv, STM32L4_GTIM_EGR_OFFSET, ATIM_EGR_UG);
}
/* Handle channel specific setup */
@ -979,7 +981,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
#ifdef CONFIG_PWM_MULTICHAN
int j;
#endif
enum stm32_chanmode_e mode;
enum stm32l4_chanmode_e mode;
#ifdef CONFIG_PWM_MULTICHAN
duty = info->channels[i].duty;
@ -1025,30 +1027,30 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
switch (mode)
{
case STM32_CHANMODE_PWM1:
case STM32L4_CHANMODE_PWM1:
chanmode = ATIM_CCMR_MODE_PWM1;
break;
case STM32_CHANMODE_PWM2:
case STM32L4_CHANMODE_PWM2:
chanmode = ATIM_CCMR_MODE_PWM2;
break;
case STM32_CHANMODE_COMBINED1:
case STM32L4_CHANMODE_COMBINED1:
chanmode = ATIM_CCMR_MODE_COMBINED1;
ocmbit = true;
break;
case STM32_CHANMODE_COMBINED2:
case STM32L4_CHANMODE_COMBINED2:
chanmode = ATIM_CCMR_MODE_COMBINED2;
ocmbit = true;
break;
case STM32_CHANMODE_ASYMMETRIC1:
case STM32L4_CHANMODE_ASYMMETRIC1:
chanmode = ATIM_CCMR_MODE_ASYMMETRIC1;
ocmbit = true;
break;
case STM32_CHANMODE_ASYMMETRIC2:
case STM32L4_CHANMODE_ASYMMETRIC2:
chanmode = ATIM_CCMR_MODE_ASYMMETRIC2;
ocmbit = true;
break;
@ -1079,7 +1081,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
/* Set the duty cycle by writing to the CCR register for this channel */
pwm_putreg(priv, STM32L4_GTIM_CCR1_OFFSET, (uint16_t)ccr);
stm32l4pwm_putreg(priv, STM32L4_GTIM_CCR1_OFFSET, (uint16_t)ccr);
}
break;
@ -1102,7 +1104,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
/* Set the duty cycle by writing to the CCR register for this channel */
pwm_putreg(priv, STM32L4_GTIM_CCR2_OFFSET, (uint16_t)ccr);
stm32l4pwm_putreg(priv, STM32L4_GTIM_CCR2_OFFSET, (uint16_t)ccr);
}
break;
@ -1125,7 +1127,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
/* Set the duty cycle by writing to the CCR register for this channel */
pwm_putreg(priv, STM32L4_GTIM_CCR3_OFFSET, (uint16_t)ccr);
stm32l4pwm_putreg(priv, STM32L4_GTIM_CCR3_OFFSET, (uint16_t)ccr);
}
break;
@ -1148,7 +1150,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
/* Set the duty cycle by writing to the CCR register for this channel */
pwm_putreg(priv, STM32L4_GTIM_CCR4_OFFSET, (uint16_t)ccr);
stm32l4pwm_putreg(priv, STM32L4_GTIM_CCR4_OFFSET, (uint16_t)ccr);
}
break;
@ -1160,15 +1162,15 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
/* Disable the Channel by resetting the CCxE Bit in the CCER register */
ccer = pwm_getreg(priv, STM32L4_GTIM_CCER_OFFSET);
ccer = stm32l4pwm_getreg(priv, STM32L4_GTIM_CCER_OFFSET);
ccer &= ~ccenable;
pwm_putreg(priv, STM32L4_GTIM_CCER_OFFSET, ccer);
stm32l4pwm_putreg(priv, STM32L4_GTIM_CCER_OFFSET, ccer);
/* Fetch the CR2, CCMR1, and CCMR2 register (already have cr1 and ccer) */
cr2 = pwm_getreg(priv, STM32L4_GTIM_CR2_OFFSET);
ccmr1 = pwm_getreg(priv, STM32L4_GTIM_CCMR1_OFFSET);
ccmr2 = pwm_getreg(priv, STM32L4_GTIM_CCMR2_OFFSET);
cr2 = stm32l4pwm_getreg(priv, STM32L4_GTIM_CR2_OFFSET);
ccmr1 = stm32l4pwm_getreg(priv, STM32L4_GTIM_CCMR1_OFFSET);
ccmr2 = stm32l4pwm_getreg(priv, STM32L4_GTIM_CCMR2_OFFSET);
/* Reset the Output Compare Mode Bits and set the select output compare mode */
@ -1215,10 +1217,10 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
* bits in the BDTR register.
*/
bdtr = pwm_getreg(priv, STM32L4_ATIM_BDTR_OFFSET);
bdtr = stm32l4pwm_getreg(priv, STM32L4_ATIM_BDTR_OFFSET);
bdtr &= ~(ATIM_BDTR_OSSI | ATIM_BDTR_OSSR);
bdtr |= ATIM_BDTR_MOE;
pwm_putreg(priv, STM32L4_ATIM_BDTR_OFFSET, bdtr);
stm32l4pwm_putreg(priv, STM32L4_ATIM_BDTR_OFFSET, bdtr);
}
else
#endif
@ -1228,19 +1230,19 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
/* Save the modified register values */
pwm_putreg(priv, STM32L4_GTIM_CR2_OFFSET, cr2);
stm32l4pwm_putreg(priv, STM32L4_GTIM_CR2_OFFSET, cr2);
putreg32(ccmr1, priv->base + STM32L4_GTIM_CCMR1_OFFSET);
putreg32(ccmr2, priv->base + STM32L4_GTIM_CCMR2_OFFSET);
pwm_putreg(priv, STM32L4_GTIM_CCER_OFFSET, ccer);
stm32l4pwm_putreg(priv, STM32L4_GTIM_CCER_OFFSET, ccer);
/* Set the ARR Preload Bit */
cr1 = pwm_getreg(priv, STM32L4_GTIM_CR1_OFFSET);
cr1 = stm32l4pwm_getreg(priv, STM32L4_GTIM_CR1_OFFSET);
cr1 |= GTIM_CR1_ARPE;
pwm_putreg(priv, STM32L4_GTIM_CR1_OFFSET, cr1);
stm32l4pwm_putreg(priv, STM32L4_GTIM_CR1_OFFSET, cr1);
/* Setup update interrupt. If info->count is > 0, then we can be
* assured that pwm_start() has already verified: (1) that this is an
* assured that stm32l4pwm_start() has already verified: (1) that this is an
* advanced timer, and that (2) the repetition count is within range.
*/
@ -1249,13 +1251,13 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
{
/* Clear all pending interrupts and enable the update interrupt. */
pwm_putreg(priv, STM32L4_GTIM_SR_OFFSET, 0);
pwm_putreg(priv, STM32L4_GTIM_DIER_OFFSET, ATIM_DIER_UIE);
stm32l4pwm_putreg(priv, STM32L4_GTIM_SR_OFFSET, 0);
stm32l4pwm_putreg(priv, STM32L4_GTIM_DIER_OFFSET, ATIM_DIER_UIE);
/* Enable the timer */
cr1 |= GTIM_CR1_CEN;
pwm_putreg(priv, STM32L4_GTIM_CR1_OFFSET, cr1);
stm32l4pwm_putreg(priv, STM32L4_GTIM_CR1_OFFSET, cr1);
/* And enable timer interrupts at the NVIC */
@ -1267,16 +1269,16 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
/* Just enable the timer, leaving all interrupts disabled */
cr1 |= GTIM_CR1_CEN;
pwm_putreg(priv, STM32L4_GTIM_CR1_OFFSET, cr1);
stm32l4pwm_putreg(priv, STM32L4_GTIM_CR1_OFFSET, cr1);
}
pwm_dumpregs(priv, "After starting");
stm32l4pwm_dumpregs(priv, "After starting");
return OK;
}
#ifndef CONFIG_PWM_PULSECOUNT
/****************************************************************************
* Name: pwm_update_duty
* Name: stm32l4pwm_update_duty
*
* Description:
* Try to change only channel duty.
@ -1291,8 +1293,8 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv,
*
****************************************************************************/
static int pwm_update_duty(FAR struct stm32_pwmtimer_s *priv, uint8_t channel,
ub16_t duty)
static int stm32l4pwm_update_duty(FAR struct stm32l4_pwmtimer_s *priv,
uint8_t channel, ub16_t duty)
{
/* Register offset */
@ -1315,7 +1317,7 @@ static int pwm_update_duty(FAR struct stm32_pwmtimer_s *priv, uint8_t channel,
/* Get the reload values */
reload = pwm_getreg(priv, STM32L4_GTIM_ARR_OFFSET);
reload = stm32l4pwm_getreg(priv, STM32L4_GTIM_ARR_OFFSET);
/* Duty cycle:
*
@ -1351,14 +1353,14 @@ static int pwm_update_duty(FAR struct stm32_pwmtimer_s *priv, uint8_t channel,
/* Set the duty cycle by writing to the CCR register for this channel */
pwm_putreg(priv, ccr_offset, (uint16_t)ccr);
stm32l4pwm_putreg(priv, ccr_offset, (uint16_t)ccr);
return OK;
}
#endif
/****************************************************************************
* Name: pwm_interrupt
* Name: stm32l4pwm_interrupt
*
* Description:
* Handle timer interrupts.
@ -1371,19 +1373,19 @@ static int pwm_update_duty(FAR struct stm32_pwmtimer_s *priv, uint8_t channel,
*
****************************************************************************/
#if defined(CONFIG_PWM_PULSECOUNT) && (defined(CONFIG_STM32_TIM1_PWM) || defined(CONFIG_STM32_TIM8_PWM))
static int pwm_interrupt(struct stm32_pwmtimer_s *priv)
#if defined(CONFIG_PWM_PULSECOUNT) && (defined(CONFIG_STM32L4_TIM1_PWM) || defined(CONFIG_STM32L4_TIM8_PWM))
static int stm32l4pwm_interrupt(struct stm32l4_pwmtimer_s *priv)
{
uint16_t regval;
/* Verify that this is an update interrupt. Nothing else is expected. */
regval = pwm_getreg(priv, STM32L4_ATIM_SR_OFFSET);
regval = stm32l4pwm_getreg(priv, STM32L4_ATIM_SR_OFFSET);
DEBUGASSERT((regval & ATIM_SR_UIF) != 0);
/* Clear the UIF interrupt bit */
pwm_putreg(priv, STM32L4_ATIM_SR_OFFSET, regval & ~ATIM_SR_UIF);
stm32l4pwm_putreg(priv, STM32L4_ATIM_SR_OFFSET, regval & ~ATIM_SR_UIF);
/* Calculate the new count by subtracting the number of pulses
* since the last interrupt.
@ -1395,13 +1397,13 @@ static int pwm_interrupt(struct stm32_pwmtimer_s *priv)
* quickly as possible.
*/
regval = pwm_getreg(priv, STM32L4_ATIM_BDTR_OFFSET);
regval = stm32l4pwm_getreg(priv, STM32L4_ATIM_BDTR_OFFSET);
regval &= ~ATIM_BDTR_MOE;
pwm_putreg(priv, STM32L4_ATIM_BDTR_OFFSET, regval);
stm32l4pwm_putreg(priv, STM32L4_ATIM_BDTR_OFFSET, regval);
/* Disable first interrtups, stop and reset the timer */
(void)pwm_stop((FAR struct pwm_lowerhalf_s *)priv);
(void)stm32l4pwm_stop((FAR struct pwm_lowerhalf_s *)priv);
/* Then perform the callback into the upper half driver */
@ -1427,8 +1429,8 @@ static int pwm_interrupt(struct stm32_pwmtimer_s *priv)
*/
priv->prev = priv->curr;
priv->curr = pwm_pulsecount(priv->count - priv->prev);
pwm_putreg(priv, STM32L4_ATIM_RCR_OFFSET, (uint16_t)priv->curr - 1);
priv->curr = stm32l4pwm_pulsecount(priv->count - priv->prev);
stm32l4pwm_putreg(priv, STM32L4_ATIM_RCR_OFFSET, (uint16_t)priv->curr - 1);
}
/* Now all of the time critical stuff is done so we can do some debug output */
@ -1454,22 +1456,22 @@ static int pwm_interrupt(struct stm32_pwmtimer_s *priv)
*
****************************************************************************/
#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_STM32_TIM1_PWM)
static int pwm_tim1interrupt(int irq, void *context)
#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_STM32L4_TIM1_PWM)
static int stm32l4pwm_tim1interrupt(int irq, void *context)
{
return pwm_interrupt(&g_pwm1dev);
return stm32l4pwm_interrupt(&g_pwm1dev);
}
#endif
#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_STM32_TIM8_PWM)
static int pwm_tim8interrupt(int irq, void *context)
#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_STM32L4_TIM8_PWM)
static int stm32l4pwm_tim8interrupt(int irq, void *context)
{
return pwm_interrupt(&g_pwm8dev);
return stm32l4pwm_interrupt(&g_pwm8dev);
}
#endif
/****************************************************************************
* Name: pwm_pulsecount
* Name: stm32l4pwm_pulsecount
*
* Description:
* Pick an optimal pulse count to program the RCR.
@ -1482,8 +1484,8 @@ static int pwm_tim8interrupt(int irq, void *context)
*
****************************************************************************/
#if defined(CONFIG_PWM_PULSECOUNT) && (defined(CONFIG_STM32_TIM1_PWM) || defined(CONFIG_STM32_TIM8_PWM))
static uint8_t pwm_pulsecount(uint32_t count)
#if defined(CONFIG_PWM_PULSECOUNT) && (defined(CONFIG_STM32L4_TIM1_PWM) || defined(CONFIG_STM32L4_TIM8_PWM))
static uint8_t stm32l4pwm_pulsecount(uint32_t count)
{
/* The the remaining pulse count is less than or equal to the maximum, the
* just return the count.
@ -1516,7 +1518,7 @@ static uint8_t pwm_pulsecount(uint32_t count)
#endif
/****************************************************************************
* Name: pwm_set_apb_clock
* Name: stm32l4pwm_setapbclock
*
* Description:
* Enable or disable APB clock for the timer peripheral
@ -1527,7 +1529,7 @@ static uint8_t pwm_pulsecount(uint32_t count)
*
****************************************************************************/
static void pwm_set_apb_clock(FAR struct stm32_pwmtimer_s *priv, bool on)
static void stm32l4pwm_setapbclock(FAR struct stm32l4_pwmtimer_s *priv, bool on)
{
uint32_t en_bit;
uint32_t regaddr;
@ -1607,7 +1609,7 @@ static void pwm_set_apb_clock(FAR struct stm32_pwmtimer_s *priv, bool on)
}
/****************************************************************************
* Name: pwm_setup
* Name: stm32l4pwm_setup
*
* Description:
* This method is called when the driver is opened. The lower half driver
@ -1626,18 +1628,18 @@ static void pwm_set_apb_clock(FAR struct stm32_pwmtimer_s *priv, bool on)
*
****************************************************************************/
static int pwm_setup(FAR struct pwm_lowerhalf_s *dev)
static int stm32l4pwm_setup(FAR struct pwm_lowerhalf_s *dev)
{
FAR struct stm32_pwmtimer_s *priv = (FAR struct stm32_pwmtimer_s *)dev;
FAR struct stm32l4_pwmtimer_s *priv = (FAR struct stm32l4_pwmtimer_s *)dev;
uint32_t pincfg;
int i;
pwminfo("TIM%u\n", priv->timid);
pwm_dumpregs(priv, "Initially");
stm32l4pwm_dumpregs(priv, "Initially");
/* Enable APB1/2 clocking for timer. */
pwm_set_apb_clock(priv, true);
stm32l4pwm_setapbclock(priv, true);
/* Configure the PWM output pins, but do not start the timer yet */
@ -1651,7 +1653,7 @@ static int pwm_setup(FAR struct pwm_lowerhalf_s *dev)
pwminfo("pincfg: %08x\n", pincfg);
stm32_configgpio(pincfg);
stm32l4_configgpio(pincfg);
pwm_dumpgpio(pincfg, "PWM setup");
}
@ -1659,7 +1661,7 @@ static int pwm_setup(FAR struct pwm_lowerhalf_s *dev)
}
/****************************************************************************
* Name: pwm_shutdown
* Name: stm32l4pwm_shutdown
*
* Description:
* This method is called when the driver is closed. The lower half driver
@ -1674,9 +1676,9 @@ static int pwm_setup(FAR struct pwm_lowerhalf_s *dev)
*
****************************************************************************/
static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
static int stm32l4pwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
{
FAR struct stm32_pwmtimer_s *priv = (FAR struct stm32_pwmtimer_s *)dev;
FAR struct stm32l4_pwmtimer_s *priv = (FAR struct stm32l4_pwmtimer_s *)dev;
uint32_t pincfg;
int i;
@ -1684,11 +1686,11 @@ static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
/* Make sure that the output has been stopped */
pwm_stop(dev);
stm32l4pwm_stop(dev);
/* Disable APB1/2 clocking for timer. */
pwm_set_apb_clock(priv, false);
stm32l4pwm_setapbclock(priv, false);
/* Then put the GPIO pins back to the default state */
@ -1706,14 +1708,14 @@ static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
pincfg |= GPIO_INPUT | GPIO_FLOAT;
stm32_configgpio(pincfg);
stm32l4_configgpio(pincfg);
}
return OK;
}
/****************************************************************************
* Name: pwm_start
* Name: stm32l4pwm_start
*
* Description:
* (Re-)initialize the timer resources and start the pulsed output
@ -1728,11 +1730,11 @@ static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
****************************************************************************/
#ifdef CONFIG_PWM_PULSECOUNT
static int pwm_start(FAR struct pwm_lowerhalf_s *dev,
static int stm32l4pwm_start(FAR struct pwm_lowerhalf_s *dev,
FAR const struct pwm_info_s *info,
FAR void *handle)
{
FAR struct stm32_pwmtimer_s *priv = (FAR struct stm32_pwmtimer_s *)dev;
FAR struct stm32l4_pwmtimer_s *priv = (FAR struct stm32l4_pwmtimer_s *)dev;
/* Check if a pulsecount has been selected */
@ -1754,14 +1756,14 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev,
/* Start the time */
return pwm_timer(priv, info);
return stm32l4pwm_timer(priv, info);
}
#else
static int pwm_start(FAR struct pwm_lowerhalf_s *dev,
static int stm32l4pwm_start(FAR struct pwm_lowerhalf_s *dev,
FAR const struct pwm_info_s *info)
{
int ret = OK;
FAR struct stm32_pwmtimer_s *priv = (FAR struct stm32_pwmtimer_s *)dev;
FAR struct stm32l4_pwmtimer_s *priv = (FAR struct stm32l4_pwmtimer_s *)dev;
#ifndef CONFIG_PWM_PULSECOUNT
/* if frequency has not changed we just update duty */
@ -1773,17 +1775,17 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev,
for (i = 0; ret == OK && i < CONFIG_PWM_NCHANNELS; i++)
{
ret = pwm_update_duty(priv,info->channels[i].channel,
ret = stm32l4pwm_update_duty(priv,info->channels[i].channel,
info->channels[i].duty);
}
#else
ret = pwm_update_duty(priv,priv->channels[0].channel,info->duty);
ret = stm32l4pwm_update_duty(priv,priv->channels[0].channel,info->duty);
#endif
}
else
#endif
{
ret = pwm_timer(priv, info);
ret = stm32l4pwm_timer(priv, info);
#ifndef CONFIG_PWM_PULSECOUNT
/* Save current frequency */
@ -1800,7 +1802,7 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev,
#endif
/****************************************************************************
* Name: pwm_stop
* Name: stm32l4pwm_stop
*
* Description:
* Stop the pulsed output and reset the timer resources
@ -1818,9 +1820,9 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev,
*
****************************************************************************/
static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
static int stm32l4pwm_stop(FAR struct pwm_lowerhalf_s *dev)
{
FAR struct stm32_pwmtimer_s *priv = (FAR struct stm32_pwmtimer_s *)dev;
FAR struct stm32l4_pwmtimer_s *priv = (FAR struct stm32l4_pwmtimer_s *)dev;
uint32_t resetbit;
uint32_t regaddr;
uint32_t regval;
@ -1840,8 +1842,8 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
/* Disable further interrupts and stop the timer */
pwm_putreg(priv, STM32L4_GTIM_DIER_OFFSET, 0);
pwm_putreg(priv, STM32L4_GTIM_SR_OFFSET, 0);
stm32l4pwm_putreg(priv, STM32L4_GTIM_DIER_OFFSET, 0);
stm32l4pwm_putreg(priv, STM32L4_GTIM_SR_OFFSET, 0);
/* Determine which timer to reset */
@ -1900,7 +1902,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
}
/* Reset the timer - stopping the output and putting the timer back
* into a state where pwm_start() can be called.
* into a state where stm32l4pwm_start() can be called.
*/
regval = getreg32(regaddr);
@ -1912,12 +1914,12 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
leave_critical_section(flags);
pwminfo("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
pwm_dumpregs(priv, "After stop");
stm32l4pwm_dumpregs(priv, "After stop");
return OK;
}
/****************************************************************************
* Name: pwm_ioctl
* Name: stm32l4pwm_ioctl
*
* Description:
* Lower-half logic may support platform-specific ioctl commands
@ -1932,10 +1934,11 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
*
****************************************************************************/
static int pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd, unsigned long arg)
static int stm32l4pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd,
unsigned long arg)
{
#ifdef CONFIG_DEBUG_PWM_INFO
FAR struct stm32_pwmtimer_s *priv = (FAR struct stm32_pwmtimer_s *)dev;
FAR struct stm32l4_pwmtimer_s *priv = (FAR struct stm32l4_pwmtimer_s *)dev;
/* There are no platform-specific ioctl commands */
@ -1967,7 +1970,7 @@ static int pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd, unsigned long arg
FAR struct pwm_lowerhalf_s *stm32l4_pwminitialize(int timer)
{
FAR struct stm32_pwmtimer_s *lower;
FAR struct stm32l4_pwmtimer_s *lower;
pwminfo("TIM%u\n", timer);
@ -1980,7 +1983,7 @@ FAR struct pwm_lowerhalf_s *stm32l4_pwminitialize(int timer)
/* Attach but disable the TIM1 update interrupt */
#ifdef CONFIG_PWM_PULSECOUNT
irq_attach(lower->irq, pwm_tim1interrupt);
irq_attach(lower->irq, stm32l4pwm_tim1interrupt);
up_disable_irq(lower->irq);
#endif
break;
@ -2017,7 +2020,7 @@ FAR struct pwm_lowerhalf_s *stm32l4_pwminitialize(int timer)
/* Attach but disable the TIM8 update interrupt */
#ifdef CONFIG_PWM_PULSECOUNT
irq_attach(lower->irq, pwm_tim8interrupt);
irq_attach(lower->irq, stm32l4pwm_tim8interrupt);
up_disable_irq(lower->irq);
#endif
break;

2
arch/arm/src/stm32l4/stm32l4_rcc.c
View file

@ -140,7 +140,7 @@ static inline void rcc_resetbkp(void)
****************************************************************************/
/****************************************************************************
* Name: stm32_clockconfig
* Name: stm32l4_clockconfig
*
* Description:
* Called to establish the clock settings based on the values in board.h.

6
arch/arm/src/stm32l4/stm32l4_rtc_lowerhalf.c
View file

@ -57,7 +57,7 @@
* Pre-processor Definitions
****************************************************************************/
#define STM32_NALARMS 2
#define STM32L4_NALARMS 2
/****************************************************************************
* Private Types
@ -93,7 +93,7 @@ struct stm32l4_lowerhalf_s
#ifdef CONFIG_RTC_ALARM
/* Alarm callback information */
struct stm32l4_cbinfo_s cbinfo[STM32_NALARMS];
struct stm32l4_cbinfo_s cbinfo[STM32L4_NALARMS];
#endif
};
@ -200,7 +200,7 @@ static void stm32l4_alarm_callback(FAR void *arg, unsigned int alarmid)
#endif /* CONFIG_RTC_ALARM */
/****************************************************************************
* Name: stm32_rdtime
* Name: stm32l4_rdtime
*
* Description:
* Implements the rdtime() method of the RTC driver interface

4
arch/arm/src/stm32l4/stm32l4_rtcc.c
View file

@ -535,7 +535,7 @@ static void rtc_resume(void)
************************************************************************************/
#ifdef CONFIG_RTC_ALARM
static int stm32l4_rtc_alarm_handler(int irq, void *context)
static int stm32l4_rtc_alarm_handler(int irq, FAR void *context)
{
FAR struct alm_cbinfo_s *cbinfo;
alm_callback_t cb;
@ -685,7 +685,7 @@ static int rtchw_check_alrbwf(void)
#endif
/************************************************************************************
* Name: stm32_rtchw_set_alrmXr X is a or b
* Name: stm32l4_rtchw_set_alrmXr X is a or b
*
* Description:
* Set the alarm (A or B) hardware registers, using the required hardware access

4
arch/arm/src/stm32l4/stm32l4_serial.c
View file

@ -1755,7 +1755,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
/* Configure TX as a GPIO output pin and Send a break signal*/
tx_break = GPIO_OUTPUT | (~(GPIO_MODE_MASK|GPIO_OUTPUT_SET) & priv->tx_gpio);
stm32_configgpio(tx_break);
stm32l4_configgpio(tx_break);
leave_critical_section(flags);
}
@ -1769,7 +1769,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
/* Configure TX back to U(S)ART */
stm32_configgpio(priv->tx_gpio);
stm32l4_configgpio(priv->tx_gpio);
priv->ie &= ~USART_CR1_IE_BREAK_INPROGRESS;

16
arch/arm/src/stm32l4/stm32l4_tickless.c
View file

@ -118,7 +118,7 @@
* Private Types
****************************************************************************/
struct stm32_tickless_s
struct stm32l4_tickless_s
{
struct stm32l4_oneshot_s oneshot;
struct stm32l4_freerun_s freerun;
@ -128,14 +128,14 @@ struct stm32_tickless_s
* Private Data
****************************************************************************/
static struct stm32_tickless_s g_tickless;
static struct stm32l4_tickless_s g_tickless;
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_oneshot_handler
* Name: stm32l4_oneshot_handler
*
* Description:
* Called when the one shot timer expires
@ -152,7 +152,7 @@ static struct stm32_tickless_s g_tickless;
*
****************************************************************************/
static void stm32_oneshot_handler(void *arg)
static void stm32l4_oneshot_handler(FAR void *arg)
{
tmrinfo("Expired...\n");
sched_timer_expiration();
@ -201,7 +201,7 @@ void up_timer_initialize(void)
CONFIG_USEC_PER_TICK);
if (ret < 0)
{
tmrerr("ERROR: stm32_oneshot_initialize failed\n");
tmrerr("ERROR: stm32l4_oneshot_initialize failed\n");
PANIC();
}
@ -211,7 +211,7 @@ void up_timer_initialize(void)
ret = stm32l4_oneshot_max_delay(&g_tickless.oneshot, &max_delay);
if (ret < 0)
{
tmrerr("ERROR: stm32_oneshot_max_delay failed\n");
tmrerr("ERROR: stm32l4_oneshot_max_delay failed\n");
PANIC();
}
@ -235,7 +235,7 @@ void up_timer_initialize(void)
CONFIG_USEC_PER_TICK);
if (ret < 0)
{
tmrerr("ERROR: stm32_freerun_initialize failed\n");
tmrerr("ERROR: stm32l4_freerun_initialize failed\n");
PANIC();
}
}
@ -346,6 +346,6 @@ int up_timer_cancel(FAR struct timespec *ts)
int up_timer_start(FAR const struct timespec *ts)
{
return stm32l4_oneshot_start(&g_tickless.oneshot, stm32_oneshot_handler, NULL, ts);
return stm32l4_oneshot_start(&g_tickless.oneshot, stm32l4_oneshot_handler, NULL, ts);
}
#endif /* CONFIG_SCHED_TICKLESS */

462
arch/arm/src/stm32l4/stm32l4_tim.c
View file

File diff suppressed because it is too large Load diff

171
arch/arm/src/stm32l4/stm32l4_tim_lowerhalf.c
View file

@ -87,7 +87,7 @@
* timer_lowerhalf_s structure.
*/
struct stm32_lowerhalf_s
struct stm32l4_lowerhalf_s
{
FAR const struct timer_ops_s *ops; /* Lower half operations */
FAR struct stm32l4_tim_dev_s *tim; /* stm32 timer driver */
@ -104,49 +104,49 @@ struct stm32_lowerhalf_s
/* Interrupt handling *******************************************************/
#ifdef CONFIG_STM32L4_TIM1
static int stm32_tim1_interrupt(int irq, FAR void *context);
static int stm32l4_tim1_interrupt(int irq, FAR void *context);
#endif
#ifdef CONFIG_STM32L4_TIM2
static int stm32_tim2_interrupt(int irq, FAR void *context);
static int stm32l4_tim2_interrupt(int irq, FAR void *context);
#endif
#ifdef CONFIG_STM32L4_TIM3
static int stm32_tim3_interrupt(int irq, FAR void *context);
static int stm32l4_tim3_interrupt(int irq, FAR void *context);
#endif
#ifdef CONFIG_STM32L4_TIM4
static int stm32_tim4_interrupt(int irq, FAR void *context);
static int stm32l4_tim4_interrupt(int irq, FAR void *context);
#endif
#ifdef CONFIG_STM32L4_TIM5
static int stm32_tim5_interrupt(int irq, FAR void *context);
static int stm32l4_tim5_interrupt(int irq, FAR void *context);
#endif
#ifdef CONFIG_STM32L4_TIM6
static int stm32_tim6_interrupt(int irq, FAR void *context);
static int stm32l4_tim6_interrupt(int irq, FAR void *context);
#endif
#ifdef CONFIG_STM32L4_TIM7
static int stm32_tim7_interrupt(int irq, FAR void *context);
static int stm32l4_tim7_interrupt(int irq, FAR void *context);
#endif
#ifdef CONFIG_STM32L4_TIM8
static int stm32_tim8_interrupt(int irq, FAR void *context);
static int stm32l4_tim8_interrupt(int irq, FAR void *context);
#endif
#ifdef CONFIG_STM32L4_TIM15
static int stm32_tim15_interrupt(int irq, FAR void *context);
static int stm32l4_tim15_interrupt(int irq, FAR void *context);
#endif
#ifdef CONFIG_STM32L4_TIM16
static int stm32_tim16_interrupt(int irq, FAR void *context);
static int stm32l4_tim16_interrupt(int irq, FAR void *context);
#endif
#ifdef CONFIG_STM32L4_TIM17
static int stm32_tim17_interrupt(int irq, FAR void *context);
static int stm32l4_tim17_interrupt(int irq, FAR void *context);
#endif
static int stm32_timer_handler(FAR struct stm32_lowerhalf_s *lower);
static int stm32l4_timer_handler(FAR struct stm32l4_lowerhalf_s *lower);
/* "Lower half" driver methods **********************************************/
static int stm32_start(FAR struct timer_lowerhalf_s *lower);
static int stm32_stop(FAR struct timer_lowerhalf_s *lower);
static int stm32_settimeout(FAR struct timer_lowerhalf_s *lower,
uint32_t timeout);
static tccb_t stm32_sethandler(FAR struct timer_lowerhalf_s *lower,
tccb_t handler);
static int stm32l4_start(FAR struct timer_lowerhalf_s *lower);
static int stm32l4_stop(FAR struct timer_lowerhalf_s *lower);
static int stm32l4_settimeout(FAR struct timer_lowerhalf_s *lower,
uint32_t timeout);
static tccb_t stm32l4_sethandler(FAR struct timer_lowerhalf_s *lower,
tccb_t handler);
/****************************************************************************
* Private Data
@ -155,109 +155,109 @@ static tccb_t stm32_sethandler(FAR struct timer_lowerhalf_s *lower,
static const struct timer_ops_s g_timer_ops =
{
.start = stm32_start,
.stop = stm32_stop,
.start = stm32l4_start,
.stop = stm32l4_stop,
.getstatus = NULL,
.settimeout = stm32_settimeout,
.sethandler = stm32_sethandler,
.settimeout = stm32l4_settimeout,
.sethandler = stm32l4_sethandler,
.ioctl = NULL,
};
#ifdef CONFIG_STM32L4_TIM1
static struct stm32_lowerhalf_s g_tim1_lowerhalf =
static struct stm32l4_lowerhalf_s g_tim1_lowerhalf =
{
.ops = &g_timer_ops,
.timhandler = stm32_tim1_interrupt,
.timhandler = stm32l4_tim1_interrupt,
.resolution = STM32L4_TIM1_RES,
};
#endif
#ifdef CONFIG_STM32L4_TIM2
static struct stm32_lowerhalf_s g_tim2_lowerhalf =
static struct stm32l4_lowerhalf_s g_tim2_lowerhalf =
{
.ops = &g_timer_ops,
.timhandler = stm32_tim2_interrupt,
.timhandler = stm32l4_tim2_interrupt,
.resolution = STM32L4_TIM2_RES,
};
#endif
#ifdef CONFIG_STM32L4_TIM3
static struct stm32_lowerhalf_s g_tim3_lowerhalf =
static struct stm32l4_lowerhalf_s g_tim3_lowerhalf =
{
.ops = &g_timer_ops,
.timhandler = stm32_tim3_interrupt,
.timhandler = stm32l4_tim3_interrupt,
.resolution = STM32L4_TIM3_RES,
};
#endif
#ifdef CONFIG_STM32L4_TIM4
static struct stm32_lowerhalf_s g_tim4_lowerhalf =
static struct stm32l4_lowerhalf_s g_tim4_lowerhalf =
{
.ops = &g_timer_ops,
.timhandler = stm32_tim4_interrupt,
.timhandler = stm32l4_tim4_interrupt,
.resolution = STM32L4_TIM4_RES,
};
#endif
#ifdef CONFIG_STM32L4_TIM5
static struct stm32_lowerhalf_s g_tim5_lowerhalf =
static struct stm32l4_lowerhalf_s g_tim5_lowerhalf =
{
.ops = &g_timer_ops,
.timhandler = stm32_tim5_interrupt,
.timhandler = stm32l4_tim5_interrupt,
.resolution = STM32L4_TIM5_RES,
};
#endif
#ifdef CONFIG_STM32L4_TIM6
static struct stm32_lowerhalf_s g_tim6_lowerhalf =
static struct stm32l4_lowerhalf_s g_tim6_lowerhalf =
{
.ops = &g_timer_ops,
.timhandler = stm32_tim6_interrupt,
.timhandler = stm32l4_tim6_interrupt,
.resolution = STM32L4_TIM6_RES,
};
#endif
#ifdef CONFIG_STM32L4_TIM7
static struct stm32_lowerhalf_s g_tim7_lowerhalf =
static struct stm32l4_lowerhalf_s g_tim7_lowerhalf =
{
.ops = &g_timer_ops,
.timhandler = stm32_tim7_interrupt,
.timhandler = stm32l4_tim7_interrupt,
.resolution = STM32L4_TIM7_RES,
};
#endif
#ifdef CONFIG_STM32L4_TIM8
static struct stm32_lowerhalf_s g_tim8_lowerhalf =
static struct stm32l4_lowerhalf_s g_tim8_lowerhalf =
{
.ops = &g_timer_ops,
.timhandler = stm32_tim8_interrupt,
.timhandler = stm32l4_tim8_interrupt,
.resolution = STM32L4_TIM8_RES,
};
#endif
#ifdef CONFIG_STM32L4_TIM15
static struct stm32_lowerhalf_s g_tim15_lowerhalf =
static struct stm32l4_lowerhalf_s g_tim15_lowerhalf =
{
.ops = &g_timer_ops,
.timhandler = stm32_tim15_interrupt,
.timhandler = stm32l4_tim15_interrupt,
.resolution = STM32L4_TIM15_RES,
};
#endif
#ifdef CONFIG_STM32L4_TIM16
static struct stm32_lowerhalf_s g_tim16_lowerhalf =
static struct stm32l4_lowerhalf_s g_tim16_lowerhalf =
{
.ops = &g_timer_ops,
.timhandler = stm32_tim16_interrupt,
.timhandler = stm32l4_tim16_interrupt,
.resolution = STM32L4_TIM16_RES,
};
#endif
#ifdef CONFIG_STM32L4_TIM17
static struct stm32_lowerhalf_s g_tim17_lowerhalf =
static struct stm32l4_lowerhalf_s g_tim17_lowerhalf =
{
.ops = &g_timer_ops,
.timhandler = stm32_tim17_interrupt,
.timhandler = stm32l4_tim17_interrupt,
.resolution = STM32L4_TIM17_RES,
};
#endif
@ -267,7 +267,7 @@ static struct stm32_lowerhalf_s g_tim17_lowerhalf =
****************************************************************************/
/****************************************************************************
* Name: stm32_timN_interrupt, N=1..14
* Name: stm32l4_timN_interrupt, N=1..14
*
* Description:
* Individual interrupt handlers for each timer
@ -275,84 +275,84 @@ static struct stm32_lowerhalf_s g_tim17_lowerhalf =
****************************************************************************/
#ifdef CONFIG_STM32L4_TIM1
static int stm32_tim1_interrupt(int irq, FAR void *context)
static int stm32l4_tim1_interrupt(int irq, FAR void *context)
{
return stm32_timer_handler(&g_tim1_lowerhalf);
return stm32l4_timer_handler(&g_tim1_lowerhalf);
}
#endif
#ifdef CONFIG_STM32L4_TIM2
static int stm32_tim2_interrupt(int irq, FAR void *context)
static int stm32l4_tim2_interrupt(int irq, FAR void *context)
{
return stm32_timer_handler(&g_tim2_lowerhalf);
return stm32l4_timer_handler(&g_tim2_lowerhalf);
}
#endif
#ifdef CONFIG_STM32L4_TIM3
static int stm32_tim3_interrupt(int irq, FAR void *context)
static int stm32l4_tim3_interrupt(int irq, FAR void *context)
{
return stm32_timer_handler(&g_tim3_lowerhalf);
return stm32l4_timer_handler(&g_tim3_lowerhalf);
}
#endif
#ifdef CONFIG_STM32L4_TIM4
static int stm32_tim4_interrupt(int irq, FAR void *context)
static int stm32l4_tim4_interrupt(int irq, FAR void *context)
{
return stm32_timer_handler(&g_tim4_lowerhalf);
return stm32l4_timer_handler(&g_tim4_lowerhalf);
}
#endif
#ifdef CONFIG_STM32L4_TIM5
static int stm32_tim5_interrupt(int irq, FAR void *context)
static int stm32l4_tim5_interrupt(int irq, FAR void *context)
{
return stm32_timer_handler(&g_tim5_lowerhalf);
return stm32l4_timer_handler(&g_tim5_lowerhalf);
}
#endif
#ifdef CONFIG_STM32L4_TIM6
static int stm32_tim6_interrupt(int irq, FAR void *context)
static int stm32l4_tim6_interrupt(int irq, FAR void *context)
{
return stm32_timer_handler(&g_tim6_lowerhalf);
return stm32l4_timer_handler(&g_tim6_lowerhalf);
}
#endif
#ifdef CONFIG_STM32L4_TIM7
static int stm32_tim7_interrupt(int irq, FAR void *context)
static int stm32l4_tim7_interrupt(int irq, FAR void *context)
{
return stm32_timer_handler(&g_tim7_lowerhalf);
return stm32l4_timer_handler(&g_tim7_lowerhalf);
}
#endif
#ifdef CONFIG_STM32L4_TIM8
static int stm32_tim8_interrupt(int irq, FAR void *context)
static int stm32l4_tim8_interrupt(int irq, FAR void *context)
{
return stm32_timer_handler(&g_tim8_lowerhalf);
return stm32l4_timer_handler(&g_tim8_lowerhalf);
}
#endif
#ifdef CONFIG_STM32L4_TIM15
static int stm32_tim15_interrupt(int irq, FAR void *context)
static int stm32l4_tim15_interrupt(int irq, FAR void *context)
{
return stm32_timer_handler(&g_tim15_lowerhalf);
return stm32l4_timer_handler(&g_tim15_lowerhalf);
}
#endif
#ifdef CONFIG_STM32L4_TIM16
static int stm32_tim16_interrupt(int irq, FAR void *context)
static int stm32l4_tim16_interrupt(int irq, FAR void *context)
{
return stm32_timer_handler(&g_tim16_lowerhalf);
return stm32l4_timer_handler(&g_tim16_lowerhalf);
}
#endif
#ifdef CONFIG_STM32L4_TIM17
static int stm32_tim17_interrupt(int irq, FAR void *context)
static int stm32l4_tim17_interrupt(int irq, FAR void *context)
{
return stm32_timer_handler(&g_tim17_lowerhalf);
return stm32l4_timer_handler(&g_tim17_lowerhalf);
}
#endif
/****************************************************************************
* Name: stm32_timer_handler
* Name: stm32l4_timer_handler
*
* Description:
* timer interrupt handler
@ -363,7 +363,7 @@ static int stm32_tim17_interrupt(int irq, FAR void *context)
*
****************************************************************************/
static int stm32_timer_handler(FAR struct stm32_lowerhalf_s *lower)
static int stm32l4_timer_handler(FAR struct stm32l4_lowerhalf_s *lower)
{
uint32_t next_interval_us = 0;
@ -378,14 +378,14 @@ static int stm32_timer_handler(FAR struct stm32_lowerhalf_s *lower)
}
else
{
stm32_stop((struct timer_lowerhalf_s *)lower);
stm32l4_stop((struct timer_lowerhalf_s *)lower);
}
return OK;
}
/****************************************************************************
* Name: stm32_start
* Name: stm32l4_start
*
* Description:
* Start the timer, resetting the time to the current timeout,
@ -399,9 +399,9 @@ static int stm32_timer_handler(FAR struct stm32_lowerhalf_s *lower)
*
****************************************************************************/
static int stm32_start(FAR struct timer_lowerhalf_s *lower)
static int stm32l4_start(FAR struct timer_lowerhalf_s *lower)
{
FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower;
FAR struct stm32l4_lowerhalf_s *priv = (FAR struct stm32l4_lowerhalf_s *)lower;
if (!priv->started)
{
@ -423,7 +423,7 @@ static int stm32_start(FAR struct timer_lowerhalf_s *lower)
}
/****************************************************************************
* Name: stm32_stop
* Name: stm32l4_stop
*
* Description:
* Stop the timer
@ -437,9 +437,9 @@ static int stm32_start(FAR struct timer_lowerhalf_s *lower)
*
****************************************************************************/
static int stm32_stop(struct timer_lowerhalf_s *lower)
static int stm32l4_stop(FAR struct timer_lowerhalf_s *lower)
{
struct stm32_lowerhalf_s *priv = (struct stm32_lowerhalf_s *)lower;
FAR struct stm32l4_lowerhalf_s *priv = (FAR struct stm32l4_lowerhalf_s *)lower;
if (priv->started)
{
@ -456,7 +456,7 @@ static int stm32_stop(struct timer_lowerhalf_s *lower)
}
/****************************************************************************
* Name: stm32_settimeout
* Name: stm32l4_settimeout
*
* Description:
* Set a new timeout value (and reset the timer)
@ -471,9 +471,10 @@ static int stm32_stop(struct timer_lowerhalf_s *lower)
*
****************************************************************************/
static int stm32_settimeout(FAR struct timer_lowerhalf_s *lower, uint32_t timeout)
static int stm32l4_settimeout(FAR struct timer_lowerhalf_s *lower,
uint32_t timeout)
{
FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower;
FAR struct stm32l4_lowerhalf_s *priv = (FAR struct stm32l4_lowerhalf_s *)lower;
uint64_t maxtimeout;
if (priv->started)
@ -498,7 +499,7 @@ static int stm32_settimeout(FAR struct timer_lowerhalf_s *lower, uint32_t timeou
}
/****************************************************************************
* Name: stm32_sethandler
* Name: stm32l4_sethandler
*
* Description:
* Call this user provided timeout handler.
@ -516,10 +517,10 @@ static int stm32_settimeout(FAR struct timer_lowerhalf_s *lower, uint32_t timeou
*
****************************************************************************/
static tccb_t stm32_sethandler(FAR struct timer_lowerhalf_s *lower,
tccb_t newhandler)
static tccb_t stm32l4_sethandler(FAR struct timer_lowerhalf_s *lower,
tccb_t newhandler)
{
FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower;
FAR struct stm32l4_lowerhalf_s *priv = (FAR struct stm32l4_lowerhalf_s *)lower;
irqstate_t flags = enter_critical_section();
@ -570,7 +571,7 @@ static tccb_t stm32_sethandler(FAR struct timer_lowerhalf_s *lower,
int stm32l4_timer_initialize(FAR const char *devpath, int timer)
{
FAR struct stm32_lowerhalf_s *lower;
FAR struct stm32l4_lowerhalf_s *lower;
switch (timer)
{

68
configs/freedom-k64f/README.txt
View file

@ -10,8 +10,12 @@ Contents
o Freedom K64F Features
o Serial Console
o LEDs and Buttons
o Ethernet
o Development Environment
o GNU Toolchain Options
o Freedom K64F Configuration Options
o Configurations
o Status
Kinetis Freedom K64F Features:
=============================
@ -125,6 +129,40 @@ LEDs and Buttons
SW2 PTC6/SPI0_SOUT/PD0_EXTRG/I2S0_RX_BCLK/FB_AD9/I2S0_MCLK/LLWU_P10
SW3 PTA4/FTM0_CH1/NMI_b/LLWU_P3
Ethernet
========
------------ ----------------- --------------------------------------------
KSZ8081 Board Signal(s) K64F Pin
Pin Signal Function
--- -------- ----------------- --------------------------------------------
1 VDD_1V2 VDDPLL_1.2V ---
2 VDDA_3V3 VDDA_ENET ---
3 RXM ENET1_RX- ---
4 RXP ENET1_RX+ ---
5 TXM ENET1_TX- ---
6 TXP ENET1_TX+ ---
7 X0 RMII_XTAL0 ---
8 XI RMII_XTAL1 ---
9 REXT --- ---, Apparently not connected
10 MDIO RMII0_MDIO PTB0/RMII0_MDIO
11 MDC RMII0_MDC PTB1/RMII0_MDC
12 RXD1 RMII0_RXD_1 PTA12/RMII0_RXD1
13 RXD0 RMII0_RXD_0 PTA13/RMII0_RXD0
14 VDDIO VDDIO_ENET ---
15 CRS_DIV PTA14/RMII0_CRS_DV
16 REF_CLK RMII_RXCLK PTA18/EXTAL0, PHY clock input
17 RXER RMII0_RXER PTA5/RMII0_RXER
18 INTRP RMII0_INT_B, J14 Pin 2, Apparently not available unless jumpered
PHY_INT_1
19 TXEN RMII0_TXEN PTA15/RMII0_TXEN
20 TXD0 RMII0_TXD_0 PTA16/RMII0_TXD0
21 TXD1 RMII0_TXD_1 PTA17/RMII0_TXD1
22 GND1 --- ---
24 nRST PHY_RST_B ---
25 GND2 --- ---
--- -------- ----------------- --------------------------------------------
Development Environment
=======================
@ -345,6 +383,23 @@ can be selected as follow:
Where <subdir> is one of the following:
netnsh:
------
This configuration is identical to the nsh configuration described
below except that networking support is enabled.
NOTES:
1. Most of the notes associated with the nsh configuration apply here
as well (see below).
2. Default platform/toolchain:
CONFIG_HOST_WINDOWS=y : Cygwin under Windows
CONFIG_WINDOWS_CYGWIN=y
CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : ARM/mbed toolcahin (arm-none-elf-gcc)
CONFIG_INTELHEX_BINARY=y : Output formats: Intel hex binary
nsh:
---
Configures the NuttShell (nsh) located at apps/examples/nsh using a
@ -366,7 +421,7 @@ Where <subdir> is one of the following:
CONFIG_HOST_LINUX=y : Linux (Cygwin under Windows okay too).
CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : Buildroot (arm-nuttx-elf-gcc)
CONFIG_ARMV7M_OABI_TOOLCHAIN=y : The older OABI version
CONFIG_RAW_BINARY=y : Output formats: ELF and raw binary
CONFIG_INTELHEX_BINARY=y : Output formats: Intel hex binary
3. The Serial Console is provided on UART3 with the correct pin
configuration for use with an Arduino Serial Shield.
@ -391,3 +446,14 @@ Where <subdir> is one of the following:
CONFIG_SCHED_WORKQUEUE=y : Enable the NuttX workqueue
CONFIG_NSH_ARCHINIT=y : Provide NSH initializeation logic
Status
======
2016-07-11: Received hardware today and the board came up on the very
first try. That does not happen often. At this point, the very basic
NSH configuration is working and LEDs are working. The only odd
behavior that I see is that pressing SW3 causes an unexpected interrupt
error.
2016-07-12: Added support for the KSZ8081 PHY and added the netnsh
configuration. Untested as of this writing.

24
configs/freedom-k64f/include/board.h
View file

@ -162,18 +162,18 @@
* the Freedom K64F. The following definitions describe how NuttX controls
* the LEDs:
*
* SYMBOL Meaning LED state
* RED GREEN BLUE
* ------------------- ----------------------- ----------------- */
#define LED_STARTED 1 /* NuttX has been started OFF OFF OFF */
#define LED_HEAPALLOCATE 2 /* Heap has been allocated OFF OFF ON */
#define LED_IRQSENABLED 0 /* Interrupts enabled OFF OFF ON */
#define LED_STACKCREATED 3 /* Idle stack created OFF ON OFF */
#define LED_INIRQ 0 /* In an interrupt (no change) */
#define LED_SIGNAL 0 /* In a signal handler (no change) */
#define LED_ASSERTION 0 /* An assertion failed (no change) */
#define LED_PANIC 4 /* The system has crashed FLASH OFF OFF */
#undef LED_IDLE /* K64 is in sleep mode (Not used) */
* SYMBOL Meaning LED state
* RED GREEN BLUE
* ------------------- ---------------------------- ----------------- */
#define LED_STARTED 1 /* NuttX has been started OFF OFF OFF */
#define LED_HEAPALLOCATE 2 /* Heap has been allocated OFF OFF ON */
#define LED_IRQSENABLED 0 /* Interrupts enabled OFF OFF ON */
#define LED_STACKCREATED 3 /* Idle stack created OFF ON OFF */
#define LED_INIRQ 0 /* In an interrupt (no change) */
#define LED_SIGNAL 0 /* In a signal handler (no change) */
#define LED_ASSERTION 0 /* An assertion failed (no change) */
#define LED_PANIC 4 /* The system has crashed FLASH OFF OFF */
#undef LED_IDLE /* K64 is in sleep mode (Not used) */
/* Button definitions ***************************************************************/
/* Two push buttons, SW2 and SW3, are available on FRDM-K64F board, where SW2 is

111
configs/freedom-k64f/netnsh/Make.defs Normal file
View file

@ -0,0 +1,111 @@
############################################################################
# configs/freedom-k64f/netnsh/Make.defs
#
# Copyright (C) 2016 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
include ${TOPDIR}/.config
include ${TOPDIR}/tools/Config.mk
include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
ifeq ($(WINTOOL),y)
# Windows-native toolchains
DIRLINK = $(TOPDIR)/tools/copydir.sh
DIRUNLINK = $(TOPDIR)/tools/unlink.sh
MKDEP = $(TOPDIR)/tools/mkwindeps.sh
ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/flash.ld}"
else
# Linux/Cygwin-native toolchain
MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/flash.ld
endif
CC = $(CROSSDEV)gcc
CXX = $(CROSSDEV)g++
CPP = $(CROSSDEV)gcc -E
LD = $(CROSSDEV)ld
AR = $(CROSSDEV)ar rcs
NM = $(CROSSDEV)nm
OBJCOPY = $(CROSSDEV)objcopy
OBJDUMP = $(CROSSDEV)objdump
ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
ARCHOPTIMIZATION = -g
endif
ifneq ($(CONFIG_DEBUG_NOOPT),y)
ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
endif
ARCHCFLAGS = -fno-builtin
ARCHCXXFLAGS = -fno-builtin -fno-exceptions
ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
ARCHWARNINGSXX = -Wall -Wshadow -Wundef
ARCHDEFINES =
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
AFLAGS = $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048
ASMEXT = .S
OBJEXT = .o
LIBEXT = .a
EXEEXT =
ifneq ($(CROSSDEV),arm-nuttx-elf-)
LDFLAGS += -nostartfiles -nodefaultlibs
endif
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
LDFLAGS += -g
endif
HOSTCC = gcc
HOSTINCLUDES = -I.
HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
HOSTLDFLAGS =

1142
configs/freedom-k64f/netnsh/defconfig Normal file
View file

File diff suppressed because it is too large Load diff

77
configs/freedom-k64f/netnsh/setenv.sh Normal file
View file

@ -0,0 +1,77 @@
#!/bin/bash
# configs/freedom-k64f/netnsh/setenv.sh
#
# Copyright (C) 2016 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
if [ "$_" = "$0" ] ; then
echo "You must source this script, not run it!" 1>&2
exit 1
fi
WD=`pwd`
if [ ! -x "setenv.sh" ]; then
echo "This script must be executed from the top-level NuttX build directory"
exit 1
fi
if [ -z "${PATH_ORIG}" ]; then
export PATH_ORIG="${PATH}"
fi
# This is the Cygwin path to the location where I installed the Atmel GCC
# toolchain under Windows. You will also have to edit this if you install
# this toolchain in any other location
#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin"
# This is the Cygwin path to the location where I installed the CodeSourcery
# toolchain under windows. You will also have to edit this if you install
# the CodeSourcery toolchain in any other location
#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
# This is the path to the location where I installed the devkitARM toolchain
# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/
#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin"
# This is the Cygwin path to the location where I build the buildroot
# toolchain.
#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
# Add the path to the toolchain to the PATH varialble
export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
echo "PATH : ${PATH}"

6
configs/freedom-k64f/src/freedom-k64f.h
View file

@ -91,13 +91,13 @@
* LED K64
* ------ -------------------------------------------------------
* RED PTB22/SPI2_SOUT/FB_AD29/CMP2_OUT
* BLUE PTB21/SPI2_SCK/FB_AD30/CMP1_OUT
* GREEN PTE26/ENET_1588_CLKIN/UART4_CTS_b/RTC_CLKOUT/USB0_CLKIN
* BLUE PTB21/SPI2_SCK/FB_AD30/CMP1_OUT
*/
#define GPIO_LED_R (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTB | PIN22)
#define GPIO_LED_G (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTB | PIN21)
#define GPIO_LED_B (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTE | PIN26)
#define GPIO_LED_G (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTE | PIN26)
#define GPIO_LED_B (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTB | PIN21)
/************************************************************************************
* Public data

2
configs/qemu-i486/nsh/Make.defs
View file

@ -71,7 +71,7 @@ ARCHDEFINES =
# Check if building a 32-bit target with a 64-bit toolchain
ifeq ($(ARCH_X86_M32),y)
ifeq ($(CONFIG_ARCH_X86_M32),y)
ARCHCPUFLAGS += -m32
endif

2
configs/qemu-i486/ostest/Make.defs
View file

@ -71,7 +71,7 @@ ARCHDEFINES =
# Check if building a 32-bit target with a 64-bit toolchain
ifeq ($(ARCH_X86_M32),y)
ifeq ($(CONFIG_ARCH_X86_M32),y)
ARCHCPUFLAGS += -m32
endif

4
configs/stm32f4discovery/src/Makefile
View file

@ -136,6 +136,10 @@ ifeq ($(CONFIG_LCD_UG2864HSWEG01),y)
CSRCS += stm32_ug2864hsweg01.c
endif
ifeq ($(CONFIG_EXAMPLES_OSTEST),y)
CSRCS += stm32_ostest.c
endif
ifeq ($(CONFIG_TIMER),y)
CSRCS += stm32_timer.c
endif

111
configs/stm32f4discovery/src/stm32_ostest.c Normal file
View file

@ -0,0 +1,111 @@
/************************************************************************************
* configs/stm32f4discovery/src/stm32_ostest.c
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <string.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <arch/board/board.h>
#include "up_arch.h"
#include "up_internal.h"
#include "stm32f4discovery.h"
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Configuration ********************************************************************/
#undef HAVE_FPU
#if defined(CONFIG_ARCH_FPU) && !defined(CONFIG_EXAMPLES_OSTEST_FPUTESTDISABLE) && \
defined(CONFIG_EXAMPLES_OSTEST_FPUSIZE) && defined(CONFIG_SCHED_WAITPID) && \
!defined(CONFIG_DISABLE_SIGNALS)
# define HAVE_FPU 1
#endif
#ifdef HAVE_FPU
#if CONFIG_EXAMPLES_OSTEST_FPUSIZE != (4*SW_FPU_REGS)
# error "CONFIG_EXAMPLES_OSTEST_FPUSIZE has the wrong size"
#endif
/************************************************************************************
* Private Data
************************************************************************************/
static uint32_t g_saveregs[XCPTCONTEXT_REGS];
/************************************************************************************
* Public Functions
************************************************************************************/
/* Given an array of size CONFIG_EXAMPLES_OSTEST_FPUSIZE, this function will return
* the current FPU registers.
*/
void arch_getfpu(FAR uint32_t *fpusave)
{
irqstate_t flags;
/* Take a snapshot of the thread context right now */
flags = enter_critical_section();
up_saveusercontext(g_saveregs);
/* Return only the floating register values */
memcpy(fpusave, &g_saveregs[REG_S0], (4*SW_FPU_REGS));
leave_critical_section(flags);
}
/* Given two arrays of size CONFIG_EXAMPLES_OSTEST_FPUSIZE this function
* will compare them and return true if they are identical.
*/
bool arch_cmpfpu(FAR const uint32_t *fpusave1, FAR const uint32_t *fpusave2)
{
return memcmp(fpusave1, fpusave2, (4*SW_FPU_REGS)) == 0;
}
#endif /* HAVE_FPU */

2
configs/teensy-3.x/src/k20_usbdev.c
View file

@ -50,7 +50,7 @@
#include "up_arch.h"
#include "kinetis.h"
#include "kinetis_usbotg.h"
#include "kinetis_sim.h"
#include "chip/kinetis_sim.h"
#include "teensy-3x.h"
/************************************************************************************

27
drivers/mtd/sst26.c
View file

@ -245,6 +245,7 @@ static inline void sst26_unlock(FAR struct spi_dev_s *dev);
static inline int sst26_readid(struct sst26_dev_s *priv);
static void sst26_waitwritecomplete(struct sst26_dev_s *priv);
static void sst26_writeenable(struct sst26_dev_s *priv);
static void sst26_writedisable(struct sst26_dev_s *priv);
static void sst26_globalunlock(struct sst26_dev_s *priv);
static inline void sst26_sectorerase(struct sst26_dev_s *priv, off_t offset, uint8_t type);
static inline int sst26_chiperase(struct sst26_dev_s *priv);
@ -427,7 +428,7 @@ static void sst26_globalunlock(struct sst26_dev_s *priv)
SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
/* Send "Write Enable (WREN)" command */
/* Send "Global Unlock (ULBPR)" command */
(void)SPI_SEND(priv->dev, SST26_ULBPR);
@ -459,6 +460,27 @@ static void sst26_writeenable(struct sst26_dev_s *priv)
sstinfo("Enabled\n");
}
/************************************************************************************
* Name: sst26_writedisable
************************************************************************************/
static void sst26_writedisable(struct sst26_dev_s *priv)
{
/* Select this FLASH part */
SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
/* Send "Write Disable (WRDI)" command */
(void)SPI_SEND(priv->dev, SST26_WRDI);
/* Deselect the FLASH */
SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
sstinfo("Disabled\n");
}
/************************************************************************************
* Name: sst26_sectorerase (4k)
************************************************************************************/
@ -939,8 +961,9 @@ FAR struct mtd_dev_s *sst26_initialize_spi(FAR struct spi_dev_s *dev)
else
{
/* Make sure that the FLASH is unprotected so that we can write into it */
sst26_writeenable(priv);
sst26_globalunlock(priv);
sst26_writedisable(priv);
#ifdef CONFIG_MTD_REGISTRATION
/* Register the MTD with the procfs system if enabled */

5
drivers/serial/uart_16550.c
View file

@ -871,14 +871,17 @@ static int u16550_ioctl(struct file *filep, int cmd, unsigned long arg)
struct inode *inode = filep->f_inode;
struct uart_dev_s *dev = inode->i_private;
struct u16550_s *priv = (FAR struct u16550_s *)dev->priv;
int ret;
#ifdef CONFIG_SERIAL_UART_ARCH_IOCTL
int ret = uart_ioctl(filep, cmd, arg);
ret = uart_ioctl(filep, cmd, arg);
if (ret != -ENOTTY)
{
return ret;
}
#else
ret = OK;
#endif
switch (cmd)

34
fs/tmpfs/fs_tmpfs.c
View file

@ -924,8 +924,8 @@ static int tmpfs_find_object(FAR struct tmpfs_s *fs,
FAR struct tmpfs_object_s **object,
FAR struct tmpfs_directory_s **parent)
{
FAR struct tmpfs_object_s *to;
FAR struct tmpfs_directory_s *tdo;
FAR struct tmpfs_object_s *to = NULL;
FAR struct tmpfs_directory_s *tdo = NULL;
FAR struct tmpfs_directory_s *next_tdo;
FAR char *segment;
FAR char *next_segment;
@ -1019,24 +1019,30 @@ static int tmpfs_find_object(FAR struct tmpfs_s *fs,
if (parent)
{
/* Get exclusive access to the parent and increment the reference
* count on the object.
*/
if (tdo != NULL)
{
/* Get exclusive access to the parent and increment the reference
* count on the object.
*/
tmpfs_lock_directory(tdo);
tdo->tdo_refs++;
tmpfs_lock_directory(tdo);
tdo->tdo_refs++;
}
*parent = tdo;
}
if (object)
{
/* Get exclusive access to the object and increment the reference
* count on the object.
*/
if (to != NULL)
{
/* Get exclusive access to the object and increment the reference
* count on the object.
*/
tmpfs_lock_object(to);
to->to_refs++;
tmpfs_lock_object(to);
to->to_refs++;
}
*object = to;
}
@ -2086,7 +2092,7 @@ static int tmpfs_unlink(FAR struct inode *mountpt, FAR const char *relpath)
{
FAR struct tmpfs_s *fs;
FAR struct tmpfs_directory_s *tdo;
FAR struct tmpfs_file_s *tfo;
FAR struct tmpfs_file_s *tfo = NULL;
FAR const char *name;
int ret;
@ -2113,6 +2119,8 @@ static int tmpfs_unlink(FAR struct inode *mountpt, FAR const char *relpath)
goto errout_with_lock;
}
DEBUGASSERT(tfo != NULL);
/* Get the file name from the relative path */
name = strrchr(relpath, '/');

8
include/nuttx/math.h
View file

@ -93,10 +93,15 @@
#define NAN (0.0/0.0)
#define HUGE_VAL INFINITY
#define INFINITY_F (1.0F/0.0F)
#define NAN_F (0.0F/0.0F)
#define isnan(x) ((x) != (x))
#define isinf(x) (((x) == INFINITY) || ((x) == -INFINITY))
#define isfinite(x) (!(isinf(x)) && (x != NAN))
#define isinf_f(x) (((x) == INFINITY_F) || ((x) == -INFINITY_F))
/* Exponential and Logarithmic constants ************************************/
#define M_E 2.7182818284590452353602874713526625
@ -116,6 +121,9 @@
#define M_2_PI 0.6366197723675813430755350534900574
#define M_2_SQRTPI 1.1283791670955125738961589031215452
#define M_PI_F ((float)M_PI)
#define M_PI_2_F ((float)M_PI_2)
/****************************************************************************
* Public Function Prototypes
****************************************************************************/

2
include/nuttx/net/mii.h
View file

@ -547,7 +547,7 @@
#define MII_KSZ80x1_INT_LU (1 << 0) /* Link up interrupt */
/* KSZ8041 Register 0x1e: PHY Control 1 -- To be provided */
/* KSZ8041 Register 0x1e: PHY Control 2 */
/* KSZ8041 Register 0x1f: PHY Control 2 */
#define MII_PHYCTRL2_MDIX (1 << 15) /* Bit 15: Micrel/HP MDI/MDI-X state */
#define MII_PHYCTRL2_MDIX_SEL (1 << 14) /* Bit 14: MDI/MDI-X select */

3
libc/libc.h
View file

@ -1,7 +1,7 @@
/****************************************************************************
* libc/libc.h
*
* Copyright (C) 2007-2014 Gregory Nutt. All rights reserved.
* Copyright (C) 2007-2014, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -211,6 +211,7 @@ int lib_checkbase(int base, const char **pptr);
/* Defined in lib_expi.c */
#ifdef CONFIG_LIBM
float lib_expif(size_t n);
double lib_expi(size_t n);
#endif

1
libc/math/Make.defs
View file

@ -59,6 +59,7 @@ CSRCS += lib_tanhl.c lib_asinhl.c lib_acoshl.c lib_atanhl.c lib_erfl.c lib_copys
CSRCS += lib_truncl.c
CSRCS += lib_libexpi.c lib_libsqrtapprox.c
CSRCS += lib_libexpif.c
# Add the floating point math directory to the build

2
libc/math/lib_acosf.c
View file

@ -37,5 +37,5 @@
float acosf(float x)
{
return (M_PI_2 - asinf(x));
return (M_PI_2_F - asinf(x));
}

2
libc/math/lib_acoshf.c
View file

@ -48,5 +48,5 @@
float acoshf(float x)
{
return logf(x + sqrtf(x * x - 1));
return logf(x + sqrtf(x * x - 1.0F));
}

4
libc/math/lib_asinf.c
View file

@ -47,9 +47,9 @@ float asinf(float x)
y_sin = sinf(y);
y_cos = cosf(y);
if (y > M_PI_2 || y < -M_PI_2)
if (y > M_PI_2_F || y < -M_PI_2_F)
{
y = fmodf(y, M_PI);
y = fmodf(y, M_PI_F);
}
if (y_sin + FLT_EPSILON >= x && y_sin - FLT_EPSILON <= x)

2
libc/math/lib_asinhf.c
View file

@ -48,5 +48,5 @@
float asinhf(float x)
{
return logf(x + sqrtf(x * x + 1));
return logf(x + sqrtf(x * x + 1.0F));
}

8
libc/math/lib_atan2f.c
View file

@ -43,22 +43,22 @@ float atan2f(float y, float x)
}
else if (y >= 0 && x < 0)
{
return atanf(y / x) + M_PI;
return atanf(y / x) + M_PI_F;
}
else if (y < 0)
{
if (x == 0)
{
return -M_PI_2;
return -M_PI_2_F;
}
else /* Can only be x < 0 */
{
return atanf(y / x) - M_PI;
return atanf(y / x) - M_PI_F;
}
}
else if (y > 0 && x == 0)
{
return M_PI_2;
return M_PI_2_F;
}
else /* if (y == 0 && x == 0) Undefined but returns normally 0 */
{

2
libc/math/lib_atanf.c
View file

@ -39,5 +39,5 @@
float atanf(float x)
{
return asinf(x / sqrtf(x * x + 1));
return asinf(x / sqrtf(x * x + 1.0F));
}

2
libc/math/lib_atanhf.c
View file

@ -48,5 +48,5 @@
float atanhf(float x)
{
return 0.5 * logf((1 + x) / (1 - x));
return 0.5F * logf((1.0F + x) / (1.0F - x));
}

4
libc/math/lib_ceilf.c
View file

@ -38,9 +38,9 @@
float ceilf(float x)
{
modff(x, &x);
if (x > 0.0)
if (x > 0.0F)
{
x += 1.0;
x += 1.0F;
}
return x;

2
libc/math/lib_cosf.c
View file

@ -37,5 +37,5 @@
float cosf(float x)
{
return sinf(x + M_PI_2);
return sinf(x + M_PI_2_F);
}

2
libc/math/lib_coshf.c
View file

@ -38,5 +38,5 @@
float coshf(float x)
{
x = expf(x);
return ((x + (1.0 / x)) / 2.0);
return ((x + (1.0F / x)) / 2.0F);
}

16
libc/math/lib_erff.c
View file

@ -57,14 +57,14 @@ float erff(float x)
float t;
float a1, a2, a3, a4, a5, p;
a1 = 0.254829592;
a2 = -0.284496736;
a3 = 1.421413741;
a4 = -1.453152027;
a5 = 1.061405429;
p = 0.3275911;
a1 = 0.254829592F;
a2 = -0.284496736F;
a3 = 1.421413741F;
a4 = -1.453152027F;
a5 = 1.061405429F;
p = 0.3275911F;
sign = (x >= 0 ? 1 : -1);
t = 1.0/(1.0 + p*x);
return sign * (1.0 - (((((a5 * t + a4) * t) + a3) * t + a2) * t + a1) * t * expf(-x * x));
t = 1.0F/(1.0F + p*x);
return sign * (1.0F - (((((a5 * t + a4) * t) + a3) * t + a2) * t + a1) * t * expf(-x * x));
}

8
libc/math/lib_expf.c
View file

@ -89,8 +89,8 @@ float expf(float x)
/* Perform Taylor series approximation with eleven terms */
value = 0.0;
x0 = 1.0;
value = 0.0F;
x0 = 1.0F;
for (i = 0; i < 10; i++)
{
value += x0 * _flt_inv_fact[i];
@ -99,11 +99,11 @@ float expf(float x)
/* Multiply by exp of the integer component */
value *= lib_expi(int_part);
value *= lib_expif(int_part);
if (invert)
{
return (1.0 / value);
return (1.0F / value);
}
else
{

4
libc/math/lib_floorf.c
View file

@ -38,9 +38,9 @@
float floorf(float x)
{
modff(x, &x);
if (x < 0.0)
if (x < 0.0F)
{
x -= 1.0;
x -= 1.0F;
}
return x;

2
libc/math/lib_frexpf.c
View file

@ -38,5 +38,5 @@
float frexpf(float x, int *exponent)
{
*exponent = (int)ceilf(log2f(x));
return x / ldexpf(1.0, *exponent);
return x / ldexpf(1.0F, *exponent);
}

2
libc/math/lib_ldexpf.c
View file

@ -37,5 +37,5 @@
float ldexpf(float x, int n)
{
return (x * powf(2.0, (float)n));
return (x * powf(2.0F, (float)n));
}

49
libc/math/lib_libexpi.c
View file

@ -43,34 +43,32 @@
* Pre-processor Definitions
****************************************************************************/
#define M_E2 (M_E * M_E)
#define M_E4 (M_E2 * M_E2)
#define M_E8 (M_E4 * M_E4)
#define M_E16 (M_E8 * M_E8)
#define M_E32 (M_E16 * M_E16)
#define M_E64 (M_E32 * M_E32)
#define M_E128 (M_E64 * M_E64)
#define M_E2 (M_E * M_E)
#define M_E4 (M_E2 * M_E2)
#define M_E8 (M_E4 * M_E4)
#define M_E16 (M_E8 * M_E8)
#define M_E32 (M_E16 * M_E16)
#define M_E64 (M_E32 * M_E32)
#define M_E128 (M_E64 * M_E64)
#define M_E256 (M_E128 * M_E128)
#define M_E512 (M_E256 * M_E256)
#define M_E1024 (M_E512 * M_E512)
/****************************************************************************
* Private Data
****************************************************************************/
static double _expi_square_tbl[11] =
static const double g_expi_square_tbl[] =
{
M_E, /* e^1 */
M_E2, /* e^2 */
M_E4, /* e^4 */
M_E8, /* e^8 */
M_E16, /* e^16 */
M_E32, /* e^32 */
M_E64, /* e^64 */
M_E128, /* e^128 */
M_E256, /* e^256 */
M_E512, /* e^512 */
M_E1024, /* e^1024 */
M_E, /* e^1 */
M_E2, /* e^2 */
M_E4, /* e^4 */
M_E8, /* e^8 */
M_E16, /* e^16 */
M_E32, /* e^32 */
M_E64, /* e^64 */
M_E128, /* e^128 */
M_E256, /* e^256 */
M_E512 /* e^512 */
};
/****************************************************************************
@ -82,22 +80,23 @@ double lib_expi(size_t n)
size_t i;
double val;
if (n > 1024)
/* The largest calculable value for n is floor(ln(DBL_MAX)) */
if (n > 709)
{
return INFINITY;
}
val = 1.0;
for (i = 0; n; i++)
for (i = 0; n != 0; i++)
{
if (n & (1 << i))
if ((n & (1 << i)) != 0)
{
n &= ~(1 << i);
val *= _expi_square_tbl[i];
val *= g_expi_square_tbl[i];
}
}
return val;
}

100
libc/math/lib_libexpif.c Normal file
View file

@ -0,0 +1,100 @@
/****************************************************************************
* libc/math/lib_libexpif.c
*
* This file is a part of NuttX:
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Ported by: Darcy Gong/Gregory Nutt
*
* It derives from the Rhombs OS math library by Nick Johnson which has
* a compatibile, MIT-style license:
*
* Copyright (C) 2009-2011 Nick Johnson <nickbjohnson4224 at gmail.com>
*
* Permission to use, copy, modify, and distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/compiler.h>
#include <sys/types.h>
#include <math.h>
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define M_E2 (M_E * M_E)
#define M_E4 (M_E2 * M_E2)
#define M_E8 (M_E4 * M_E4)
#define M_E16 (M_E8 * M_E8)
#define M_E32 (M_E16 * M_E16)
#define M_E64 (M_E32 * M_E32)
/****************************************************************************
* Private Data
****************************************************************************/
/* Values above M_E64 will never be used since it’s larger than FLT_MAX
*(3.402823e+38).
*/
static const float g_expif_square_tbl[] =
{
(float)M_E, /* e^1 */
(float)M_E2, /* e^2 */
(float)M_E4, /* e^4 */
(float)M_E8, /* e^8 */
(float)M_E16, /* e^16 */
(float)M_E32, /* e^32 */
(float)M_E64 /* e^64 */
};
/****************************************************************************
* Public Functions
****************************************************************************/
float lib_expif(size_t n)
{
size_t i;
float val;
/* The largest calculable value for n is floor(ln(FLT_MAX)) */
if (n > 88)
{
return INFINITY_F;
}
val = 1.0F;
for (i = 0; n != 0; i++)
{
if ((n & (1 << i)) != 0)
{
n &= ~(1 << i);
val *= g_expif_square_tbl[i];
}
}
return val;
}

2
libc/math/lib_log10f.c
View file

@ -37,5 +37,5 @@
float log10f(float x)
{
return (logf(x) / M_LN10);
return (logf(x) / (float)M_LN10);
}

2
libc/math/lib_log2f.c
View file

@ -37,5 +37,5 @@
float log2f(float x)
{
return (logf(x) / M_LN2);
return (logf(x) / (float)M_LN2);
}

18
libc/math/lib_logf.c
View file

@ -40,8 +40,8 @@ float logf(float x)
{
float y, y_old, ey, epsilon;
y = 0.0;
y_old = 1.0;
y = 0.0F;
y_old = 1.0F;
epsilon = FLT_EPSILON;
while (y > y_old + epsilon || y < y_old - epsilon)
@ -50,25 +50,25 @@ float logf(float x)
ey = exp(y);
y -= (ey - x) / ey;
if (y > 700.0)
if (y > 700.0F)
{
y = 700.0;
y = 700.0F;
}
if (y < -700.0)
if (y < -700.0F)
{
y = -700.0;
y = -700.0F;
}
epsilon = (fabs(y) > 1.0) ? fabs(y) * FLT_EPSILON : FLT_EPSILON;
epsilon = (fabsf(y) > 1.0F) ? fabsf(y) * FLT_EPSILON : FLT_EPSILON;
}
if (y == 700.0)
if (y == 700.0F)
{
return INFINITY;
}
if (y == -700.0)
if (y == -700.0F)
{
return INFINITY;
}

8
libc/math/lib_modff.c
View file

@ -37,14 +37,14 @@
float modff(float x, float *iptr)
{
if (fabsf(x) >= 8388608.0)
if (fabsf(x) >= 8388608.0F)
{
*iptr = x;
return 0.0;
return 0.0F;
}
else if (fabs(x) < 1.0)
else if (fabsf(x) < 1.0F)
{
*iptr = 0.0;
*iptr = 0.0F;
return x;
}
else

10
libc/math/lib_rintf.c
View file

@ -105,15 +105,15 @@ float rintf(float x)
linteger = (long)x;
fremainder = x - (float)linteger;
if (x < 0.0)
if (x < 0.0F)
{
/* fremainder should be in range 0 .. -1 */
if (fremainder == -0.5)
if (fremainder == -0.5F)
{
linteger = ((linteger + 1) & ~1);
}
else if (fremainder < -0.5)
else if (fremainder < -0.5F)
{
linteger--;
}
@ -122,11 +122,11 @@ float rintf(float x)
{
/* fremainder should be in range 0 .. 1 */
if (fremainder == 0.5)
if (fremainder == 0.5F)
{
linteger = ((linteger + 1) & ~1);
}
else if (fremainder > 0.5)
else if (fremainder > 0.5F)
{
linteger++;
}

20
libc/math/lib_sinf.c
View file

@ -58,31 +58,31 @@ float sinf(float x)
/* Move x to [-pi, pi) */
x = fmodf(x, 2 * M_PI);
if (x >= M_PI)
x = fmodf(x, 2 * M_PI_F);
if (x >= M_PI_F)
{
x -= 2 * M_PI;
x -= 2 * M_PI_F;
}
if (x < -M_PI)
if (x < -M_PI_F)
{
x += 2 * M_PI;
x += 2 * M_PI_F;
}
/* Move x to [-pi/2, pi/2) */
if (x >= M_PI_2)
if (x >= M_PI_2_F)
{
x = M_PI - x;
x = M_PI_F - x;
}
if (x < -M_PI_2)
if (x < -M_PI_2_F)
{
x = -M_PI - x;
x = -M_PI_F - x;
}
x_squared = x * x;
sin_x = 0.0;
sin_x = 0.0F;
/* Perform Taylor series approximation for sin(x) with six terms */

2
libc/math/lib_sinhf.c
View file

@ -38,5 +38,5 @@
float sinhf(float x)
{
x = expf(x);
return ((x - (1.0 / x)) / 2.0);
return ((x - (1.0F / x)) / 2.0F);
}

20
libc/math/lib_sqrtf.c
View file

@ -47,25 +47,25 @@ float sqrtf(float x)
/* Filter out invalid/trivial inputs */
if (x < 0.0)
if (x < 0.0F)
{
set_errno(EDOM);
return NAN;
return NAN_F;
}
if (isnan(x))
{
return NAN;
return NAN_F;
}
if (isinf(x))
if (isinf_f(x))
{
return INFINITY;
return INFINITY_F;
}
if (x == 0.0)
if (x == 0.0F)
{
return 0.0;
return 0.0F;
}
/* Guess square root (using bit manipulation) */
@ -76,9 +76,9 @@ float sqrtf(float x)
* definitely optimal
*/
y = 0.5 * (y + x / y);
y = 0.5 * (y + x / y);
y = 0.5 * (y + x / y);
y = 0.5F * (y + x / y);
y = 0.5F * (y + x / y);
y = 0.5F * (y + x / y);
return y;
}

2
libc/math/lib_tanhf.c
View file

@ -38,7 +38,7 @@
float tanhf(float x)
{
float x0 = expf(x);
float x1 = 1.0 / x0;
float x1 = 1.0F / x0;
return ((x0 + x1) / (x0 - x1));
}

7
libc/stdio/lib_printf.c
View file

@ -58,13 +58,8 @@ int printf(FAR const IPTR char *fmt, ...)
va_start(ap, fmt);
#if CONFIG_NFILE_STREAMS > 0
ret = vfprintf(stdout, fmt, ap);
#elif CONFIG_NFILE_DESCRIPTORS > 0
ret = vsyslog(LOG_INFO, fmt, ap);
#else
# ifdef CONFIG_CPP_HAVE_WARNING
# warning "printf has no data sink"
# endif
ret = 0;
ret = vsyslog(LOG_INFO, fmt, ap);
#endif
va_end(ap);