From 261358f1f5502138a0052792a7e1c922f81eadc4 Mon Sep 17 00:00:00 2001 From: David Alessio Date: Mon, 11 Jul 2016 07:02:50 -0600 Subject: [PATCH 01/31] This change should significantly improve the performance of single precision floating point math library functions. The vast majority of changes have to do with preventing the compiler from needlessly promoting floats to doubles, performing the calculation with doubles, only to demote the result to float. These changes only affect the math lib functions that return float. --- include/nuttx/math.h | 8 ++++++++ libc/libc.h | 3 ++- libc/math/Make.defs | 1 + libc/math/lib_acosf.c | 2 +- libc/math/lib_acoshf.c | 2 +- libc/math/lib_asinf.c | 4 ++-- libc/math/lib_asinhf.c | 2 +- libc/math/lib_atan2f.c | 8 ++++---- libc/math/lib_atanf.c | 2 +- libc/math/lib_atanhf.c | 2 +- libc/math/lib_ceilf.c | 4 ++-- libc/math/lib_cosf.c | 2 +- libc/math/lib_coshf.c | 2 +- libc/math/lib_erff.c | 16 ++++++++-------- libc/math/lib_expf.c | 8 ++++---- libc/math/lib_floorf.c | 4 ++-- libc/math/lib_frexpf.c | 2 +- libc/math/lib_ldexpf.c | 2 +- libc/math/lib_log10f.c | 2 +- libc/math/lib_log2f.c | 2 +- libc/math/lib_logf.c | 18 +++++++++--------- libc/math/lib_modff.c | 8 ++++---- libc/math/lib_rintf.c | 10 +++++----- libc/math/lib_sinf.c | 20 ++++++++++---------- libc/math/lib_sinhf.c | 2 +- libc/math/lib_sqrtf.c | 20 ++++++++++---------- libc/math/lib_tanhf.c | 2 +- 27 files changed, 84 insertions(+), 74 deletions(-) diff --git a/include/nuttx/math.h b/include/nuttx/math.h index 6ee91eab7e6..d6963a50137 100644 --- a/include/nuttx/math.h +++ b/include/nuttx/math.h @@ -93,10 +93,15 @@ #define NAN (0.0/0.0) #define HUGE_VAL INFINITY +#define INFINITY_F (1.0F/0.0F) +#define NAN_F (0.0F/0.0F) + #define isnan(x) ((x) != (x)) #define isinf(x) (((x) == INFINITY) || ((x) == -INFINITY)) #define isfinite(x) (!(isinf(x)) && (x != NAN)) +#define isinf_f(x) (((x) == INFINITY_F) || ((x) == -INFINITY_F)) + /* Exponential and Logarithmic constants ************************************/ #define M_E 2.7182818284590452353602874713526625 @@ -116,6 +121,9 @@ #define M_2_PI 0.6366197723675813430755350534900574 #define M_2_SQRTPI 1.1283791670955125738961589031215452 +#define M_PI_F ((float)M_PI) +#define M_PI_2_F ((float)M_PI_2) + /**************************************************************************** * Public Function Prototypes ****************************************************************************/ diff --git a/libc/libc.h b/libc/libc.h index 9cb1974fa93..9e947009f23 100644 --- a/libc/libc.h +++ b/libc/libc.h @@ -1,7 +1,7 @@ /**************************************************************************** * libc/libc.h * - * Copyright (C) 2007-2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2007-2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -211,6 +211,7 @@ int lib_checkbase(int base, const char **pptr); /* Defined in lib_expi.c */ #ifdef CONFIG_LIBM +float lib_expif(size_t n); double lib_expi(size_t n); #endif diff --git a/libc/math/Make.defs b/libc/math/Make.defs index cf25a1ec76d..a2acc7a93a0 100644 --- a/libc/math/Make.defs +++ b/libc/math/Make.defs @@ -59,6 +59,7 @@ CSRCS += lib_tanhl.c lib_asinhl.c lib_acoshl.c lib_atanhl.c lib_erfl.c lib_copys CSRCS += lib_truncl.c CSRCS += lib_libexpi.c lib_libsqrtapprox.c +CSRCS += lib_libexpif.c # Add the floating point math directory to the build diff --git a/libc/math/lib_acosf.c b/libc/math/lib_acosf.c index 6719e54a67d..12fe68da677 100644 --- a/libc/math/lib_acosf.c +++ b/libc/math/lib_acosf.c @@ -37,5 +37,5 @@ float acosf(float x) { - return (M_PI_2 - asinf(x)); + return (M_PI_2_F - asinf(x)); } diff --git a/libc/math/lib_acoshf.c b/libc/math/lib_acoshf.c index a676d6a40e4..4b42e968d7c 100644 --- a/libc/math/lib_acoshf.c +++ b/libc/math/lib_acoshf.c @@ -48,5 +48,5 @@ float acoshf(float x) { - return logf(x + sqrtf(x * x - 1)); + return logf(x + sqrtf(x * x - 1.0F)); } diff --git a/libc/math/lib_asinf.c b/libc/math/lib_asinf.c index e22d32fe792..ac17a539441 100644 --- a/libc/math/lib_asinf.c +++ b/libc/math/lib_asinf.c @@ -47,9 +47,9 @@ float asinf(float x) y_sin = sinf(y); y_cos = cosf(y); - if (y > M_PI_2 || y < -M_PI_2) + if (y > M_PI_2_F || y < -M_PI_2_F) { - y = fmodf(y, M_PI); + y = fmodf(y, M_PI_F); } if (y_sin + FLT_EPSILON >= x && y_sin - FLT_EPSILON <= x) diff --git a/libc/math/lib_asinhf.c b/libc/math/lib_asinhf.c index ba749a6569f..4c26d038ea1 100644 --- a/libc/math/lib_asinhf.c +++ b/libc/math/lib_asinhf.c @@ -48,5 +48,5 @@ float asinhf(float x) { - return logf(x + sqrtf(x * x + 1)); + return logf(x + sqrtf(x * x + 1.0F)); } diff --git a/libc/math/lib_atan2f.c b/libc/math/lib_atan2f.c index 5d766df99db..c600161408f 100644 --- a/libc/math/lib_atan2f.c +++ b/libc/math/lib_atan2f.c @@ -43,22 +43,22 @@ float atan2f(float y, float x) } else if (y >= 0 && x < 0) { - return atanf(y / x) + M_PI; + return atanf(y / x) + M_PI_F; } else if (y < 0) { if (x == 0) { - return -M_PI_2; + return -M_PI_2_F; } else /* Can only be x < 0 */ { - return atanf(y / x) - M_PI; + return atanf(y / x) - M_PI_F; } } else if (y > 0 && x == 0) { - return M_PI_2; + return M_PI_2_F; } else /* if (y == 0 && x == 0) Undefined but returns normally 0 */ { diff --git a/libc/math/lib_atanf.c b/libc/math/lib_atanf.c index c9835c6f24d..aef149ed9e8 100644 --- a/libc/math/lib_atanf.c +++ b/libc/math/lib_atanf.c @@ -39,5 +39,5 @@ float atanf(float x) { - return asinf(x / sqrtf(x * x + 1)); + return asinf(x / sqrtf(x * x + 1.0F)); } diff --git a/libc/math/lib_atanhf.c b/libc/math/lib_atanhf.c index 60a6696f73e..a54090f5170 100644 --- a/libc/math/lib_atanhf.c +++ b/libc/math/lib_atanhf.c @@ -48,5 +48,5 @@ float atanhf(float x) { - return 0.5 * logf((1 + x) / (1 - x)); + return 0.5F * logf((1.0F + x) / (1.0F - x)); } diff --git a/libc/math/lib_ceilf.c b/libc/math/lib_ceilf.c index 8378141abdc..830f2a4769c 100644 --- a/libc/math/lib_ceilf.c +++ b/libc/math/lib_ceilf.c @@ -38,9 +38,9 @@ float ceilf(float x) { modff(x, &x); - if (x > 0.0) + if (x > 0.0F) { - x += 1.0; + x += 1.0F; } return x; diff --git a/libc/math/lib_cosf.c b/libc/math/lib_cosf.c index 55ba93c1c85..5532894b028 100644 --- a/libc/math/lib_cosf.c +++ b/libc/math/lib_cosf.c @@ -37,5 +37,5 @@ float cosf(float x) { - return sinf(x + M_PI_2); + return sinf(x + M_PI_2_F); } diff --git a/libc/math/lib_coshf.c b/libc/math/lib_coshf.c index 7cb575822f2..37b4bf8e0f1 100644 --- a/libc/math/lib_coshf.c +++ b/libc/math/lib_coshf.c @@ -38,5 +38,5 @@ float coshf(float x) { x = expf(x); - return ((x + (1.0 / x)) / 2.0); + return ((x + (1.0F / x)) / 2.0F); } diff --git a/libc/math/lib_erff.c b/libc/math/lib_erff.c index 75199c828c2..364b7fe03c0 100644 --- a/libc/math/lib_erff.c +++ b/libc/math/lib_erff.c @@ -57,14 +57,14 @@ float erff(float x) float t; float a1, a2, a3, a4, a5, p; - a1 = 0.254829592; - a2 = -0.284496736; - a3 = 1.421413741; - a4 = -1.453152027; - a5 = 1.061405429; - p = 0.3275911; + a1 = 0.254829592F; + a2 = -0.284496736F; + a3 = 1.421413741F; + a4 = -1.453152027F; + a5 = 1.061405429F; + p = 0.3275911F; sign = (x >= 0 ? 1 : -1); - t = 1.0/(1.0 + p*x); - return sign * (1.0 - (((((a5 * t + a4) * t) + a3) * t + a2) * t + a1) * t * expf(-x * x)); + t = 1.0F/(1.0F + p*x); + return sign * (1.0F - (((((a5 * t + a4) * t) + a3) * t + a2) * t + a1) * t * expf(-x * x)); } diff --git a/libc/math/lib_expf.c b/libc/math/lib_expf.c index 4ce5208607b..3e3cb02ed93 100644 --- a/libc/math/lib_expf.c +++ b/libc/math/lib_expf.c @@ -89,8 +89,8 @@ float expf(float x) /* Perform Taylor series approximation with eleven terms */ - value = 0.0; - x0 = 1.0; + value = 0.0F; + x0 = 1.0F; for (i = 0; i < 10; i++) { value += x0 * _flt_inv_fact[i]; @@ -99,11 +99,11 @@ float expf(float x) /* Multiply by exp of the integer component */ - value *= lib_expi(int_part); + value *= lib_expif(int_part); if (invert) { - return (1.0 / value); + return (1.0F / value); } else { diff --git a/libc/math/lib_floorf.c b/libc/math/lib_floorf.c index 4a4ef1a4f7a..d2fac02d2d5 100644 --- a/libc/math/lib_floorf.c +++ b/libc/math/lib_floorf.c @@ -38,9 +38,9 @@ float floorf(float x) { modff(x, &x); - if (x < 0.0) + if (x < 0.0F) { - x -= 1.0; + x -= 1.0F; } return x; diff --git a/libc/math/lib_frexpf.c b/libc/math/lib_frexpf.c index 6ec5aa74425..2f0421ccb92 100644 --- a/libc/math/lib_frexpf.c +++ b/libc/math/lib_frexpf.c @@ -38,5 +38,5 @@ float frexpf(float x, int *exponent) { *exponent = (int)ceilf(log2f(x)); - return x / ldexpf(1.0, *exponent); + return x / ldexpf(1.0F, *exponent); } diff --git a/libc/math/lib_ldexpf.c b/libc/math/lib_ldexpf.c index 12503438b8a..d24d1384e7d 100644 --- a/libc/math/lib_ldexpf.c +++ b/libc/math/lib_ldexpf.c @@ -37,5 +37,5 @@ float ldexpf(float x, int n) { - return (x * powf(2.0, (float)n)); + return (x * powf(2.0F, (float)n)); } diff --git a/libc/math/lib_log10f.c b/libc/math/lib_log10f.c index f0ec9b0589a..aa810a0127f 100644 --- a/libc/math/lib_log10f.c +++ b/libc/math/lib_log10f.c @@ -37,5 +37,5 @@ float log10f(float x) { - return (logf(x) / M_LN10); + return (logf(x) / (float)M_LN10); } diff --git a/libc/math/lib_log2f.c b/libc/math/lib_log2f.c index a2d351bb120..025b5de3b14 100644 --- a/libc/math/lib_log2f.c +++ b/libc/math/lib_log2f.c @@ -37,5 +37,5 @@ float log2f(float x) { - return (logf(x) / M_LN2); + return (logf(x) / (float)M_LN2); } diff --git a/libc/math/lib_logf.c b/libc/math/lib_logf.c index 80eff85c3c7..2d097d228e3 100644 --- a/libc/math/lib_logf.c +++ b/libc/math/lib_logf.c @@ -40,8 +40,8 @@ float logf(float x) { float y, y_old, ey, epsilon; - y = 0.0; - y_old = 1.0; + y = 0.0F; + y_old = 1.0F; epsilon = FLT_EPSILON; while (y > y_old + epsilon || y < y_old - epsilon) @@ -50,25 +50,25 @@ float logf(float x) ey = exp(y); y -= (ey - x) / ey; - if (y > 700.0) + if (y > 700.0F) { - y = 700.0; + y = 700.0F; } - if (y < -700.0) + if (y < -700.0F) { - y = -700.0; + y = -700.0F; } - epsilon = (fabs(y) > 1.0) ? fabs(y) * FLT_EPSILON : FLT_EPSILON; + epsilon = (fabsf(y) > 1.0F) ? fabsf(y) * FLT_EPSILON : FLT_EPSILON; } - if (y == 700.0) + if (y == 700.0F) { return INFINITY; } - if (y == -700.0) + if (y == -700.0F) { return INFINITY; } diff --git a/libc/math/lib_modff.c b/libc/math/lib_modff.c index ad07a4f70c9..5934782b7b2 100644 --- a/libc/math/lib_modff.c +++ b/libc/math/lib_modff.c @@ -37,14 +37,14 @@ float modff(float x, float *iptr) { - if (fabsf(x) >= 8388608.0) + if (fabsf(x) >= 8388608.0F) { *iptr = x; - return 0.0; + return 0.0F; } - else if (fabs(x) < 1.0) + else if (fabsf(x) < 1.0F) { - *iptr = 0.0; + *iptr = 0.0F; return x; } else diff --git a/libc/math/lib_rintf.c b/libc/math/lib_rintf.c index ca733e3d792..9a3c06df280 100644 --- a/libc/math/lib_rintf.c +++ b/libc/math/lib_rintf.c @@ -105,15 +105,15 @@ float rintf(float x) linteger = (long)x; fremainder = x - (float)linteger; - if (x < 0.0) + if (x < 0.0F) { /* fremainder should be in range 0 .. -1 */ - if (fremainder == -0.5) + if (fremainder == -0.5F) { linteger = ((linteger + 1) & ~1); } - else if (fremainder < -0.5) + else if (fremainder < -0.5F) { linteger--; } @@ -122,11 +122,11 @@ float rintf(float x) { /* fremainder should be in range 0 .. 1 */ - if (fremainder == 0.5) + if (fremainder == 0.5F) { linteger = ((linteger + 1) & ~1); } - else if (fremainder > 0.5) + else if (fremainder > 0.5F) { linteger++; } diff --git a/libc/math/lib_sinf.c b/libc/math/lib_sinf.c index 5f17eb212b2..b7be087b909 100644 --- a/libc/math/lib_sinf.c +++ b/libc/math/lib_sinf.c @@ -58,31 +58,31 @@ float sinf(float x) /* Move x to [-pi, pi) */ - x = fmodf(x, 2 * M_PI); - if (x >= M_PI) + x = fmodf(x, 2 * M_PI_F); + if (x >= M_PI_F) { - x -= 2 * M_PI; + x -= 2 * M_PI_F; } - if (x < -M_PI) + if (x < -M_PI_F) { - x += 2 * M_PI; + x += 2 * M_PI_F; } /* Move x to [-pi/2, pi/2) */ - if (x >= M_PI_2) + if (x >= M_PI_2_F) { - x = M_PI - x; + x = M_PI_F - x; } - if (x < -M_PI_2) + if (x < -M_PI_2_F) { - x = -M_PI - x; + x = -M_PI_F - x; } x_squared = x * x; - sin_x = 0.0; + sin_x = 0.0F; /* Perform Taylor series approximation for sin(x) with six terms */ diff --git a/libc/math/lib_sinhf.c b/libc/math/lib_sinhf.c index 6b27f59508e..baf353f34dc 100644 --- a/libc/math/lib_sinhf.c +++ b/libc/math/lib_sinhf.c @@ -38,5 +38,5 @@ float sinhf(float x) { x = expf(x); - return ((x - (1.0 / x)) / 2.0); + return ((x - (1.0F / x)) / 2.0F); } diff --git a/libc/math/lib_sqrtf.c b/libc/math/lib_sqrtf.c index e1a107eb8b9..918c1c9568d 100644 --- a/libc/math/lib_sqrtf.c +++ b/libc/math/lib_sqrtf.c @@ -47,25 +47,25 @@ float sqrtf(float x) /* Filter out invalid/trivial inputs */ - if (x < 0.0) + if (x < 0.0F) { set_errno(EDOM); - return NAN; + return NAN_F; } if (isnan(x)) { - return NAN; + return NAN_F; } - if (isinf(x)) + if (isinf_f(x)) { - return INFINITY; + return INFINITY_F; } - if (x == 0.0) + if (x == 0.0F) { - return 0.0; + return 0.0F; } /* Guess square root (using bit manipulation) */ @@ -76,9 +76,9 @@ float sqrtf(float x) * definitely optimal */ - y = 0.5 * (y + x / y); - y = 0.5 * (y + x / y); - y = 0.5 * (y + x / y); + y = 0.5F * (y + x / y); + y = 0.5F * (y + x / y); + y = 0.5F * (y + x / y); return y; } diff --git a/libc/math/lib_tanhf.c b/libc/math/lib_tanhf.c index 70edb57ec4e..ef56b133dc4 100644 --- a/libc/math/lib_tanhf.c +++ b/libc/math/lib_tanhf.c @@ -38,7 +38,7 @@ float tanhf(float x) { float x0 = expf(x); - float x1 = 1.0 / x0; + float x1 = 1.0F / x0; return ((x0 + x1) / (x0 - x1)); } From 8a7dd94cfcdadb9ff632290e8e7a2841afa85912 Mon Sep 17 00:00:00 2001 From: David Alessio Date: Mon, 11 Jul 2016 07:08:27 -0600 Subject: [PATCH 02/31] Add FPU support for ostest for the STM32F4Discovery platform --- configs/stm32f4discovery/src/Makefile | 4 + configs/stm32f4discovery/src/stm32_ostest.c | 111 ++++++++++++++++++++ 2 files changed, 115 insertions(+) create mode 100644 configs/stm32f4discovery/src/stm32_ostest.c diff --git a/configs/stm32f4discovery/src/Makefile b/configs/stm32f4discovery/src/Makefile index f1ee252997f..060baf3eec4 100644 --- a/configs/stm32f4discovery/src/Makefile +++ b/configs/stm32f4discovery/src/Makefile @@ -136,6 +136,10 @@ ifeq ($(CONFIG_LCD_UG2864HSWEG01),y) CSRCS += stm32_ug2864hsweg01.c endif +ifeq ($(CONFIG_EXAMPLES_OSTEST),y) +CSRCS += stm32_ostest.c +endif + ifeq ($(CONFIG_TIMER),y) CSRCS += stm32_timer.c endif diff --git a/configs/stm32f4discovery/src/stm32_ostest.c b/configs/stm32f4discovery/src/stm32_ostest.c new file mode 100644 index 00000000000..289db1b3edc --- /dev/null +++ b/configs/stm32f4discovery/src/stm32_ostest.c @@ -0,0 +1,111 @@ +/************************************************************************************ + * configs/stm32f4discovery/src/stm32_ostest.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "up_internal.h" +#include "stm32f4discovery.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Configuration ********************************************************************/ + +#undef HAVE_FPU +#if defined(CONFIG_ARCH_FPU) && !defined(CONFIG_EXAMPLES_OSTEST_FPUTESTDISABLE) && \ + defined(CONFIG_EXAMPLES_OSTEST_FPUSIZE) && defined(CONFIG_SCHED_WAITPID) && \ + !defined(CONFIG_DISABLE_SIGNALS) +# define HAVE_FPU 1 +#endif + +#ifdef HAVE_FPU + +#if CONFIG_EXAMPLES_OSTEST_FPUSIZE != (4*SW_FPU_REGS) +# error "CONFIG_EXAMPLES_OSTEST_FPUSIZE has the wrong size" +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +static uint32_t g_saveregs[XCPTCONTEXT_REGS]; + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/* Given an array of size CONFIG_EXAMPLES_OSTEST_FPUSIZE, this function will return + * the current FPU registers. + */ + +void arch_getfpu(FAR uint32_t *fpusave) +{ + irqstate_t flags; + + /* Take a snapshot of the thread context right now */ + + flags = enter_critical_section(); + up_saveusercontext(g_saveregs); + + /* Return only the floating register values */ + + memcpy(fpusave, &g_saveregs[REG_S0], (4*SW_FPU_REGS)); + leave_critical_section(flags); +} + +/* Given two arrays of size CONFIG_EXAMPLES_OSTEST_FPUSIZE this function + * will compare them and return true if they are identical. + */ + +bool arch_cmpfpu(FAR const uint32_t *fpusave1, FAR const uint32_t *fpusave2) +{ + return memcmp(fpusave1, fpusave2, (4*SW_FPU_REGS)) == 0; +} + +#endif /* HAVE_FPU */ From bf3691ebf0f4428fe6ca898cc6fe28c0565ea499 Mon Sep 17 00:00:00 2001 From: Sebastien Lorquet Date: Mon, 11 Jul 2016 10:53:00 -0600 Subject: [PATCH 03/31] Remove the includes/apps link to apps/include. It is no longer used. --- Makefile.unix | 13 +------------ Makefile.win | 16 +--------------- 2 files changed, 2 insertions(+), 27 deletions(-) diff --git a/Makefile.unix b/Makefile.unix index 6c0c46b38cf..a117f171fc1 100644 --- a/Makefile.unix +++ b/Makefile.unix @@ -280,16 +280,6 @@ tools/cnvwindeps$(HOSTEXEEXT): # setting up symbolic links with 'generic' directory names to specific, # configured directories. # -# Link the apps/include directory to include/apps - -include/apps: Make.defs -ifneq ($(APPDIR),) - @echo "LN: include/apps to $(APPDIR)/include" - $(Q) if [ -d $(TOPDIR)/$(APPDIR)/include ]; then \ - $(DIRLINK) $(TOPDIR)/$(APPDIR)/include include/apps; \ - fi -endif - # Link the arch//include directory to include/arch include/arch: Make.defs @@ -324,7 +314,7 @@ ifneq ($(CONFIG_ARCH_CHIP),) $(Q) $(DIRLINK) $(TOPDIR)/$(ARCH_INC)/$(CONFIG_ARCH_CHIP) include/arch/chip endif -dirlinks: include/arch include/arch/board include/arch/chip $(ARCH_SRC)/board $(ARCH_SRC)/chip include/apps +dirlinks: include/arch include/arch/board include/arch/chip $(ARCH_SRC)/board $(ARCH_SRC)/chip # context # @@ -354,7 +344,6 @@ clean_context: $(Q) $(DIRUNLINK) include/arch $(Q) $(DIRUNLINK) $(ARCH_SRC)/board $(Q) $(DIRUNLINK) $(ARCH_SRC)/chip - $(Q) $(DIRUNLINK) include/apps # check_context # diff --git a/Makefile.win b/Makefile.win index 484e6a938d3..1f30310525e 100644 --- a/Makefile.win +++ b/Makefile.win @@ -275,19 +275,6 @@ tools\mkdeps$(HOSTEXEEXT): # setting up symbolic links with 'generic' directory names to specific, # configured directories. # -# Link the apps\include directory to include\apps - -include\apps: Make.defs -ifneq ($(APPDIR),) - @echo LN: include\apps $(APPDIR)\include -ifeq ($(CONFIG_WINDOWS_MKLINK),y) - $(Q) /user:administrator mklink /d include\apps $(APPDIR)\include -else - $(Q) xcopy $(APPDIR)\include include\apps /c /q /s /e /y /i - $(Q) echo FAKELNK > include\apps\.fakelnk -endif -endif - # Link the arch\\include directory to include\arch include\arch: Make.defs @@ -347,7 +334,7 @@ else endif endif -dirlinks: include\arch include\arch\board include\arch\chip $(ARCH_SRC)\board $(ARCH_SRC)\chip include\apps +dirlinks: include\arch include\arch\board include\arch\chip $(ARCH_SRC)\board $(ARCH_SRC)\chip # context # @@ -374,7 +361,6 @@ clean_context: $(call DELDIR, include\arch) $(call DELDIR, $(ARCH_SRC)\board) $(call DELDIR, $(ARCH_SRC)\chip) - $(call DELDIR, include\apps) # check_context # From 34a7b0ea8e532934b4fc209eb51e50120920dad1 Mon Sep 17 00:00:00 2001 From: Sebastien Lorquet Date: Mon, 11 Jul 2016 19:05:09 +0200 Subject: [PATCH 04/31] Renames stm32_ -> stm32l4_ on old files and rtcc/basic timers --- arch/arm/src/stm32l4/chip/stm32l4_pinmap.h | 2 +- arch/arm/src/stm32l4/stm32l4.h | 2 +- arch/arm/src/stm32l4/stm32l4_freerun.c | 14 +- arch/arm/src/stm32l4/stm32l4_freerun.h | 6 +- arch/arm/src/stm32l4/stm32l4_gpio.h | 2 +- arch/arm/src/stm32l4/stm32l4_rcc.c | 2 +- arch/arm/src/stm32l4/stm32l4_rtc_lowerhalf.c | 6 +- arch/arm/src/stm32l4/stm32l4_rtcc.c | 2 +- arch/arm/src/stm32l4/stm32l4_serial.c | 4 +- arch/arm/src/stm32l4/stm32l4_tim.c | 406 +++++++++---------- arch/arm/src/stm32l4/stm32l4_tim_lowerhalf.c | 164 ++++---- 11 files changed, 305 insertions(+), 305 deletions(-) diff --git a/arch/arm/src/stm32l4/chip/stm32l4_pinmap.h b/arch/arm/src/stm32l4/chip/stm32l4_pinmap.h index 16bbdec7ab1..906e53dccb5 100644 --- a/arch/arm/src/stm32l4/chip/stm32l4_pinmap.h +++ b/arch/arm/src/stm32l4/chip/stm32l4_pinmap.h @@ -1,5 +1,5 @@ /************************************************************************************ - * arch/arm/src/stm32l4/chip/stm32_pinmap.h + * arch/arm/src/stm32l4/chip/stm32l4_pinmap.h * * Copyright (C) 2015 Sebastien Lorquet. All rights reserved. * Author: Sebastien Lorquet diff --git a/arch/arm/src/stm32l4/stm32l4.h b/arch/arm/src/stm32l4/stm32l4.h index b19fd62c43b..fad620ad86a 100644 --- a/arch/arm/src/stm32l4/stm32l4.h +++ b/arch/arm/src/stm32l4/stm32l4.h @@ -57,7 +57,7 @@ #include "chip.h" #include "stm32l4_adc.h" -//#include "stm32_bkp.h" +//#include "stm32l4_bkp.h" #include "stm32l4_can.h" #include "stm32l4_dbgmcu.h" #include "stm32l4_dma.h" diff --git a/arch/arm/src/stm32l4/stm32l4_freerun.c b/arch/arm/src/stm32l4/stm32l4_freerun.c index 74fc952ef05..a11df0ba0ee 100644 --- a/arch/arm/src/stm32l4/stm32l4_freerun.c +++ b/arch/arm/src/stm32l4/stm32l4_freerun.c @@ -1,4 +1,4 @@ -/**************************************************************************** +s/**************************************************************************** * arch/arm/src/stm32l4/stm32l4_freerun.c * * Copyright (C) 2016 Gregory Nutt. All rights reserved. @@ -64,7 +64,7 @@ static struct stm32l4_freerun_s *g_freerun; ****************************************************************************/ /**************************************************************************** - * Name: stm32_freerun_handler + * Name: stm32l4_freerun_handler * * Description: * Timer interrupt callback. When the freerun timer counter overflows, @@ -81,7 +81,7 @@ static struct stm32l4_freerun_s *g_freerun; * ****************************************************************************/ -static int stm32_freerun_handler(int irq, void *context) +static int stm32l4_freerun_handler(int irq, void *context) { struct stm32l4_freerun_s *freerun = g_freerun; @@ -149,7 +149,7 @@ int stm32l4_freerun_initialize(struct stm32l4_freerun_s *freerun, int chan, /* Set up to receive the callback when the counter overflow occurs */ - STM32L4_TIM_SETISR(freerun->tch, stm32_freerun_handler, 0); + STM32L4_TIM_SETISR(freerun->tch, stm32l4_freerun_handler, 0); /* Set timer period */ @@ -173,7 +173,7 @@ int stm32l4_freerun_initialize(struct stm32l4_freerun_s *freerun, int chan, * Input Parameters: * freerun Caller allocated instance of the freerun state structure. This * structure must have been previously initialized via a call to - * stm32_freerun_initialize(); + * stm32l4_freerun_initialize(); * ts The location in which to return the time from the free-running * timer. * @@ -197,7 +197,7 @@ int stm32l4_freerun_counter(struct stm32l4_freerun_s *freerun, DEBUGASSERT(freerun && freerun->tch && ts); /* Temporarily disable the overflow counter. NOTE that we have to be - * careful here because stm32_tc_getpending() will reset the pending + * careful here because stm32l4_tc_getpending() will reset the pending * interrupt status. If we do not handle the overflow here then, it will * be lost. */ @@ -267,7 +267,7 @@ int stm32l4_freerun_counter(struct stm32l4_freerun_s *freerun, * Input Parameters: * freerun Caller allocated instance of the freerun state structure. This * structure must have been previously initialized via a call to - * stm32_freerun_initialize(); + * stm32l4_freerun_initialize(); * * Returned Value: * Zero (OK) is returned on success; a negated errno value is returned diff --git a/arch/arm/src/stm32l4/stm32l4_freerun.h b/arch/arm/src/stm32l4/stm32l4_freerun.h index 8b5e004d509..7d551978b4c 100644 --- a/arch/arm/src/stm32l4/stm32l4_freerun.h +++ b/arch/arm/src/stm32l4/stm32l4_freerun.h @@ -56,7 +56,7 @@ ****************************************************************************/ /* The freerun client must allocate an instance of this structure and called - * stm32_freerun_initialize() before using the freerun facilities. The client + * stm32l4_freerun_initialize() before using the freerun facilities. The client * should not access the contents of this structure directly since the * contents are subject to change. */ @@ -118,7 +118,7 @@ int stm32l4_freerun_initialize(struct stm32l4_freerun_s *freerun, int chan, * Input Parameters: * freerun Caller allocated instance of the freerun state structure. This * structure must have been previously initialized via a call to - * stm32_freerun_initialize(); + * stm32l4_freerun_initialize(); * ts The location in which to return the time remaining on the * oneshot timer. * @@ -140,7 +140,7 @@ int stm32l4_freerun_counter(struct stm32l4_freerun_s *freerun, * Input Parameters: * freerun Caller allocated instance of the freerun state structure. This * structure must have been previously initialized via a call to - * stm32_freerun_initialize(); + * stm32l4_freerun_initialize(); * * Returned Value: * Zero (OK) is returned on success; a negated errno value is returned diff --git a/arch/arm/src/stm32l4/stm32l4_gpio.h b/arch/arm/src/stm32l4/stm32l4_gpio.h index 49f8c95fa5d..04dbc5679b1 100644 --- a/arch/arm/src/stm32l4/stm32l4_gpio.h +++ b/arch/arm/src/stm32l4/stm32l4_gpio.h @@ -268,7 +268,7 @@ EXTERN const uint32_t g_gpiobase[STM32L4_NPORTS]; * Description: * Configure a GPIO pin based on bit-encoded description of the pin. * Once it is configured as Alternative (GPIO_ALT|GPIO_CNF_AFPP|...) - * function, it must be unconfigured with stm32_unconfiggpio() with + * function, it must be unconfigured with stm32l4_unconfiggpio() with * the same cfgset first before it can be set to non-alternative function. * * Returns: diff --git a/arch/arm/src/stm32l4/stm32l4_rcc.c b/arch/arm/src/stm32l4/stm32l4_rcc.c index 34e6052eefe..599ed7c4cc8 100644 --- a/arch/arm/src/stm32l4/stm32l4_rcc.c +++ b/arch/arm/src/stm32l4/stm32l4_rcc.c @@ -140,7 +140,7 @@ static inline void rcc_resetbkp(void) ****************************************************************************/ /**************************************************************************** - * Name: stm32_clockconfig + * Name: stm32l4_clockconfig * * Description: * Called to establish the clock settings based on the values in board.h. diff --git a/arch/arm/src/stm32l4/stm32l4_rtc_lowerhalf.c b/arch/arm/src/stm32l4/stm32l4_rtc_lowerhalf.c index 558aa2533be..437faf54f13 100644 --- a/arch/arm/src/stm32l4/stm32l4_rtc_lowerhalf.c +++ b/arch/arm/src/stm32l4/stm32l4_rtc_lowerhalf.c @@ -57,7 +57,7 @@ * Pre-processor Definitions ****************************************************************************/ -#define STM32_NALARMS 2 +#define STM32L4_NALARMS 2 /**************************************************************************** * Private Types @@ -93,7 +93,7 @@ struct stm32l4_lowerhalf_s #ifdef CONFIG_RTC_ALARM /* Alarm callback information */ - struct stm32l4_cbinfo_s cbinfo[STM32_NALARMS]; + struct stm32l4_cbinfo_s cbinfo[STM32L4_NALARMS]; #endif }; @@ -200,7 +200,7 @@ static void stm32l4_alarm_callback(FAR void *arg, unsigned int alarmid) #endif /* CONFIG_RTC_ALARM */ /**************************************************************************** - * Name: stm32_rdtime + * Name: stm32l4_rdtime * * Description: * Implements the rdtime() method of the RTC driver interface diff --git a/arch/arm/src/stm32l4/stm32l4_rtcc.c b/arch/arm/src/stm32l4/stm32l4_rtcc.c index 390e104d726..d15a8981b48 100644 --- a/arch/arm/src/stm32l4/stm32l4_rtcc.c +++ b/arch/arm/src/stm32l4/stm32l4_rtcc.c @@ -685,7 +685,7 @@ static int rtchw_check_alrbwf(void) #endif /************************************************************************************ - * Name: stm32_rtchw_set_alrmXr X is a or b + * Name: stm32l4_rtchw_set_alrmXr X is a or b * * Description: * Set the alarm (A or B) hardware registers, using the required hardware access diff --git a/arch/arm/src/stm32l4/stm32l4_serial.c b/arch/arm/src/stm32l4/stm32l4_serial.c index f29a229992e..aa21ada61d5 100644 --- a/arch/arm/src/stm32l4/stm32l4_serial.c +++ b/arch/arm/src/stm32l4/stm32l4_serial.c @@ -1755,7 +1755,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg) /* Configure TX as a GPIO output pin and Send a break signal*/ tx_break = GPIO_OUTPUT | (~(GPIO_MODE_MASK|GPIO_OUTPUT_SET) & priv->tx_gpio); - stm32_configgpio(tx_break); + stm32l4_configgpio(tx_break); leave_critical_section(flags); } @@ -1769,7 +1769,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg) /* Configure TX back to U(S)ART */ - stm32_configgpio(priv->tx_gpio); + stm32l4_configgpio(priv->tx_gpio); priv->ie &= ~USART_CR1_IE_BREAK_INPROGRESS; diff --git a/arch/arm/src/stm32l4/stm32l4_tim.c b/arch/arm/src/stm32l4/stm32l4_tim.c index 8d273fce1bd..d4c560855c2 100644 --- a/arch/arm/src/stm32l4/stm32l4_tim.c +++ b/arch/arm/src/stm32l4/stm32l4_tim.c @@ -215,7 +215,7 @@ /* TIM Device Structure */ -struct stm32_tim_priv_s +struct stm32l4_tim_priv_s { const struct stm32l4_tim_ops_s *ops; stm32l4_tim_mode_t mode; @@ -228,163 +228,163 @@ struct stm32_tim_priv_s /* Register helpers */ -static inline uint16_t stm32_getreg16(FAR struct stm32l4_tim_dev_s *dev, +static inline uint16_t stm32l4_getreg16(FAR struct stm32l4_tim_dev_s *dev, uint8_t offset); -static inline void stm32_putreg16(FAR struct stm32l4_tim_dev_s *dev, uint8_t offset, +static inline void stm32l4_putreg16(FAR struct stm32l4_tim_dev_s *dev, uint8_t offset, uint16_t value); -static inline void stm32_modifyreg16(FAR struct stm32l4_tim_dev_s *dev, +static inline void stm32l4_modifyreg16(FAR struct stm32l4_tim_dev_s *dev, uint8_t offset, uint16_t clearbits, uint16_t setbits); -static inline uint32_t stm32_getreg32(FAR struct stm32l4_tim_dev_s *dev, +static inline uint32_t stm32l4_getreg32(FAR struct stm32l4_tim_dev_s *dev, uint8_t offset); -static inline void stm32_putreg32(FAR struct stm32l4_tim_dev_s *dev, uint8_t offset, +static inline void stm32l4_putreg32(FAR struct stm32l4_tim_dev_s *dev, uint8_t offset, uint32_t value); /* Timer helpers */ -static void stm32_tim_reload_counter(FAR struct stm32l4_tim_dev_s *dev); -static void stm32_tim_enable(FAR struct stm32l4_tim_dev_s *dev); -static void stm32_tim_disable(FAR struct stm32l4_tim_dev_s *dev); -static void stm32_tim_reset(FAR struct stm32l4_tim_dev_s *dev); +static void stm32l4_tim_reload_counter(FAR struct stm32l4_tim_dev_s *dev); +static void stm32l4_tim_enable(FAR struct stm32l4_tim_dev_s *dev); +static void stm32l4_tim_disable(FAR struct stm32l4_tim_dev_s *dev); +static void stm32l4_tim_reset(FAR struct stm32l4_tim_dev_s *dev); #if defined(HAVE_TIM1_GPIOCONFIG)||defined(HAVE_TIM2_GPIOCONFIG)||\ defined(HAVE_TIM3_GPIOCONFIG)||defined(HAVE_TIM4_GPIOCONFIG)||\ defined(HAVE_TIM5_GPIOCONFIG)||defined(HAVE_TIM8_GPIOCONFIG) -static void stm32_tim_gpioconfig(uint32_t cfg, stm32l4_tim_channel_t mode); +static void stm32l4_tim_gpioconfig(uint32_t cfg, stm32l4_tim_channel_t mode); #endif /* Timer methods */ -static int stm32_tim_setmode(FAR struct stm32l4_tim_dev_s *dev, stm32l4_tim_mode_t mode); -static int stm32_tim_setclock(FAR struct stm32l4_tim_dev_s *dev, uint32_t freq); -static void stm32_tim_setperiod(FAR struct stm32l4_tim_dev_s *dev, +static int stm32l4_tim_setmode(FAR struct stm32l4_tim_dev_s *dev, stm32l4_tim_mode_t mode); +static int stm32l4_tim_setclock(FAR struct stm32l4_tim_dev_s *dev, uint32_t freq); +static void stm32l4_tim_setperiod(FAR struct stm32l4_tim_dev_s *dev, uint32_t period); -static uint32_t stm32_tim_getcounter(FAR struct stm32l4_tim_dev_s *dev); -static int stm32_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev, uint8_t channel, +static uint32_t stm32l4_tim_getcounter(FAR struct stm32l4_tim_dev_s *dev); +static int stm32l4_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev, uint8_t channel, stm32l4_tim_channel_t mode); -static int stm32_tim_setcompare(FAR struct stm32l4_tim_dev_s *dev, uint8_t channel, +static int stm32l4_tim_setcompare(FAR struct stm32l4_tim_dev_s *dev, uint8_t channel, uint32_t compare); -static int stm32_tim_getcapture(FAR struct stm32l4_tim_dev_s *dev, uint8_t channel); -static int stm32_tim_setisr(FAR struct stm32l4_tim_dev_s *dev, +static int stm32l4_tim_getcapture(FAR struct stm32l4_tim_dev_s *dev, uint8_t channel); +static int stm32l4_tim_setisr(FAR struct stm32l4_tim_dev_s *dev, int (*handler)(int irq, void *context), int source); -static void stm32_tim_enableint(FAR struct stm32l4_tim_dev_s *dev, int source); -static void stm32_tim_disableint(FAR struct stm32l4_tim_dev_s *dev, int source); -static void stm32_tim_ackint(FAR struct stm32l4_tim_dev_s *dev, int source); -static int stm32_tim_checkint(FAR struct stm32l4_tim_dev_s *dev, int source); +static void stm32l4_tim_enableint(FAR struct stm32l4_tim_dev_s *dev, int source); +static void stm32l4_tim_disableint(FAR struct stm32l4_tim_dev_s *dev, int source); +static void stm32l4_tim_ackint(FAR struct stm32l4_tim_dev_s *dev, int source); +static int stm32l4_tim_checkint(FAR struct stm32l4_tim_dev_s *dev, int source); /************************************************************************************ * Private Data ************************************************************************************/ -static const struct stm32l4_tim_ops_s stm32_tim_ops = +static const struct stm32l4_tim_ops_s stm32l4_tim_ops = { - .setmode = stm32_tim_setmode, - .setclock = stm32_tim_setclock, - .setperiod = stm32_tim_setperiod, - .getcounter = stm32_tim_getcounter, - .setchannel = stm32_tim_setchannel, - .setcompare = stm32_tim_setcompare, - .getcapture = stm32_tim_getcapture, - .setisr = stm32_tim_setisr, - .enableint = stm32_tim_enableint, - .disableint = stm32_tim_disableint, - .ackint = stm32_tim_ackint, - .checkint = stm32_tim_checkint, + .setmode = stm32l4_tim_setmode, + .setclock = stm32l4_tim_setclock, + .setperiod = stm32l4_tim_setperiod, + .getcounter = stm32l4_tim_getcounter, + .setchannel = stm32l4_tim_setchannel, + .setcompare = stm32l4_tim_setcompare, + .getcapture = stm32l4_tim_getcapture, + .setisr = stm32l4_tim_setisr, + .enableint = stm32l4_tim_enableint, + .disableint = stm32l4_tim_disableint, + .ackint = stm32l4_tim_ackint, + .checkint = stm32l4_tim_checkint, }; #ifdef CONFIG_STM32L4_TIM1 -struct stm32_tim_priv_s stm32_tim1_priv = +struct stm32l4_tim_priv_s stm32l4_tim1_priv = { - .ops = &stm32_tim_ops, + .ops = &stm32l4_tim_ops, .mode = STM32L4_TIM_MODE_UNUSED, .base = STM32L4_TIM1_BASE, }; #endif #ifdef CONFIG_STM32L4_TIM2 -struct stm32_tim_priv_s stm32_tim2_priv = +struct stm32l4_tim_priv_s stm32l4_tim2_priv = { - .ops = &stm32_tim_ops, + .ops = &stm32l4_tim_ops, .mode = STM32L4_TIM_MODE_UNUSED, .base = STM32L4_TIM2_BASE, }; #endif #ifdef CONFIG_STM32L4_TIM3 -struct stm32_tim_priv_s stm32_tim3_priv = +struct stm32l4_tim_priv_s stm32l4_tim3_priv = { - .ops = &stm32_tim_ops, + .ops = &stm32l4_tim_ops, .mode = STM32L4_TIM_MODE_UNUSED, .base = STM32L4_TIM3_BASE, }; #endif #ifdef CONFIG_STM32L4_TIM4 -struct stm32_tim_priv_s stm32_tim4_priv = +struct stm32l4_tim_priv_s stm32l4_tim4_priv = { - .ops = &stm32_tim_ops, + .ops = &stm32l4_tim_ops, .mode = STM32L4_TIM_MODE_UNUSED, .base = STM32L4_TIM4_BASE, }; #endif #ifdef CONFIG_STM32L4_TIM5 -struct stm32_tim_priv_s stm32_tim5_priv = +struct stm32l4_tim_priv_s stm32l4_tim5_priv = { - .ops = &stm32_tim_ops, + .ops = &stm32l4_tim_ops, .mode = STM32L4_TIM_MODE_UNUSED, .base = STM32L4_TIM5_BASE, }; #endif #ifdef CONFIG_STM32L4_TIM6 -struct stm32_tim_priv_s stm32_tim6_priv = +struct stm32l4_tim_priv_s stm32l4_tim6_priv = { - .ops = &stm32_tim_ops, + .ops = &stm32l4_tim_ops, .mode = STM32L4_TIM_MODE_UNUSED, .base = STM32L4_TIM6_BASE, }; #endif #ifdef CONFIG_STM32L4_TIM7 -struct stm32_tim_priv_s stm32_tim7_priv = +struct stm32l4_tim_priv_s stm32l4_tim7_priv = { - .ops = &stm32_tim_ops, + .ops = &stm32l4_tim_ops, .mode = STM32L4_TIM_MODE_UNUSED, .base = STM32L4_TIM7_BASE, }; #endif #ifdef CONFIG_STM32L4_TIM8 -struct stm32_tim_priv_s stm32_tim8_priv = +struct stm32l4_tim_priv_s stm32l4_tim8_priv = { - .ops = &stm32_tim_ops, + .ops = &stm32l4_tim_ops, .mode = STM32L4_TIM_MODE_UNUSED, .base = STM32L4_TIM8_BASE, }; #endif #ifdef CONFIG_STM32L4_TIM15 -struct stm32_tim_priv_s stm32_tim15_priv = +struct stm32l4_tim_priv_s stm32l4_tim15_priv = { - .ops = &stm32_tim_ops, + .ops = &stm32l4_tim_ops, .mode = STM32L4_TIM_MODE_UNUSED, .base = STM32L4_TIM15_BASE, }; #endif #ifdef CONFIG_STM32L4_TIM16 -struct stm32_tim_priv_s stm32_tim16_priv = +struct stm32l4_tim_priv_s stm32l4_tim16_priv = { - .ops = &stm32_tim_ops, + .ops = &stm32l4_tim_ops, .mode = STM32L4_TIM_MODE_UNUSED, .base = STM32L4_TIM16_BASE, }; #endif #ifdef CONFIG_STM32L4_TIM17 -struct stm32_tim_priv_s stm32_tim17_priv = +struct stm32l4_tim_priv_s stm32l4_tim17_priv = { - .ops = &stm32_tim_ops, + .ops = &stm32l4_tim_ops, .mode = STM32L4_TIM_MODE_UNUSED, .base = STM32L4_TIM17_BASE, }; @@ -395,50 +395,50 @@ struct stm32_tim_priv_s stm32_tim17_priv = ************************************************************************************/ /************************************************************************************ - * Name: stm32_getreg16 + * Name: stm32l4_getreg16 * * Description: * Get a 16-bit register value by offset * ************************************************************************************/ -static inline uint16_t stm32_getreg16(FAR struct stm32l4_tim_dev_s *dev, +static inline uint16_t stm32l4_getreg16(FAR struct stm32l4_tim_dev_s *dev, uint8_t offset) { - return getreg16(((struct stm32_tim_priv_s *)dev)->base + offset); + return getreg16(((struct stm32l4_tim_priv_s *)dev)->base + offset); } /************************************************************************************ - * Name: stm32_putreg16 + * Name: stm32l4_putreg16 * * Description: * Put a 16-bit register value by offset * ************************************************************************************/ -static inline void stm32_putreg16(FAR struct stm32l4_tim_dev_s *dev, uint8_t offset, +static inline void stm32l4_putreg16(FAR struct stm32l4_tim_dev_s *dev, uint8_t offset, uint16_t value) { - putreg16(value, ((struct stm32_tim_priv_s *)dev)->base + offset); + putreg16(value, ((struct stm32l4_tim_priv_s *)dev)->base + offset); } /************************************************************************************ - * Name: stm32_modifyreg16 + * Name: stm32l4_modifyreg16 * * Description: * Modify a 16-bit register value by offset * ************************************************************************************/ -static inline void stm32_modifyreg16(FAR struct stm32l4_tim_dev_s *dev, +static inline void stm32l4_modifyreg16(FAR struct stm32l4_tim_dev_s *dev, uint8_t offset, uint16_t clearbits, uint16_t setbits) { - modifyreg16(((struct stm32_tim_priv_s *)dev)->base + offset, clearbits, setbits); + modifyreg16(((struct stm32l4_tim_priv_s *)dev)->base + offset, clearbits, setbits); } /************************************************************************************ - * Name: stm32_getreg32 + * Name: stm32l4_getreg32 * * Description: * Get a 32-bit register value by offset. This applies only for the STM32 F4 @@ -446,14 +446,14 @@ static inline void stm32_modifyreg16(FAR struct stm32l4_tim_dev_s *dev, * ************************************************************************************/ -static inline uint32_t stm32_getreg32(FAR struct stm32l4_tim_dev_s *dev, +static inline uint32_t stm32l4_getreg32(FAR struct stm32l4_tim_dev_s *dev, uint8_t offset) { - return getreg32(((struct stm32_tim_priv_s *)dev)->base + offset); + return getreg32(((struct stm32l4_tim_priv_s *)dev)->base + offset); } /************************************************************************************ - * Name: stm32_putreg32 + * Name: stm32l4_putreg32 * * Description: * Put a 32-bit register value by offset. This applies only for the STM32 F4 @@ -461,87 +461,87 @@ static inline uint32_t stm32_getreg32(FAR struct stm32l4_tim_dev_s *dev, * ************************************************************************************/ -static inline void stm32_putreg32(FAR struct stm32l4_tim_dev_s *dev, uint8_t offset, +static inline void stm32l4_putreg32(FAR struct stm32l4_tim_dev_s *dev, uint8_t offset, uint32_t value) { - putreg32(value, ((struct stm32_tim_priv_s *)dev)->base + offset); + putreg32(value, ((struct stm32l4_tim_priv_s *)dev)->base + offset); } /************************************************************************************ - * Name: stm32_tim_reload_counter + * Name: stm32l4_tim_reload_counter ************************************************************************************/ -static void stm32_tim_reload_counter(FAR struct stm32l4_tim_dev_s *dev) +static void stm32l4_tim_reload_counter(FAR struct stm32l4_tim_dev_s *dev) { - uint16_t val = stm32_getreg16(dev, STM32L4_BTIM_EGR_OFFSET); + uint16_t val = stm32l4_getreg16(dev, STM32L4_BTIM_EGR_OFFSET); val |= ATIM_EGR_UG; - stm32_putreg16(dev, STM32L4_BTIM_EGR_OFFSET, val); + stm32l4_putreg16(dev, STM32L4_BTIM_EGR_OFFSET, val); } /************************************************************************************ - * Name: stm32_tim_enable + * Name: stm32l4_tim_enable ************************************************************************************/ -static void stm32_tim_enable(FAR struct stm32l4_tim_dev_s *dev) +static void stm32l4_tim_enable(FAR struct stm32l4_tim_dev_s *dev) { - uint16_t val = stm32_getreg16(dev, STM32L4_BTIM_CR1_OFFSET); + uint16_t val = stm32l4_getreg16(dev, STM32L4_BTIM_CR1_OFFSET); val |= ATIM_CR1_CEN; - stm32_tim_reload_counter(dev); - stm32_putreg16(dev, STM32L4_BTIM_CR1_OFFSET, val); + stm32l4_tim_reload_counter(dev); + stm32l4_putreg16(dev, STM32L4_BTIM_CR1_OFFSET, val); } /************************************************************************************ - * Name: stm32_tim_disable + * Name: stm32l4_tim_disable ************************************************************************************/ -static void stm32_tim_disable(FAR struct stm32l4_tim_dev_s *dev) +static void stm32l4_tim_disable(FAR struct stm32l4_tim_dev_s *dev) { - uint16_t val = stm32_getreg16(dev, STM32L4_BTIM_CR1_OFFSET); + uint16_t val = stm32l4_getreg16(dev, STM32L4_BTIM_CR1_OFFSET); val &= ~ATIM_CR1_CEN; - stm32_putreg16(dev, STM32L4_BTIM_CR1_OFFSET, val); + stm32l4_putreg16(dev, STM32L4_BTIM_CR1_OFFSET, val); } /************************************************************************************ - * Name: stm32_tim_reset + * Name: stm32l4_tim_reset * * Description: * Reset timer into system default state, but do not affect output/input pins * ************************************************************************************/ -static void stm32_tim_reset(FAR struct stm32l4_tim_dev_s *dev) +static void stm32l4_tim_reset(FAR struct stm32l4_tim_dev_s *dev) { - ((struct stm32_tim_priv_s *)dev)->mode = STM32L4_TIM_MODE_DISABLED; - stm32_tim_disable(dev); + ((struct stm32l4_tim_priv_s *)dev)->mode = STM32L4_TIM_MODE_DISABLED; + stm32l4_tim_disable(dev); } /************************************************************************************ - * Name: stm32_tim_gpioconfig + * Name: stm32l4_tim_gpioconfig ************************************************************************************/ #if defined(HAVE_TIM1_GPIOCONFIG)||defined(HAVE_TIM2_GPIOCONFIG)||\ defined(HAVE_TIM3_GPIOCONFIG)||defined(HAVE_TIM4_GPIOCONFIG)||\ defined(HAVE_TIM5_GPIOCONFIG)||defined(HAVE_TIM8_GPIOCONFIG) -static void stm32_tim_gpioconfig(uint32_t cfg, stm32l4_tim_channel_t mode) +static void stm32l4_tim_gpioconfig(uint32_t cfg, stm32l4_tim_channel_t mode) { /* TODO: Add support for input capture and bipolar dual outputs for TIM8 */ if (mode & STM32L4_TIM_CH_MODE_MASK) { - stm32_configgpio(cfg); + stm32l4_configgpio(cfg); } else { - stm32_unconfiggpio(cfg); + stm32l4_unconfiggpio(cfg); } } #endif /************************************************************************************ - * Name: stm32_tim_setmode + * Name: stm32l4_tim_setmode ************************************************************************************/ -static int stm32_tim_setmode(FAR struct stm32l4_tim_dev_s *dev, stm32l4_tim_mode_t mode) +static int stm32l4_tim_setmode(FAR struct stm32l4_tim_dev_s *dev, stm32l4_tim_mode_t mode) { uint16_t val = ATIM_CR1_CEN | ATIM_CR1_ARPE; @@ -552,10 +552,10 @@ static int stm32_tim_setmode(FAR struct stm32l4_tim_dev_s *dev, stm32l4_tim_mode */ #if STM32L4_NBTIM > 0 - if (((struct stm32_tim_priv_s *)dev)->base == STM32L4_TIM6_BASE + if (((struct stm32l4_tim_priv_s *)dev)->base == STM32L4_TIM6_BASE #endif #if STM32L4_NBTIM > 1 - || ((struct stm32_tim_priv_s *)dev)->base == STM32L4_TIM7_BASE + || ((struct stm32l4_tim_priv_s *)dev)->base == STM32L4_TIM7_BASE #endif #if STM32L4_NBTIM > 0 ) @@ -591,16 +591,16 @@ static int stm32_tim_setmode(FAR struct stm32l4_tim_dev_s *dev, stm32l4_tim_mode return -EINVAL; } - stm32_tim_reload_counter(dev); - stm32_putreg16(dev, STM32L4_BTIM_CR1_OFFSET, val); + stm32l4_tim_reload_counter(dev); + stm32l4_putreg16(dev, STM32L4_BTIM_CR1_OFFSET, val); #if STM32L4_NATIM > 0 /* Advanced registers require Main Output Enable */ - if (((struct stm32_tim_priv_s *)dev)->base == STM32L4_TIM1_BASE || - ((struct stm32_tim_priv_s *)dev)->base == STM32L4_TIM8_BASE) + if (((struct stm32l4_tim_priv_s *)dev)->base == STM32L4_TIM1_BASE || + ((struct stm32l4_tim_priv_s *)dev)->base == STM32L4_TIM8_BASE) { - stm32_modifyreg16(dev, STM32L4_ATIM_BDTR_OFFSET, 0, ATIM_BDTR_MOE); + stm32l4_modifyreg16(dev, STM32L4_ATIM_BDTR_OFFSET, 0, ATIM_BDTR_MOE); } #endif @@ -608,10 +608,10 @@ static int stm32_tim_setmode(FAR struct stm32l4_tim_dev_s *dev, stm32l4_tim_mode } /************************************************************************************ - * Name: stm32_tim_setclock + * Name: stm32l4_tim_setclock ************************************************************************************/ -static int stm32_tim_setclock(FAR struct stm32l4_tim_dev_s *dev, uint32_t freq) +static int stm32l4_tim_setclock(FAR struct stm32l4_tim_dev_s *dev, uint32_t freq) { uint32_t freqin; int prescaler; @@ -622,7 +622,7 @@ static int stm32_tim_setclock(FAR struct stm32l4_tim_dev_s *dev, uint32_t freq) if (freq == 0) { - stm32_tim_disable(dev); + stm32l4_tim_disable(dev); return 0; } @@ -632,7 +632,7 @@ static int stm32_tim_setclock(FAR struct stm32l4_tim_dev_s *dev, uint32_t freq) * must be defined in the board.h header file. */ - switch (((struct stm32_tim_priv_s *)dev)->base) + switch (((struct stm32l4_tim_priv_s *)dev)->base) { #ifdef CONFIG_STM32L4_TIM1 case STM32L4_TIM1_BASE: @@ -716,44 +716,44 @@ static int stm32_tim_setclock(FAR struct stm32l4_tim_dev_s *dev, uint32_t freq) prescaler = 0xffff; } - stm32_putreg16(dev, STM32L4_BTIM_PSC_OFFSET, prescaler); - stm32_tim_enable(dev); + stm32l4_putreg16(dev, STM32L4_BTIM_PSC_OFFSET, prescaler); + stm32l4_tim_enable(dev); return prescaler; } /************************************************************************************ - * Name: stm32_tim_setperiod + * Name: stm32l4_tim_setperiod ************************************************************************************/ -static void stm32_tim_setperiod(FAR struct stm32l4_tim_dev_s *dev, +static void stm32l4_tim_setperiod(FAR struct stm32l4_tim_dev_s *dev, uint32_t period) { DEBUGASSERT(dev != NULL); - stm32_putreg32(dev, STM32L4_BTIM_ARR_OFFSET, period); + stm32l4_putreg32(dev, STM32L4_BTIM_ARR_OFFSET, period); } /************************************************************************************ - * Name: stm32_tim_getcounter + * Name: stm32l4_tim_getcounter ************************************************************************************/ -static uint32_t stm32_tim_getcounter(FAR struct stm32l4_tim_dev_s *dev) +static uint32_t stm32l4_tim_getcounter(FAR struct stm32l4_tim_dev_s *dev) { DEBUGASSERT(dev != NULL); - return stm32_getreg32(dev, STM32L4_BTIM_CNT_OFFSET); + return stm32l4_getreg32(dev, STM32L4_BTIM_CNT_OFFSET); } /************************************************************************************ - * Name: stm32_tim_setchannel + * Name: stm32l4_tim_setchannel ************************************************************************************/ -static int stm32_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev, uint8_t channel, +static int stm32l4_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev, uint8_t channel, stm32l4_tim_channel_t mode) { uint16_t ccmr_orig = 0; uint16_t ccmr_val = 0; uint16_t ccmr_mask = 0xff; - uint16_t ccer_val = stm32_getreg16(dev, STM32L4_GTIM_CCER_OFFSET); + uint16_t ccer_val = stm32l4_getreg16(dev, STM32L4_GTIM_CCER_OFFSET); uint8_t ccmr_offset = STM32L4_GTIM_CCMR1_OFFSET; DEBUGASSERT(dev != NULL); @@ -774,10 +774,10 @@ static int stm32_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev, uint8_t chann */ #if STM32L4_NBTIM > 0 - if (((struct stm32_tim_priv_s *)dev)->base == STM32L4_TIM6_BASE + if (((struct stm32l4_tim_priv_s *)dev)->base == STM32L4_TIM6_BASE #endif #if STM32L4_NBTIM > 1 - || ((struct stm32_tim_priv_s *)dev)->base == STM32L4_TIM7_BASE + || ((struct stm32l4_tim_priv_s *)dev)->base == STM32L4_TIM7_BASE #endif #if STM32L4_NBTIM > 0 ) @@ -822,15 +822,15 @@ static int stm32_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev, uint8_t chann ccmr_offset = STM32L4_GTIM_CCMR2_OFFSET; } - ccmr_orig = stm32_getreg16(dev, ccmr_offset); + ccmr_orig = stm32l4_getreg16(dev, ccmr_offset); ccmr_orig &= ~ccmr_mask; ccmr_orig |= ccmr_val; - stm32_putreg16(dev, ccmr_offset, ccmr_orig); - stm32_putreg16(dev, STM32L4_GTIM_CCER_OFFSET, ccer_val); + stm32l4_putreg16(dev, ccmr_offset, ccmr_orig); + stm32l4_putreg16(dev, STM32L4_GTIM_CCER_OFFSET, ccer_val); /* set GPIO */ - switch (((struct stm32_tim_priv_s *)dev)->base) + switch (((struct stm32l4_tim_priv_s *)dev)->base) { #ifdef CONFIG_STM32L4_TIM1 case STM32L4_TIM1_BASE: @@ -838,19 +838,19 @@ static int stm32_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev, uint8_t chann { #if defined(GPIO_TIM1_CH1OUT) case 0: - stm32_tim_gpioconfig(GPIO_TIM1_CH1OUT, mode); break; + stm32l4_tim_gpioconfig(GPIO_TIM1_CH1OUT, mode); break; #endif #if defined(GPIO_TIM1_CH2OUT) case 1: - stm32_tim_gpioconfig(GPIO_TIM1_CH2OUT, mode); break; + stm32l4_tim_gpioconfig(GPIO_TIM1_CH2OUT, mode); break; #endif #if defined(GPIO_TIM1_CH3OUT) case 2: - stm32_tim_gpioconfig(GPIO_TIM1_CH3OUT, mode); break; + stm32l4_tim_gpioconfig(GPIO_TIM1_CH3OUT, mode); break; #endif #if defined(GPIO_TIM1_CH4OUT) case 3: - stm32_tim_gpioconfig(GPIO_TIM1_CH4OUT, mode); break; + stm32l4_tim_gpioconfig(GPIO_TIM1_CH4OUT, mode); break; #endif default: return -EINVAL; @@ -863,22 +863,22 @@ static int stm32_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev, uint8_t chann { #if defined(GPIO_TIM2_CH1OUT) case 0: - stm32_tim_gpioconfig(GPIO_TIM2_CH1OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM2_CH1OUT, mode); break; #endif #if defined(GPIO_TIM2_CH2OUT) case 1: - stm32_tim_gpioconfig(GPIO_TIM2_CH2OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM2_CH2OUT, mode); break; #endif #if defined(GPIO_TIM2_CH3OUT) case 2: - stm32_tim_gpioconfig(GPIO_TIM2_CH3OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM2_CH3OUT, mode); break; #endif #if defined(GPIO_TIM2_CH4OUT) case 3: - stm32_tim_gpioconfig(GPIO_TIM2_CH4OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM2_CH4OUT, mode); break; #endif default: @@ -892,22 +892,22 @@ static int stm32_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev, uint8_t chann { #if defined(GPIO_TIM3_CH1OUT) case 0: - stm32_tim_gpioconfig(GPIO_TIM3_CH1OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM3_CH1OUT, mode); break; #endif #if defined(GPIO_TIM3_CH2OUT) case 1: - stm32_tim_gpioconfig(GPIO_TIM3_CH2OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM3_CH2OUT, mode); break; #endif #if defined(GPIO_TIM3_CH3OUT) case 2: - stm32_tim_gpioconfig(GPIO_TIM3_CH3OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM3_CH3OUT, mode); break; #endif #if defined(GPIO_TIM3_CH4OUT) case 3: - stm32_tim_gpioconfig(GPIO_TIM3_CH4OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM3_CH4OUT, mode); break; #endif default: @@ -921,22 +921,22 @@ static int stm32_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev, uint8_t chann { #if defined(GPIO_TIM4_CH1OUT) case 0: - stm32_tim_gpioconfig(GPIO_TIM4_CH1OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM4_CH1OUT, mode); break; #endif #if defined(GPIO_TIM4_CH2OUT) case 1: - stm32_tim_gpioconfig(GPIO_TIM4_CH2OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM4_CH2OUT, mode); break; #endif #if defined(GPIO_TIM4_CH3OUT) case 2: - stm32_tim_gpioconfig(GPIO_TIM4_CH3OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM4_CH3OUT, mode); break; #endif #if defined(GPIO_TIM4_CH4OUT) case 3: - stm32_tim_gpioconfig(GPIO_TIM4_CH4OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM4_CH4OUT, mode); break; #endif default: @@ -950,22 +950,22 @@ static int stm32_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev, uint8_t chann { #if defined(GPIO_TIM5_CH1OUT) case 0: - stm32_tim_gpioconfig(GPIO_TIM5_CH1OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM5_CH1OUT, mode); break; #endif #if defined(GPIO_TIM5_CH2OUT) case 1: - stm32_tim_gpioconfig(GPIO_TIM5_CH2OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM5_CH2OUT, mode); break; #endif #if defined(GPIO_TIM5_CH3OUT) case 2: - stm32_tim_gpioconfig(GPIO_TIM5_CH3OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM5_CH3OUT, mode); break; #endif #if defined(GPIO_TIM5_CH4OUT) case 3: - stm32_tim_gpioconfig(GPIO_TIM5_CH4OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM5_CH4OUT, mode); break; #endif default: @@ -979,19 +979,19 @@ static int stm32_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev, uint8_t chann { #if defined(GPIO_TIM8_CH1OUT) case 0: - stm32_tim_gpioconfig(GPIO_TIM8_CH1OUT, mode); break; + stm32l4_tim_gpioconfig(GPIO_TIM8_CH1OUT, mode); break; #endif #if defined(GPIO_TIM8_CH2OUT) case 1: - stm32_tim_gpioconfig(GPIO_TIM8_CH2OUT, mode); break; + stm32l4_tim_gpioconfig(GPIO_TIM8_CH2OUT, mode); break; #endif #if defined(GPIO_TIM8_CH3OUT) case 2: - stm32_tim_gpioconfig(GPIO_TIM8_CH3OUT, mode); break; + stm32l4_tim_gpioconfig(GPIO_TIM8_CH3OUT, mode); break; #endif #if defined(GPIO_TIM8_CH4OUT) case 3: - stm32_tim_gpioconfig(GPIO_TIM8_CH4OUT, mode); break; + stm32l4_tim_gpioconfig(GPIO_TIM8_CH4OUT, mode); break; #endif default: return -EINVAL; @@ -1004,22 +1004,22 @@ static int stm32_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev, uint8_t chann { #if defined(GPIO_TIM15_CH1OUT) case 0: - stm32_tim_gpioconfig(GPIO_TIM15_CH1OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM15_CH1OUT, mode); break; #endif #if defined(GPIO_TIM15_CH2OUT) case 1: - stm32_tim_gpioconfig(GPIO_TIM15_CH2OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM15_CH2OUT, mode); break; #endif #if defined(GPIO_TIM15_CH3OUT) case 2: - stm32_tim_gpioconfig(GPIO_TIM15_CH3OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM15_CH3OUT, mode); break; #endif #if defined(GPIO_TIM15_CH4OUT) case 3: - stm32_tim_gpioconfig(GPIO_TIM15_CH4OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM15_CH4OUT, mode); break; #endif default: @@ -1033,22 +1033,22 @@ static int stm32_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev, uint8_t chann { #if defined(GPIO_TIM16_CH1OUT) case 0: - stm32_tim_gpioconfig(GPIO_TIM16_CH1OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM16_CH1OUT, mode); break; #endif #if defined(GPIO_TIM16_CH2OUT) case 1: - stm32_tim_gpioconfig(GPIO_TIM16_CH2OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM16_CH2OUT, mode); break; #endif #if defined(GPIO_TIM16_CH3OUT) case 2: - stm32_tim_gpioconfig(GPIO_TIM16_CH3OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM16_CH3OUT, mode); break; #endif #if defined(GPIO_TIM16_CH4OUT) case 3: - stm32_tim_gpioconfig(GPIO_TIM16_CH4OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM16_CH4OUT, mode); break; #endif default: @@ -1062,22 +1062,22 @@ static int stm32_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev, uint8_t chann { #if defined(GPIO_TIM17_CH1OUT) case 0: - stm32_tim_gpioconfig(GPIO_TIM17_CH1OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM17_CH1OUT, mode); break; #endif #if defined(GPIO_TIM17_CH2OUT) case 1: - stm32_tim_gpioconfig(GPIO_TIM17_CH2OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM17_CH2OUT, mode); break; #endif #if defined(GPIO_TIM17_CH3OUT) case 2: - stm32_tim_gpioconfig(GPIO_TIM17_CH3OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM17_CH3OUT, mode); break; #endif #if defined(GPIO_TIM17_CH4OUT) case 3: - stm32_tim_gpioconfig(GPIO_TIM17_CH4OUT, mode); + stm32l4_tim_gpioconfig(GPIO_TIM17_CH4OUT, mode); break; #endif default: @@ -1093,10 +1093,10 @@ static int stm32_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev, uint8_t chann } /************************************************************************************ - * Name: stm32_tim_setcompare + * Name: stm32l4_tim_setcompare ************************************************************************************/ -static int stm32_tim_setcompare(FAR struct stm32l4_tim_dev_s *dev, uint8_t channel, +static int stm32l4_tim_setcompare(FAR struct stm32l4_tim_dev_s *dev, uint8_t channel, uint32_t compare) { DEBUGASSERT(dev != NULL); @@ -1104,16 +1104,16 @@ static int stm32_tim_setcompare(FAR struct stm32l4_tim_dev_s *dev, uint8_t chann switch (channel) { case 1: - stm32_putreg32(dev, STM32L4_GTIM_CCR1_OFFSET, compare); + stm32l4_putreg32(dev, STM32L4_GTIM_CCR1_OFFSET, compare); break; case 2: - stm32_putreg32(dev, STM32L4_GTIM_CCR2_OFFSET, compare); + stm32l4_putreg32(dev, STM32L4_GTIM_CCR2_OFFSET, compare); break; case 3: - stm32_putreg32(dev, STM32L4_GTIM_CCR3_OFFSET, compare); + stm32l4_putreg32(dev, STM32L4_GTIM_CCR3_OFFSET, compare); break; case 4: - stm32_putreg32(dev, STM32L4_GTIM_CCR4_OFFSET, compare); + stm32l4_putreg32(dev, STM32L4_GTIM_CCR4_OFFSET, compare); break; default: return -EINVAL; @@ -1122,33 +1122,33 @@ static int stm32_tim_setcompare(FAR struct stm32l4_tim_dev_s *dev, uint8_t chann } /************************************************************************************ - * Name: stm32_tim_getcapture + * Name: stm32l4_tim_getcapture ************************************************************************************/ -static int stm32_tim_getcapture(FAR struct stm32l4_tim_dev_s *dev, uint8_t channel) +static int stm32l4_tim_getcapture(FAR struct stm32l4_tim_dev_s *dev, uint8_t channel) { DEBUGASSERT(dev != NULL); switch (channel) { case 1: - return stm32_getreg32(dev, STM32L4_GTIM_CCR1_OFFSET); + return stm32l4_getreg32(dev, STM32L4_GTIM_CCR1_OFFSET); case 2: - return stm32_getreg32(dev, STM32L4_GTIM_CCR2_OFFSET); + return stm32l4_getreg32(dev, STM32L4_GTIM_CCR2_OFFSET); case 3: - return stm32_getreg32(dev, STM32L4_GTIM_CCR3_OFFSET); + return stm32l4_getreg32(dev, STM32L4_GTIM_CCR3_OFFSET); case 4: - return stm32_getreg32(dev, STM32L4_GTIM_CCR4_OFFSET); + return stm32l4_getreg32(dev, STM32L4_GTIM_CCR4_OFFSET); } return -EINVAL; } /************************************************************************************ - * Name: stm32_tim_setisr + * Name: stm32l4_tim_setisr ************************************************************************************/ -static int stm32_tim_setisr(FAR struct stm32l4_tim_dev_s *dev, +static int stm32l4_tim_setisr(FAR struct stm32l4_tim_dev_s *dev, int (*handler)(int irq, void *context), int source) { @@ -1157,7 +1157,7 @@ static int stm32_tim_setisr(FAR struct stm32l4_tim_dev_s *dev, DEBUGASSERT(dev != NULL); DEBUGASSERT(source == 0); - switch (((struct stm32_tim_priv_s *)dev)->base) + switch (((struct stm32l4_tim_priv_s *)dev)->base) { #ifdef CONFIG_STM32L4_TIM1 case STM32L4_TIM1_BASE: @@ -1243,41 +1243,41 @@ static int stm32_tim_setisr(FAR struct stm32l4_tim_dev_s *dev, } /************************************************************************************ - * Name: stm32_tim_enableint + * Name: stm32l4_tim_enableint ************************************************************************************/ -static void stm32_tim_enableint(FAR struct stm32l4_tim_dev_s *dev, int source) +static void stm32l4_tim_enableint(FAR struct stm32l4_tim_dev_s *dev, int source) { DEBUGASSERT(dev != NULL); - stm32_modifyreg16(dev, STM32L4_BTIM_DIER_OFFSET, 0, ATIM_DIER_UIE); + stm32l4_modifyreg16(dev, STM32L4_BTIM_DIER_OFFSET, 0, ATIM_DIER_UIE); } /************************************************************************************ - * Name: stm32_tim_disableint + * Name: stm32l4_tim_disableint ************************************************************************************/ -static void stm32_tim_disableint(FAR struct stm32l4_tim_dev_s *dev, int source) +static void stm32l4_tim_disableint(FAR struct stm32l4_tim_dev_s *dev, int source) { DEBUGASSERT(dev != NULL); - stm32_modifyreg16(dev, STM32L4_BTIM_DIER_OFFSET, ATIM_DIER_UIE, 0); + stm32l4_modifyreg16(dev, STM32L4_BTIM_DIER_OFFSET, ATIM_DIER_UIE, 0); } /************************************************************************************ - * Name: stm32_tim_ackint + * Name: stm32l4_tim_ackint ************************************************************************************/ -static void stm32_tim_ackint(FAR struct stm32l4_tim_dev_s *dev, int source) +static void stm32l4_tim_ackint(FAR struct stm32l4_tim_dev_s *dev, int source) { - stm32_putreg16(dev, STM32L4_BTIM_SR_OFFSET, ~ATIM_SR_UIF); + stm32l4_putreg16(dev, STM32L4_BTIM_SR_OFFSET, ~ATIM_SR_UIF); } /************************************************************************************ - * Name: stm32_tim_checkint + * Name: stm32l4_tim_checkint ************************************************************************************/ -static int stm32_tim_checkint(FAR struct stm32l4_tim_dev_s *dev, int source) +static int stm32l4_tim_checkint(FAR struct stm32l4_tim_dev_s *dev, int source) { - uint16_t regval = stm32_getreg16(dev, STM32L4_BTIM_SR_OFFSET); + uint16_t regval = stm32l4_getreg16(dev, STM32L4_BTIM_SR_OFFSET); return (regval & ATIM_SR_UIF) ? 1 : 0; } @@ -1286,7 +1286,7 @@ static int stm32_tim_checkint(FAR struct stm32l4_tim_dev_s *dev, int source) ************************************************************************************/ /************************************************************************************ - * Name: stm32_tim_init + * Name: stm32l4_tim_init ************************************************************************************/ FAR struct stm32l4_tim_dev_s *stm32l4_tim_init(int timer) @@ -1299,67 +1299,67 @@ FAR struct stm32l4_tim_dev_s *stm32l4_tim_init(int timer) { #ifdef CONFIG_STM32L4_TIM1 case 1: - dev = (struct stm32l4_tim_dev_s *)&stm32_tim1_priv; + dev = (struct stm32l4_tim_dev_s *)&stm32l4_tim1_priv; modifyreg32(STM32L4_RCC_APB2ENR, 0, RCC_APB2ENR_TIM1EN); break; #endif #ifdef CONFIG_STM32L4_TIM2 case 2: - dev = (struct stm32l4_tim_dev_s *)&stm32_tim2_priv; + dev = (struct stm32l4_tim_dev_s *)&stm32l4_tim2_priv; modifyreg32(STM32L4_RCC_APB1ENR1, 0, RCC_APB1ENR1_TIM2EN); break; #endif #ifdef CONFIG_STM32L4_TIM3 case 3: - dev = (struct stm32l4_tim_dev_s *)&stm32_tim3_priv; + dev = (struct stm32l4_tim_dev_s *)&stm32l4_tim3_priv; modifyreg32(STM32L4_RCC_APB1ENR1, 0, RCC_APB1ENR1_TIM3EN); break; #endif #ifdef CONFIG_STM32L4_TIM4 case 4: - dev = (struct stm32l4_tim_dev_s *)&stm32_tim4_priv; + dev = (struct stm32l4_tim_dev_s *)&stm32l4_tim4_priv; modifyreg32(STM32L4_RCC_APB1ENR1, 0, RCC_APB1ENR1_TIM4EN); break; #endif #ifdef CONFIG_STM32L4_TIM5 case 5: - dev = (struct stm32l4_tim_dev_s *)&stm32_tim5_priv; + dev = (struct stm32l4_tim_dev_s *)&stm32l4_tim5_priv; modifyreg32(STM32L4_RCC_APB1ENR1, 0, RCC_APB1ENR1_TIM5EN); break; #endif #ifdef CONFIG_STM32L4_TIM6 case 6: - dev = (struct stm32l4_tim_dev_s *)&stm32_tim6_priv; + dev = (struct stm32l4_tim_dev_s *)&stm32l4_tim6_priv; modifyreg32(STM32L4_RCC_APB1ENR1, 0, RCC_APB1ENR1_TIM6EN); break; #endif #ifdef CONFIG_STM32L4_TIM7 case 7: - dev = (struct stm32l4_tim_dev_s *)&stm32_tim7_priv; + dev = (struct stm32l4_tim_dev_s *)&stm32l4_tim7_priv; modifyreg32(STM32L4_RCC_APB1ENR1, 0, RCC_APB1ENR1_TIM7EN); break; #endif #ifdef CONFIG_STM32L4_TIM8 case 8: - dev = (struct stm32l4_tim_dev_s *)&stm32_tim8_priv; + dev = (struct stm32l4_tim_dev_s *)&stm32l4_tim8_priv; modifyreg32(STM32L4_RCC_APB2ENR, 0, RCC_APB2ENR_TIM8EN); break; #endif #ifdef CONFIG_STM32L4_TIM15 case 15: - dev = (struct stm32l4_tim_dev_s *)&stm32_tim15_priv; + dev = (struct stm32l4_tim_dev_s *)&stm32l4_tim15_priv; modifyreg32(STM32L4_RCC_APB2ENR, 0, RCC_APB2ENR_TIM15EN); break; #endif #ifdef CONFIG_STM32L4_TIM16 case 16: - dev = (struct stm32l4_tim_dev_s *)&stm32_tim16_priv; + dev = (struct stm32l4_tim_dev_s *)&stm32l4_tim16_priv; modifyreg32(STM32L4_RCC_APB2ENR, 0, RCC_APB2ENR_TIM16EN); break; #endif #ifdef CONFIG_STM32L4_TIM17 case 17: - dev = (struct stm32l4_tim_dev_s *)&stm32_tim17_priv; + dev = (struct stm32l4_tim_dev_s *)&stm32l4_tim17_priv; modifyreg32(STM32L4_RCC_APB2ENR, 0, RCC_APB2ENR_TIM17EN); break; #endif @@ -1369,12 +1369,12 @@ FAR struct stm32l4_tim_dev_s *stm32l4_tim_init(int timer) /* Is device already allocated */ - if (((struct stm32_tim_priv_s *)dev)->mode != STM32L4_TIM_MODE_UNUSED) + if (((struct stm32l4_tim_priv_s *)dev)->mode != STM32L4_TIM_MODE_UNUSED) { return NULL; } - stm32_tim_reset(dev); + stm32l4_tim_reset(dev); return dev; } @@ -1392,7 +1392,7 @@ int stm32l4_tim_deinit(FAR struct stm32l4_tim_dev_s * dev) /* Disable power */ - switch (((struct stm32_tim_priv_s *)dev)->base) + switch (((struct stm32l4_tim_priv_s *)dev)->base) { #ifdef CONFIG_STM32L4_TIM1 case STM32L4_TIM1_BASE: @@ -1455,7 +1455,7 @@ int stm32l4_tim_deinit(FAR struct stm32l4_tim_dev_s * dev) /* Mark it as free */ - ((struct stm32_tim_priv_s *)dev)->mode = STM32L4_TIM_MODE_UNUSED; + ((struct stm32l4_tim_priv_s *)dev)->mode = STM32L4_TIM_MODE_UNUSED; return OK; } diff --git a/arch/arm/src/stm32l4/stm32l4_tim_lowerhalf.c b/arch/arm/src/stm32l4/stm32l4_tim_lowerhalf.c index 5a7639cb3a8..7fff996234c 100644 --- a/arch/arm/src/stm32l4/stm32l4_tim_lowerhalf.c +++ b/arch/arm/src/stm32l4/stm32l4_tim_lowerhalf.c @@ -87,7 +87,7 @@ * timer_lowerhalf_s structure. */ -struct stm32_lowerhalf_s +struct stm32l4_lowerhalf_s { FAR const struct timer_ops_s *ops; /* Lower half operations */ FAR struct stm32l4_tim_dev_s *tim; /* stm32 timer driver */ @@ -104,48 +104,48 @@ struct stm32_lowerhalf_s /* Interrupt handling *******************************************************/ #ifdef CONFIG_STM32L4_TIM1 -static int stm32_tim1_interrupt(int irq, FAR void *context); +static int stm32l4_tim1_interrupt(int irq, FAR void *context); #endif #ifdef CONFIG_STM32L4_TIM2 -static int stm32_tim2_interrupt(int irq, FAR void *context); +static int stm32l4_tim2_interrupt(int irq, FAR void *context); #endif #ifdef CONFIG_STM32L4_TIM3 -static int stm32_tim3_interrupt(int irq, FAR void *context); +static int stm32l4_tim3_interrupt(int irq, FAR void *context); #endif #ifdef CONFIG_STM32L4_TIM4 -static int stm32_tim4_interrupt(int irq, FAR void *context); +static int stm32l4_tim4_interrupt(int irq, FAR void *context); #endif #ifdef CONFIG_STM32L4_TIM5 -static int stm32_tim5_interrupt(int irq, FAR void *context); +static int stm32l4_tim5_interrupt(int irq, FAR void *context); #endif #ifdef CONFIG_STM32L4_TIM6 -static int stm32_tim6_interrupt(int irq, FAR void *context); +static int stm32l4_tim6_interrupt(int irq, FAR void *context); #endif #ifdef CONFIG_STM32L4_TIM7 -static int stm32_tim7_interrupt(int irq, FAR void *context); +static int stm32l4_tim7_interrupt(int irq, FAR void *context); #endif #ifdef CONFIG_STM32L4_TIM8 -static int stm32_tim8_interrupt(int irq, FAR void *context); +static int stm32l4_tim8_interrupt(int irq, FAR void *context); #endif #ifdef CONFIG_STM32L4_TIM15 -static int stm32_tim15_interrupt(int irq, FAR void *context); +static int stm32l4_tim15_interrupt(int irq, FAR void *context); #endif #ifdef CONFIG_STM32L4_TIM16 -static int stm32_tim16_interrupt(int irq, FAR void *context); +static int stm32l4_tim16_interrupt(int irq, FAR void *context); #endif #ifdef CONFIG_STM32L4_TIM17 -static int stm32_tim17_interrupt(int irq, FAR void *context); +static int stm32l4_tim17_interrupt(int irq, FAR void *context); #endif -static int stm32_timer_handler(FAR struct stm32_lowerhalf_s *lower); +static int stm32l4_timer_handler(FAR struct stm32l4_lowerhalf_s *lower); /* "Lower half" driver methods **********************************************/ -static int stm32_start(FAR struct timer_lowerhalf_s *lower); -static int stm32_stop(FAR struct timer_lowerhalf_s *lower); -static int stm32_settimeout(FAR struct timer_lowerhalf_s *lower, +static int stm32l4_start(FAR struct timer_lowerhalf_s *lower); +static int stm32l4_stop(FAR struct timer_lowerhalf_s *lower); +static int stm32l4_settimeout(FAR struct timer_lowerhalf_s *lower, uint32_t timeout); -static tccb_t stm32_sethandler(FAR struct timer_lowerhalf_s *lower, +static tccb_t stm32l4_sethandler(FAR struct timer_lowerhalf_s *lower, tccb_t handler); /**************************************************************************** @@ -155,109 +155,109 @@ static tccb_t stm32_sethandler(FAR struct timer_lowerhalf_s *lower, static const struct timer_ops_s g_timer_ops = { - .start = stm32_start, - .stop = stm32_stop, + .start = stm32l4_start, + .stop = stm32l4_stop, .getstatus = NULL, - .settimeout = stm32_settimeout, - .sethandler = stm32_sethandler, + .settimeout = stm32l4_settimeout, + .sethandler = stm32l4_sethandler, .ioctl = NULL, }; #ifdef CONFIG_STM32L4_TIM1 -static struct stm32_lowerhalf_s g_tim1_lowerhalf = +static struct stm32l4_lowerhalf_s g_tim1_lowerhalf = { .ops = &g_timer_ops, - .timhandler = stm32_tim1_interrupt, + .timhandler = stm32l4_tim1_interrupt, .resolution = STM32L4_TIM1_RES, }; #endif #ifdef CONFIG_STM32L4_TIM2 -static struct stm32_lowerhalf_s g_tim2_lowerhalf = +static struct stm32l4_lowerhalf_s g_tim2_lowerhalf = { .ops = &g_timer_ops, - .timhandler = stm32_tim2_interrupt, + .timhandler = stm32l4_tim2_interrupt, .resolution = STM32L4_TIM2_RES, }; #endif #ifdef CONFIG_STM32L4_TIM3 -static struct stm32_lowerhalf_s g_tim3_lowerhalf = +static struct stm32l4_lowerhalf_s g_tim3_lowerhalf = { .ops = &g_timer_ops, - .timhandler = stm32_tim3_interrupt, + .timhandler = stm32l4_tim3_interrupt, .resolution = STM32L4_TIM3_RES, }; #endif #ifdef CONFIG_STM32L4_TIM4 -static struct stm32_lowerhalf_s g_tim4_lowerhalf = +static struct stm32l4_lowerhalf_s g_tim4_lowerhalf = { .ops = &g_timer_ops, - .timhandler = stm32_tim4_interrupt, + .timhandler = stm32l4_tim4_interrupt, .resolution = STM32L4_TIM4_RES, }; #endif #ifdef CONFIG_STM32L4_TIM5 -static struct stm32_lowerhalf_s g_tim5_lowerhalf = +static struct stm32l4_lowerhalf_s g_tim5_lowerhalf = { .ops = &g_timer_ops, - .timhandler = stm32_tim5_interrupt, + .timhandler = stm32l4_tim5_interrupt, .resolution = STM32L4_TIM5_RES, }; #endif #ifdef CONFIG_STM32L4_TIM6 -static struct stm32_lowerhalf_s g_tim6_lowerhalf = +static struct stm32l4_lowerhalf_s g_tim6_lowerhalf = { .ops = &g_timer_ops, - .timhandler = stm32_tim6_interrupt, + .timhandler = stm32l4_tim6_interrupt, .resolution = STM32L4_TIM6_RES, }; #endif #ifdef CONFIG_STM32L4_TIM7 -static struct stm32_lowerhalf_s g_tim7_lowerhalf = +static struct stm32l4_lowerhalf_s g_tim7_lowerhalf = { .ops = &g_timer_ops, - .timhandler = stm32_tim7_interrupt, + .timhandler = stm32l4_tim7_interrupt, .resolution = STM32L4_TIM7_RES, }; #endif #ifdef CONFIG_STM32L4_TIM8 -static struct stm32_lowerhalf_s g_tim8_lowerhalf = +static struct stm32l4_lowerhalf_s g_tim8_lowerhalf = { .ops = &g_timer_ops, - .timhandler = stm32_tim8_interrupt, + .timhandler = stm32l4_tim8_interrupt, .resolution = STM32L4_TIM8_RES, }; #endif #ifdef CONFIG_STM32L4_TIM15 -static struct stm32_lowerhalf_s g_tim15_lowerhalf = +static struct stm32l4_lowerhalf_s g_tim15_lowerhalf = { .ops = &g_timer_ops, - .timhandler = stm32_tim15_interrupt, + .timhandler = stm32l4_tim15_interrupt, .resolution = STM32L4_TIM15_RES, }; #endif #ifdef CONFIG_STM32L4_TIM16 -static struct stm32_lowerhalf_s g_tim16_lowerhalf = +static struct stm32l4_lowerhalf_s g_tim16_lowerhalf = { .ops = &g_timer_ops, - .timhandler = stm32_tim16_interrupt, + .timhandler = stm32l4_tim16_interrupt, .resolution = STM32L4_TIM16_RES, }; #endif #ifdef CONFIG_STM32L4_TIM17 -static struct stm32_lowerhalf_s g_tim17_lowerhalf = +static struct stm32l4_lowerhalf_s g_tim17_lowerhalf = { .ops = &g_timer_ops, - .timhandler = stm32_tim17_interrupt, + .timhandler = stm32l4_tim17_interrupt, .resolution = STM32L4_TIM17_RES, }; #endif @@ -267,7 +267,7 @@ static struct stm32_lowerhalf_s g_tim17_lowerhalf = ****************************************************************************/ /**************************************************************************** - * Name: stm32_timN_interrupt, N=1..14 + * Name: stm32l4_timN_interrupt, N=1..14 * * Description: * Individual interrupt handlers for each timer @@ -275,84 +275,84 @@ static struct stm32_lowerhalf_s g_tim17_lowerhalf = ****************************************************************************/ #ifdef CONFIG_STM32L4_TIM1 -static int stm32_tim1_interrupt(int irq, FAR void *context) +static int stm32l4_tim1_interrupt(int irq, FAR void *context) { - return stm32_timer_handler(&g_tim1_lowerhalf); + return stm32l4_timer_handler(&g_tim1_lowerhalf); } #endif #ifdef CONFIG_STM32L4_TIM2 -static int stm32_tim2_interrupt(int irq, FAR void *context) +static int stm32l4_tim2_interrupt(int irq, FAR void *context) { - return stm32_timer_handler(&g_tim2_lowerhalf); + return stm32l4_timer_handler(&g_tim2_lowerhalf); } #endif #ifdef CONFIG_STM32L4_TIM3 -static int stm32_tim3_interrupt(int irq, FAR void *context) +static int stm32l4_tim3_interrupt(int irq, FAR void *context) { - return stm32_timer_handler(&g_tim3_lowerhalf); + return stm32l4_timer_handler(&g_tim3_lowerhalf); } #endif #ifdef CONFIG_STM32L4_TIM4 -static int stm32_tim4_interrupt(int irq, FAR void *context) +static int stm32l4_tim4_interrupt(int irq, FAR void *context) { - return stm32_timer_handler(&g_tim4_lowerhalf); + return stm32l4_timer_handler(&g_tim4_lowerhalf); } #endif #ifdef CONFIG_STM32L4_TIM5 -static int stm32_tim5_interrupt(int irq, FAR void *context) +static int stm32l4_tim5_interrupt(int irq, FAR void *context) { - return stm32_timer_handler(&g_tim5_lowerhalf); + return stm32l4_timer_handler(&g_tim5_lowerhalf); } #endif #ifdef CONFIG_STM32L4_TIM6 -static int stm32_tim6_interrupt(int irq, FAR void *context) +static int stm32l4_tim6_interrupt(int irq, FAR void *context) { - return stm32_timer_handler(&g_tim6_lowerhalf); + return stm32l4_timer_handler(&g_tim6_lowerhalf); } #endif #ifdef CONFIG_STM32L4_TIM7 -static int stm32_tim7_interrupt(int irq, FAR void *context) +static int stm32l4_tim7_interrupt(int irq, FAR void *context) { - return stm32_timer_handler(&g_tim7_lowerhalf); + return stm32l4_timer_handler(&g_tim7_lowerhalf); } #endif #ifdef CONFIG_STM32L4_TIM8 -static int stm32_tim8_interrupt(int irq, FAR void *context) +static int stm32l4_tim8_interrupt(int irq, FAR void *context) { - return stm32_timer_handler(&g_tim8_lowerhalf); + return stm32l4_timer_handler(&g_tim8_lowerhalf); } #endif #ifdef CONFIG_STM32L4_TIM15 -static int stm32_tim15_interrupt(int irq, FAR void *context) +static int stm32l4_tim15_interrupt(int irq, FAR void *context) { - return stm32_timer_handler(&g_tim15_lowerhalf); + return stm32l4_timer_handler(&g_tim15_lowerhalf); } #endif #ifdef CONFIG_STM32L4_TIM16 -static int stm32_tim16_interrupt(int irq, FAR void *context) +static int stm32l4_tim16_interrupt(int irq, FAR void *context) { - return stm32_timer_handler(&g_tim16_lowerhalf); + return stm32l4_timer_handler(&g_tim16_lowerhalf); } #endif #ifdef CONFIG_STM32L4_TIM17 -static int stm32_tim17_interrupt(int irq, FAR void *context) +static int stm32l4_tim17_interrupt(int irq, FAR void *context) { - return stm32_timer_handler(&g_tim17_lowerhalf); + return stm32l4_timer_handler(&g_tim17_lowerhalf); } #endif /**************************************************************************** - * Name: stm32_timer_handler + * Name: stm32l4_timer_handler * * Description: * timer interrupt handler @@ -363,7 +363,7 @@ static int stm32_tim17_interrupt(int irq, FAR void *context) * ****************************************************************************/ -static int stm32_timer_handler(FAR struct stm32_lowerhalf_s *lower) +static int stm32l4_timer_handler(FAR struct stm32l4_lowerhalf_s *lower) { uint32_t next_interval_us = 0; @@ -378,14 +378,14 @@ static int stm32_timer_handler(FAR struct stm32_lowerhalf_s *lower) } else { - stm32_stop((struct timer_lowerhalf_s *)lower); + stm32l4_stop((struct timer_lowerhalf_s *)lower); } return OK; } /**************************************************************************** - * Name: stm32_start + * Name: stm32l4_start * * Description: * Start the timer, resetting the time to the current timeout, @@ -399,9 +399,9 @@ static int stm32_timer_handler(FAR struct stm32_lowerhalf_s *lower) * ****************************************************************************/ -static int stm32_start(FAR struct timer_lowerhalf_s *lower) +static int stm32l4_start(FAR struct timer_lowerhalf_s *lower) { - FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower; + FAR struct stm32l4_lowerhalf_s *priv = (FAR struct stm32l4_lowerhalf_s *)lower; if (!priv->started) { @@ -423,7 +423,7 @@ static int stm32_start(FAR struct timer_lowerhalf_s *lower) } /**************************************************************************** - * Name: stm32_stop + * Name: stm32l4_stop * * Description: * Stop the timer @@ -437,9 +437,9 @@ static int stm32_start(FAR struct timer_lowerhalf_s *lower) * ****************************************************************************/ -static int stm32_stop(struct timer_lowerhalf_s *lower) +static int stm32l4_stop(struct timer_lowerhalf_s *lower) { - struct stm32_lowerhalf_s *priv = (struct stm32_lowerhalf_s *)lower; + struct stm32l4_lowerhalf_s *priv = (struct stm32l4_lowerhalf_s *)lower; if (priv->started) { @@ -456,7 +456,7 @@ static int stm32_stop(struct timer_lowerhalf_s *lower) } /**************************************************************************** - * Name: stm32_settimeout + * Name: stm32l4_settimeout * * Description: * Set a new timeout value (and reset the timer) @@ -471,9 +471,9 @@ static int stm32_stop(struct timer_lowerhalf_s *lower) * ****************************************************************************/ -static int stm32_settimeout(FAR struct timer_lowerhalf_s *lower, uint32_t timeout) +static int stm32l4_settimeout(FAR struct timer_lowerhalf_s *lower, uint32_t timeout) { - FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower; + FAR struct stm32l4_lowerhalf_s *priv = (FAR struct stm32l4_lowerhalf_s *)lower; uint64_t maxtimeout; if (priv->started) @@ -498,7 +498,7 @@ static int stm32_settimeout(FAR struct timer_lowerhalf_s *lower, uint32_t timeou } /**************************************************************************** - * Name: stm32_sethandler + * Name: stm32l4_sethandler * * Description: * Call this user provided timeout handler. @@ -516,10 +516,10 @@ static int stm32_settimeout(FAR struct timer_lowerhalf_s *lower, uint32_t timeou * ****************************************************************************/ -static tccb_t stm32_sethandler(FAR struct timer_lowerhalf_s *lower, +static tccb_t stm32l4_sethandler(FAR struct timer_lowerhalf_s *lower, tccb_t newhandler) { - FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower; + FAR struct stm32l4_lowerhalf_s *priv = (FAR struct stm32l4_lowerhalf_s *)lower; irqstate_t flags = enter_critical_section(); @@ -570,7 +570,7 @@ static tccb_t stm32_sethandler(FAR struct timer_lowerhalf_s *lower, int stm32l4_timer_initialize(FAR const char *devpath, int timer) { - FAR struct stm32_lowerhalf_s *lower; + FAR struct stm32l4_lowerhalf_s *lower; switch (timer) { From d347d7ce7e89d8950198efbda4ca14aff0ae7be4 Mon Sep 17 00:00:00 2001 From: Sebastien Lorquet Date: Mon, 11 Jul 2016 19:06:14 +0200 Subject: [PATCH 05/31] renames in oneshoot --- arch/arm/src/stm32l4/stm32l4_oneshot.c | 12 ++++++------ arch/arm/src/stm32l4/stm32l4_oneshot.h | 6 +++--- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm/src/stm32l4/stm32l4_oneshot.c b/arch/arm/src/stm32l4/stm32l4_oneshot.c index 3abb44e862c..221f023155d 100644 --- a/arch/arm/src/stm32l4/stm32l4_oneshot.c +++ b/arch/arm/src/stm32l4/stm32l4_oneshot.c @@ -65,7 +65,7 @@ static struct stm32l4_oneshot_s *g_oneshot; ****************************************************************************/ /**************************************************************************** - * Name: stm32_oneshot_handler + * Name: stm32l4_oneshot_handler * * Description: * Timer interrupt callback. When the oneshot timer interrupt expires, @@ -83,7 +83,7 @@ static struct stm32l4_oneshot_s *g_oneshot; * ****************************************************************************/ -static int stm32_oneshot_handler(int irq, void *context) +static int stm32l4_oneshot_handler(int irq, void *context) { struct stm32l4_oneshot_s *oneshot = g_oneshot; oneshot_handler_t oneshot_handler; @@ -174,7 +174,7 @@ int stm32l4_oneshot_initialize(struct stm32l4_oneshot_s *oneshot, int chan, } /**************************************************************************** - * Name: stm32_oneshot_max_delay + * Name: stm32l4_oneshot_max_delay * * Description: * Determine the maximum delay of the one-shot timer (in microseconds) @@ -199,7 +199,7 @@ int stm32l4_oneshot_max_delay(struct stm32l4_oneshot_s *oneshot, uint64_t *usec) * Input Parameters: * oneshot Caller allocated instance of the oneshot state structure. This * structure must have been previously initialized via a call to - * stm32_oneshot_initialize(); + * stm32l4_oneshot_initialize(); * handler The function to call when when the oneshot timer expires. * arg An opaque argument that will accompany the callback. * ts Provides the duration of the one shot timer. @@ -259,7 +259,7 @@ int stm32l4_oneshot_start(struct stm32l4_oneshot_s *oneshot, /* Set up to receive the callback when the interrupt occurs */ - STM32L4_TIM_SETISR(oneshot->tch, stm32_oneshot_handler, 0); + STM32L4_TIM_SETISR(oneshot->tch, stm32l4_oneshot_handler, 0); /* Set timer period */ @@ -294,7 +294,7 @@ int stm32l4_oneshot_start(struct stm32l4_oneshot_s *oneshot, * Input Parameters: * oneshot Caller allocated instance of the oneshot state structure. This * structure must have been previously initialized via a call to - * stm32_oneshot_initialize(); + * stm32l4_oneshot_initialize(); * ts The location in which to return the time remaining on the * oneshot timer. A time of zero is returned if the timer is * not running. ts may be zero in which case the time remaining diff --git a/arch/arm/src/stm32l4/stm32l4_oneshot.h b/arch/arm/src/stm32l4/stm32l4_oneshot.h index 61117063217..743652bf49b 100644 --- a/arch/arm/src/stm32l4/stm32l4_oneshot.h +++ b/arch/arm/src/stm32l4/stm32l4_oneshot.h @@ -63,7 +63,7 @@ typedef void (*oneshot_handler_t)(void *arg); /* The oneshot client must allocate an instance of this structure and called - * stm32_oneshot_initialize() before using the oneshot facilities. The client + * stm32l4_oneshot_initialize() before using the oneshot facilities. The client * should not access the contents of this structure directly since the * contents are subject to change. */ @@ -139,7 +139,7 @@ int stm32l4_oneshot_max_delay(struct stm32l4_oneshot_s *oneshot, uint64_t *usec) * Input Parameters: * oneshot Caller allocated instance of the oneshot state structure. This * structure must have been previously initialized via a call to - * stm32_oneshot_initialize(); + * stm32l4_oneshot_initialize(); * handler The function to call when when the oneshot timer expires. * arg An opaque argument that will accompany the callback. * ts Provides the duration of the one shot timer. @@ -166,7 +166,7 @@ int stm32l4_oneshot_start(struct stm32l4_oneshot_s *oneshot, * Input Parameters: * oneshot Caller allocated instance of the oneshot state structure. This * structure must have been previously initialized via a call to - * stm32_oneshot_initialize(); + * stm32l4_oneshot_initialize(); * ts The location in which to return the time remaining on the * oneshot timer. A time of zero is returned if the timer is * not running. From 5185a838ed9325a7665e50ff41f4d9294f3d0ac5 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Mon, 11 Jul 2016 11:12:08 -0600 Subject: [PATCH 06/31] Fix a broken file inclusion --- configs/teensy-3.x/src/k20_usbdev.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/teensy-3.x/src/k20_usbdev.c b/configs/teensy-3.x/src/k20_usbdev.c index 5b593378896..2cf0d9d2e00 100644 --- a/configs/teensy-3.x/src/k20_usbdev.c +++ b/configs/teensy-3.x/src/k20_usbdev.c @@ -50,7 +50,7 @@ #include "up_arch.h" #include "kinetis.h" #include "kinetis_usbotg.h" -#include "kinetis_sim.h" +#include "chip/kinetis_sim.h" #include "teensy-3x.h" /************************************************************************************ From ce09af0da7e55241eace63303dbe346e605219db Mon Sep 17 00:00:00 2001 From: Sebastien Lorquet Date: Mon, 11 Jul 2016 19:13:06 +0200 Subject: [PATCH 07/31] Rename STM32L4 PWM routines. this WILL BREAK configs --- arch/arm/src/stm32l4/stm32l4_pwm.c | 387 +++++++++++++++-------------- 1 file changed, 195 insertions(+), 192 deletions(-) diff --git a/arch/arm/src/stm32l4/stm32l4_pwm.c b/arch/arm/src/stm32l4/stm32l4_pwm.c index b679da395ca..b5cd35fb29d 100644 --- a/arch/arm/src/stm32l4/stm32l4_pwm.c +++ b/arch/arm/src/stm32l4/stm32l4_pwm.c @@ -95,7 +95,7 @@ /* Debug ********************************************************************/ #ifdef CONFIG_DEBUG_PWM_INFO -# define pwm_dumpgpio(p,m) stm32_dumpgpio(p,m) +# define pwm_dumpgpio(p,m) stm32l4_dumpgpio(p,m) #else # define pwm_dumpgpio(p,m) #endif @@ -104,41 +104,41 @@ * Private Types ****************************************************************************/ -enum stm32_timmode_e +enum stm32l4_timmode_e { - STM32_TIMMODE_COUNTUP = 0, - STM32_TIMMODE_COUNTDOWN = 1, - STM32_TIMMODE_CENTER1 = 2, - STM32_TIMMODE_CENTER2 = 3, - STM32_TIMMODE_CENTER3 = 4, + STM32L4_TIMMODE_COUNTUP = 0, + STM32L4_TIMMODE_COUNTDOWN = 1, + STM32L4_TIMMODE_CENTER1 = 2, + STM32L4_TIMMODE_CENTER2 = 3, + STM32L4_TIMMODE_CENTER3 = 4, }; -enum stm32_chanmode_e +enum stm32l4_chanmode_e { - STM32_CHANMODE_PWM1 = 0, - STM32_CHANMODE_PWM2 = 1, - STM32_CHANMODE_COMBINED1 = 2, - STM32_CHANMODE_COMBINED2 = 3, - STM32_CHANMODE_ASYMMETRIC1 = 4, - STM32_CHANMODE_ASYMMETRIC2 = 5, + STM32L4_CHANMODE_PWM1 = 0, + STM32L4_CHANMODE_PWM2 = 1, + STM32L4_CHANMODE_COMBINED1 = 2, + STM32L4_CHANMODE_COMBINED2 = 3, + STM32L4_CHANMODE_ASYMMETRIC1 = 4, + STM32L4_CHANMODE_ASYMMETRIC2 = 5, }; -struct stm32_pwmchan_s +struct stm32l4_pwmchan_s { uint8_t channel; /* Timer output channel: {1,..4} */ uint32_t pincfg; /* Output pin configuration */ - enum stm32_chanmode_e mode; + enum stm32l4_chanmode_e mode; }; /* This structure represents the state of one PWM timer */ -struct stm32_pwmtimer_s +struct stm32l4_pwmtimer_s { FAR const struct pwm_ops_s *ops; /* PWM operations */ uint8_t timid; /* Timer ID {1,...,17} */ - struct stm32_pwmchan_s channels[PWM_NCHANNELS]; + struct stm32l4_pwmchan_s channels[PWM_NCHANNELS]; uint8_t timtype; /* See the TIMTYPE_* definitions */ - enum stm32_timmode_e mode; + enum stm32l4_timmode_e mode; #ifdef CONFIG_PWM_PULSECOUNT uint8_t irq; /* Timer update IRQ */ uint8_t prev; /* The previous value of the RCR (pre-loaded) */ @@ -160,48 +160,48 @@ struct stm32_pwmtimer_s ****************************************************************************/ /* Register access */ -static uint16_t pwm_getreg(struct stm32_pwmtimer_s *priv, int offset); -static void pwm_putreg(struct stm32_pwmtimer_s *priv, int offset, uint16_t value); +static uint16_t stm32l4pwm_getreg(struct stm32l4_pwmtimer_s *priv, int offset); +static void stm32l4pwm_putreg(struct stm32l4_pwmtimer_s *priv, int offset, uint16_t value); #ifdef CONFIG_DEBUG_PWM_INFO -static void pwm_dumpregs(struct stm32_pwmtimer_s *priv, FAR const char *msg); +static void stm32l4pwm_dumpregs(struct stm32l4_pwmtimer_s *priv, FAR const char *msg); #else -# define pwm_dumpregs(priv,msg) +# define stm32l4pwm_dumpregs(priv,msg) #endif /* Timer management */ -static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, - FAR const struct pwm_info_s *info); +static int stm32l4pwm_timer(FAR struct stm32l4_pwmtimer_s *priv, + FAR const struct pwm_info_s *info); #if defined(CONFIG_PWM_PULSECOUNT) && (defined(CONFIG_STM32L4_TIM1_PWM) || defined(CONFIG_STM32L4_TIM8_PWM)) -static int pwm_interrupt(struct stm32_pwmtimer_s *priv); +static int stm32l4pwm_interrupt(struct stm32l4_pwmtimer_s *priv); #if defined(CONFIG_STM32L4_TIM1_PWM) -static int pwm_tim1interrupt(int irq, void *context); +static int stm32l4pwm_tim1interrupt(int irq, void *context); #endif #if defined(CONFIG_STM32L4_TIM8_PWM) -static int pwm_tim8interrupt(int irq, void *context); +static int stm32l4pwm_tim8interrupt(int irq, void *context); #endif -static uint8_t pwm_pulsecount(uint32_t count); +static uint8_t stm32l4pwm_pulsecount(uint32_t count); #endif /* PWM driver methods */ -static int pwm_setup(FAR struct pwm_lowerhalf_s *dev); -static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev); +static int stm32l4pwm_setup(FAR struct pwm_lowerhalf_s *dev); +static int stm32l4pwm_shutdown(FAR struct pwm_lowerhalf_s *dev); #ifdef CONFIG_PWM_PULSECOUNT -static int pwm_start(FAR struct pwm_lowerhalf_s *dev, - FAR const struct pwm_info_s *info, - FAR void *handle); +static int stm32l4pwm_start(FAR struct pwm_lowerhalf_s *dev, + FAR const struct pwm_info_s *info, + FAR void *handle); #else -static int pwm_start(FAR struct pwm_lowerhalf_s *dev, - FAR const struct pwm_info_s *info); +static int stm32l4pwm_start(FAR struct pwm_lowerhalf_s *dev, + FAR const struct pwm_info_s *info); #endif -static int pwm_stop(FAR struct pwm_lowerhalf_s *dev); -static int pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, - int cmd, unsigned long arg); +static int stm32l4pwm_stop(FAR struct pwm_lowerhalf_s *dev); +static int stm32l4pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, + int cmd, unsigned long arg); /**************************************************************************** * Private Data @@ -210,15 +210,15 @@ static int pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, static const struct pwm_ops_s g_pwmops = { - .setup = pwm_setup, - .shutdown = pwm_shutdown, - .start = pwm_start, - .stop = pwm_stop, - .ioctl = pwm_ioctl, + .setup = stm32l4pwm_setup, + .shutdown = stm32l4pwm_shutdown, + .start = stm32l4pwm_start, + .stop = stm32l4pwm_stop, + .ioctl = stm32l4pwm_ioctl, }; #ifdef CONFIG_STM32L4_TIM1_PWM -static struct stm32_pwmtimer_s g_pwm1dev = +static struct stm32l4_pwmtimer_s g_pwm1dev = { .ops = &g_pwmops, .timid = 1, @@ -264,7 +264,7 @@ static struct stm32_pwmtimer_s g_pwm1dev = #endif #ifdef CONFIG_STM32L4_TIM2_PWM -static struct stm32_pwmtimer_s g_pwm2dev = +static struct stm32l4_pwmtimer_s g_pwm2dev = { .ops = &g_pwmops, .timid = 2, @@ -310,7 +310,7 @@ static struct stm32_pwmtimer_s g_pwm2dev = #endif #ifdef CONFIG_STM32L4_TIM3_PWM -static struct stm32_pwmtimer_s g_pwm3dev = +static struct stm32l4_pwmtimer_s g_pwm3dev = { .ops = &g_pwmops, .timid = 3, @@ -356,7 +356,7 @@ static struct stm32_pwmtimer_s g_pwm3dev = #endif #ifdef CONFIG_STM32L4_TIM4_PWM -static struct stm32_pwmtimer_s g_pwm4dev = +static struct stm32l4_pwmtimer_s g_pwm4dev = { .ops = &g_pwmops, .timid = 4, @@ -402,7 +402,7 @@ static struct stm32_pwmtimer_s g_pwm4dev = #endif #ifdef CONFIG_STM32L4_TIM5_PWM -static struct stm32_pwmtimer_s g_pwm5dev = +static struct stm32l4_pwmtimer_s g_pwm5dev = { .ops = &g_pwmops, .timid = 5, @@ -448,7 +448,7 @@ static struct stm32_pwmtimer_s g_pwm5dev = #endif #ifdef CONFIG_STM32L4_TIM8_PWM -static struct stm32_pwmtimer_s g_pwm8dev = +static struct stm32l4_pwmtimer_s g_pwm8dev = { .ops = &g_pwmops, .timid = 8, @@ -494,7 +494,7 @@ static struct stm32_pwmtimer_s g_pwm8dev = #endif #ifdef CONFIG_STM32L4_TIM15_PWM -static struct stm32_pwmtimer_s g_pwm15dev = +static struct stm32l4_pwmtimer_s g_pwm15dev = { .ops = &g_pwmops, .timid = 15, @@ -526,7 +526,7 @@ static struct stm32_pwmtimer_s g_pwm15dev = #endif #ifdef CONFIG_STM32L4_TIM16_PWM -static struct stm32_pwmtimer_s g_pwm16dev = +static struct stm32l4_pwmtimer_s g_pwm16dev = { .ops = &g_pwmops, .timid = 16, @@ -551,7 +551,7 @@ static struct stm32_pwmtimer_s g_pwm16dev = #endif #ifdef CONFIG_STM32L4_TIM17_PWM -static struct stm32_pwmtimer_s g_pwm17dev = +static struct stm32l4_pwmtimer_s g_pwm17dev = { .ops = &g_pwmops, .timid = 17, @@ -580,7 +580,7 @@ static struct stm32_pwmtimer_s g_pwm17dev = ****************************************************************************/ /**************************************************************************** - * Name: pwm_getreg + * Name: stm32l4pwm_getreg * * Description: * Read the value of an PWM timer register. @@ -594,13 +594,13 @@ static struct stm32_pwmtimer_s g_pwm17dev = * ****************************************************************************/ -static uint16_t pwm_getreg(struct stm32_pwmtimer_s *priv, int offset) +static uint16_t stm32l4pwm_getreg(struct stm32l4_pwmtimer_s *priv, int offset) { return getreg16(priv->base + offset); } /**************************************************************************** - * Name: pwm_putreg + * Name: stm32l4pwm_putreg * * Description: * Read the value of an PWM timer register. @@ -614,7 +614,8 @@ static uint16_t pwm_getreg(struct stm32_pwmtimer_s *priv, int offset) * ****************************************************************************/ -static void pwm_putreg(struct stm32_pwmtimer_s *priv, int offset, uint16_t value) +static void stm32l4pwm_putreg(struct stm32l4_pwmtimer_s *priv, int offset, + uint16_t value) { if (priv->timtype == TIMTYPE_GENERAL32 && (offset == STM32L4_GTIM_CNT_OFFSET || @@ -639,7 +640,7 @@ static void pwm_putreg(struct stm32_pwmtimer_s *priv, int offset, uint16_t value } /**************************************************************************** - * Name: pwm_dumpregs + * Name: stm32l4pwm_dumpregs * * Description: * Dump all timer registers. @@ -653,50 +654,51 @@ static void pwm_putreg(struct stm32_pwmtimer_s *priv, int offset, uint16_t value ****************************************************************************/ #ifdef CONFIG_DEBUG_PWM_INFO -static void pwm_dumpregs(struct stm32_pwmtimer_s *priv, FAR const char *msg) +static void stm32l4pwm_dumpregs(struct stm32l4_pwmtimer_s *priv, + FAR const char *msg) { pwminfo("%s:\n", msg); pwminfo(" CR1: %04x CR2: %04x SMCR: %04x DIER: %04x\n", - pwm_getreg(priv, STM32L4_GTIM_CR1_OFFSET), - pwm_getreg(priv, STM32L4_GTIM_CR2_OFFSET), - pwm_getreg(priv, STM32L4_GTIM_SMCR_OFFSET), - pwm_getreg(priv, STM32L4_GTIM_DIER_OFFSET)); + stm32l4pwm_getreg(priv, STM32L4_GTIM_CR1_OFFSET), + stm32l4pwm_getreg(priv, STM32L4_GTIM_CR2_OFFSET), + stm32l4pwm_getreg(priv, STM32L4_GTIM_SMCR_OFFSET), + stm32l4pwm_getreg(priv, STM32L4_GTIM_DIER_OFFSET)); pwminfo(" SR: %04x EGR: %04x CCMR1: %04x CCMR2: %04x\n", - pwm_getreg(priv, STM32L4_GTIM_SR_OFFSET), - pwm_getreg(priv, STM32L4_GTIM_EGR_OFFSET), - pwm_getreg(priv, STM32L4_GTIM_CCMR1_OFFSET), - pwm_getreg(priv, STM32L4_GTIM_CCMR2_OFFSET)); + stm32l4pwm_getreg(priv, STM32L4_GTIM_SR_OFFSET), + stm32l4pwm_getreg(priv, STM32L4_GTIM_EGR_OFFSET), + stm32l4pwm_getreg(priv, STM32L4_GTIM_CCMR1_OFFSET), + stm32l4pwm_getreg(priv, STM32L4_GTIM_CCMR2_OFFSET)); pwminfo(" CCER: %04x CNT: %04x PSC: %04x ARR: %04x\n", - pwm_getreg(priv, STM32L4_GTIM_CCER_OFFSET), - pwm_getreg(priv, STM32L4_GTIM_CNT_OFFSET), - pwm_getreg(priv, STM32L4_GTIM_PSC_OFFSET), - pwm_getreg(priv, STM32L4_GTIM_ARR_OFFSET)); + stm32l4pwm_getreg(priv, STM32L4_GTIM_CCER_OFFSET), + stm32l4pwm_getreg(priv, STM32L4_GTIM_CNT_OFFSET), + stm32l4pwm_getreg(priv, STM32L4_GTIM_PSC_OFFSET), + stm32l4pwm_getreg(priv, STM32L4_GTIM_ARR_OFFSET)); pwminfo(" CCR1: %04x CCR2: %04x CCR3: %04x CCR4: %04x\n", - pwm_getreg(priv, STM32L4_GTIM_CCR1_OFFSET), - pwm_getreg(priv, STM32L4_GTIM_CCR2_OFFSET), - pwm_getreg(priv, STM32L4_GTIM_CCR3_OFFSET), - pwm_getreg(priv, STM32L4_GTIM_CCR4_OFFSET)); + stm32l4pwm_getreg(priv, STM32L4_GTIM_CCR1_OFFSET), + stm32l4pwm_getreg(priv, STM32L4_GTIM_CCR2_OFFSET), + stm32l4pwm_getreg(priv, STM32L4_GTIM_CCR3_OFFSET), + stm32l4pwm_getreg(priv, STM32L4_GTIM_CCR4_OFFSET)); #if defined(CONFIG_STM32L4_TIM1_PWM) || defined(CONFIG_STM32L4_TIM8_PWM) if (priv->timtype == TIMTYPE_ADVANCED) { pwminfo(" RCR: %04x BDTR: %04x DCR: %04x DMAR: %04x\n", - pwm_getreg(priv, STM32L4_ATIM_RCR_OFFSET), - pwm_getreg(priv, STM32L4_ATIM_BDTR_OFFSET), - pwm_getreg(priv, STM32L4_ATIM_DCR_OFFSET), - pwm_getreg(priv, STM32L4_ATIM_DMAR_OFFSET)); + stm32l4pwm_getreg(priv, STM32L4_ATIM_RCR_OFFSET), + stm32l4pwm_getreg(priv, STM32L4_ATIM_BDTR_OFFSET), + stm32l4pwm_getreg(priv, STM32L4_ATIM_DCR_OFFSET), + stm32l4pwm_getreg(priv, STM32L4_ATIM_DMAR_OFFSET)); } else #endif { pwminfo(" DCR: %04x DMAR: %04x\n", - pwm_getreg(priv, STM32L4_GTIM_DCR_OFFSET), - pwm_getreg(priv, STM32L4_GTIM_DMAR_OFFSET)); + stm32l4pwm_getreg(priv, STM32L4_GTIM_DCR_OFFSET), + stm32l4pwm_getreg(priv, STM32L4_GTIM_DMAR_OFFSET)); } } #endif /**************************************************************************** - * Name: pwm_timer + * Name: stm32l4pwm_timer * * Description: * (Re-)initialize the timer resources and start the pulsed output @@ -710,8 +712,8 @@ static void pwm_dumpregs(struct stm32_pwmtimer_s *priv, FAR const char *msg) * ****************************************************************************/ -static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, - FAR const struct pwm_info_s *info) +static int stm32l4pwm_timer(FAR struct stm32l4_pwmtimer_s *priv, + FAR const struct pwm_info_s *info) { #ifdef CONFIG_PWM_MULTICHAN int i; @@ -760,8 +762,8 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, /* Disable all interrupts and DMA requests, clear all pending status */ #ifdef CONFIG_PWM_PULSECOUNT - pwm_putreg(priv, STM32L4_GTIM_DIER_OFFSET, 0); - pwm_putreg(priv, STM32L4_GTIM_SR_OFFSET, 0); + stm32l4pwm_putreg(priv, STM32L4_GTIM_DIER_OFFSET, 0); + stm32l4pwm_putreg(priv, STM32L4_GTIM_SR_OFFSET, 0); #endif /* Calculate optimal values for the timer prescaler and for the timer reload @@ -831,7 +833,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, * 15-17 CKD[1:0] ARPE OPM URS UDIS CEN */ - cr1 = pwm_getreg(priv, STM32L4_GTIM_CR1_OFFSET); + cr1 = stm32l4pwm_getreg(priv, STM32L4_GTIM_CR1_OFFSET); /* Disable the timer until we get it configured */ @@ -861,23 +863,23 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, switch (priv->mode) { - case STM32_TIMMODE_COUNTUP: + case STM32L4_TIMMODE_COUNTUP: cr1 |= GTIM_CR1_EDGE; break; - case STM32_TIMMODE_COUNTDOWN: + case STM32L4_TIMMODE_COUNTDOWN: cr1 |= GTIM_CR1_EDGE | GTIM_CR1_DIR; break; - case STM32_TIMMODE_CENTER1: + case STM32L4_TIMMODE_CENTER1: cr1 |= GTIM_CR1_CENTER1; break; - case STM32_TIMMODE_CENTER2: + case STM32L4_TIMMODE_CENTER2: cr1 |= GTIM_CR1_CENTER2; break; - case STM32_TIMMODE_CENTER3: + case STM32L4_TIMMODE_CENTER3: cr1 |= GTIM_CR1_CENTER3; break; @@ -893,12 +895,12 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, */ cr1 &= ~GTIM_CR1_CKD_MASK; - pwm_putreg(priv, STM32L4_GTIM_CR1_OFFSET, cr1); + stm32l4pwm_putreg(priv, STM32L4_GTIM_CR1_OFFSET, cr1); /* Set the reload and prescaler values */ - pwm_putreg(priv, STM32L4_GTIM_ARR_OFFSET, (uint16_t)reload); - pwm_putreg(priv, STM32L4_GTIM_PSC_OFFSET, (uint16_t)(prescaler - 1)); + stm32l4pwm_putreg(priv, STM32L4_GTIM_ARR_OFFSET, (uint16_t)reload); + stm32l4pwm_putreg(priv, STM32L4_GTIM_PSC_OFFSET, (uint16_t)(prescaler - 1)); /* Set the advanced timer's repetition counter */ @@ -906,7 +908,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, if (priv->timtype == TIMTYPE_ADVANCED) { /* If a non-zero repetition count has been selected, then set the - * repitition counter to the count-1 (pwm_start() has already + * repitition counter to the count-1 (stm32l4pwm_start() has already * assured us that the count value is within range). */ @@ -922,22 +924,22 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, * value. */ - priv->prev = pwm_pulsecount(info->count); - pwm_putreg(priv, STM32L4_ATIM_RCR_OFFSET, (uint16_t)priv->prev - 1); + priv->prev = stm32l4pwm_pulsecount(info->count); + stm32l4pwm_putreg(priv, STM32L4_ATIM_RCR_OFFSET, (uint16_t)priv->prev - 1); /* Generate an update event to reload the prescaler. This should * preload the RCR into active repetition counter. */ - pwm_putreg(priv, STM32L4_GTIM_EGR_OFFSET, ATIM_EGR_UG); + stm32l4pwm_putreg(priv, STM32L4_GTIM_EGR_OFFSET, ATIM_EGR_UG); /* Now set the value of the RCR that will be loaded on the next * update event. */ priv->count = info->count; - priv->curr = pwm_pulsecount(info->count - priv->prev); - pwm_putreg(priv, STM32L4_ATIM_RCR_OFFSET, (uint16_t)priv->curr - 1); + priv->curr = stm32l4pwm_pulsecount(info->count - priv->prev); + stm32l4pwm_putreg(priv, STM32L4_ATIM_RCR_OFFSET, (uint16_t)priv->curr - 1); } /* Otherwise, just clear the repetition counter */ @@ -947,11 +949,11 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, { /* Set the repetition counter to zero */ - pwm_putreg(priv, STM32L4_ATIM_RCR_OFFSET, 0); + stm32l4pwm_putreg(priv, STM32L4_ATIM_RCR_OFFSET, 0); /* Generate an update event to reload the prescaler */ - pwm_putreg(priv, STM32L4_GTIM_EGR_OFFSET, ATIM_EGR_UG); + stm32l4pwm_putreg(priv, STM32L4_GTIM_EGR_OFFSET, ATIM_EGR_UG); } } else @@ -959,7 +961,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, { /* Generate an update event to reload the prescaler (all timers) */ - pwm_putreg(priv, STM32L4_GTIM_EGR_OFFSET, ATIM_EGR_UG); + stm32l4pwm_putreg(priv, STM32L4_GTIM_EGR_OFFSET, ATIM_EGR_UG); } /* Handle channel specific setup */ @@ -979,7 +981,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, #ifdef CONFIG_PWM_MULTICHAN int j; #endif - enum stm32_chanmode_e mode; + enum stm32l4_chanmode_e mode; #ifdef CONFIG_PWM_MULTICHAN duty = info->channels[i].duty; @@ -1025,30 +1027,30 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, switch (mode) { - case STM32_CHANMODE_PWM1: + case STM32L4_CHANMODE_PWM1: chanmode = ATIM_CCMR_MODE_PWM1; break; - case STM32_CHANMODE_PWM2: + case STM32L4_CHANMODE_PWM2: chanmode = ATIM_CCMR_MODE_PWM2; break; - case STM32_CHANMODE_COMBINED1: + case STM32L4_CHANMODE_COMBINED1: chanmode = ATIM_CCMR_MODE_COMBINED1; ocmbit = true; break; - case STM32_CHANMODE_COMBINED2: + case STM32L4_CHANMODE_COMBINED2: chanmode = ATIM_CCMR_MODE_COMBINED2; ocmbit = true; break; - case STM32_CHANMODE_ASYMMETRIC1: + case STM32L4_CHANMODE_ASYMMETRIC1: chanmode = ATIM_CCMR_MODE_ASYMMETRIC1; ocmbit = true; break; - case STM32_CHANMODE_ASYMMETRIC2: + case STM32L4_CHANMODE_ASYMMETRIC2: chanmode = ATIM_CCMR_MODE_ASYMMETRIC2; ocmbit = true; break; @@ -1079,7 +1081,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, /* Set the duty cycle by writing to the CCR register for this channel */ - pwm_putreg(priv, STM32L4_GTIM_CCR1_OFFSET, (uint16_t)ccr); + stm32l4pwm_putreg(priv, STM32L4_GTIM_CCR1_OFFSET, (uint16_t)ccr); } break; @@ -1102,7 +1104,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, /* Set the duty cycle by writing to the CCR register for this channel */ - pwm_putreg(priv, STM32L4_GTIM_CCR2_OFFSET, (uint16_t)ccr); + stm32l4pwm_putreg(priv, STM32L4_GTIM_CCR2_OFFSET, (uint16_t)ccr); } break; @@ -1125,7 +1127,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, /* Set the duty cycle by writing to the CCR register for this channel */ - pwm_putreg(priv, STM32L4_GTIM_CCR3_OFFSET, (uint16_t)ccr); + stm32l4pwm_putreg(priv, STM32L4_GTIM_CCR3_OFFSET, (uint16_t)ccr); } break; @@ -1148,7 +1150,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, /* Set the duty cycle by writing to the CCR register for this channel */ - pwm_putreg(priv, STM32L4_GTIM_CCR4_OFFSET, (uint16_t)ccr); + stm32l4pwm_putreg(priv, STM32L4_GTIM_CCR4_OFFSET, (uint16_t)ccr); } break; @@ -1160,15 +1162,15 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, /* Disable the Channel by resetting the CCxE Bit in the CCER register */ - ccer = pwm_getreg(priv, STM32L4_GTIM_CCER_OFFSET); + ccer = stm32l4pwm_getreg(priv, STM32L4_GTIM_CCER_OFFSET); ccer &= ~ccenable; - pwm_putreg(priv, STM32L4_GTIM_CCER_OFFSET, ccer); + stm32l4pwm_putreg(priv, STM32L4_GTIM_CCER_OFFSET, ccer); /* Fetch the CR2, CCMR1, and CCMR2 register (already have cr1 and ccer) */ - cr2 = pwm_getreg(priv, STM32L4_GTIM_CR2_OFFSET); - ccmr1 = pwm_getreg(priv, STM32L4_GTIM_CCMR1_OFFSET); - ccmr2 = pwm_getreg(priv, STM32L4_GTIM_CCMR2_OFFSET); + cr2 = stm32l4pwm_getreg(priv, STM32L4_GTIM_CR2_OFFSET); + ccmr1 = stm32l4pwm_getreg(priv, STM32L4_GTIM_CCMR1_OFFSET); + ccmr2 = stm32l4pwm_getreg(priv, STM32L4_GTIM_CCMR2_OFFSET); /* Reset the Output Compare Mode Bits and set the select output compare mode */ @@ -1215,10 +1217,10 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, * bits in the BDTR register. */ - bdtr = pwm_getreg(priv, STM32L4_ATIM_BDTR_OFFSET); + bdtr = stm32l4pwm_getreg(priv, STM32L4_ATIM_BDTR_OFFSET); bdtr &= ~(ATIM_BDTR_OSSI | ATIM_BDTR_OSSR); bdtr |= ATIM_BDTR_MOE; - pwm_putreg(priv, STM32L4_ATIM_BDTR_OFFSET, bdtr); + stm32l4pwm_putreg(priv, STM32L4_ATIM_BDTR_OFFSET, bdtr); } else #endif @@ -1228,19 +1230,19 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, /* Save the modified register values */ - pwm_putreg(priv, STM32L4_GTIM_CR2_OFFSET, cr2); + stm32l4pwm_putreg(priv, STM32L4_GTIM_CR2_OFFSET, cr2); putreg32(ccmr1, priv->base + STM32L4_GTIM_CCMR1_OFFSET); putreg32(ccmr2, priv->base + STM32L4_GTIM_CCMR2_OFFSET); - pwm_putreg(priv, STM32L4_GTIM_CCER_OFFSET, ccer); + stm32l4pwm_putreg(priv, STM32L4_GTIM_CCER_OFFSET, ccer); /* Set the ARR Preload Bit */ - cr1 = pwm_getreg(priv, STM32L4_GTIM_CR1_OFFSET); + cr1 = stm32l4pwm_getreg(priv, STM32L4_GTIM_CR1_OFFSET); cr1 |= GTIM_CR1_ARPE; - pwm_putreg(priv, STM32L4_GTIM_CR1_OFFSET, cr1); + stm32l4pwm_putreg(priv, STM32L4_GTIM_CR1_OFFSET, cr1); /* Setup update interrupt. If info->count is > 0, then we can be - * assured that pwm_start() has already verified: (1) that this is an + * assured that stm32l4pwm_start() has already verified: (1) that this is an * advanced timer, and that (2) the repetition count is within range. */ @@ -1249,13 +1251,13 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, { /* Clear all pending interrupts and enable the update interrupt. */ - pwm_putreg(priv, STM32L4_GTIM_SR_OFFSET, 0); - pwm_putreg(priv, STM32L4_GTIM_DIER_OFFSET, ATIM_DIER_UIE); + stm32l4pwm_putreg(priv, STM32L4_GTIM_SR_OFFSET, 0); + stm32l4pwm_putreg(priv, STM32L4_GTIM_DIER_OFFSET, ATIM_DIER_UIE); /* Enable the timer */ cr1 |= GTIM_CR1_CEN; - pwm_putreg(priv, STM32L4_GTIM_CR1_OFFSET, cr1); + stm32l4pwm_putreg(priv, STM32L4_GTIM_CR1_OFFSET, cr1); /* And enable timer interrupts at the NVIC */ @@ -1267,16 +1269,16 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, /* Just enable the timer, leaving all interrupts disabled */ cr1 |= GTIM_CR1_CEN; - pwm_putreg(priv, STM32L4_GTIM_CR1_OFFSET, cr1); + stm32l4pwm_putreg(priv, STM32L4_GTIM_CR1_OFFSET, cr1); } - pwm_dumpregs(priv, "After starting"); + stm32l4pwm_dumpregs(priv, "After starting"); return OK; } #ifndef CONFIG_PWM_PULSECOUNT /**************************************************************************** - * Name: pwm_update_duty + * Name: stm32l4pwm_update_duty * * Description: * Try to change only channel duty. @@ -1291,8 +1293,8 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, * ****************************************************************************/ -static int pwm_update_duty(FAR struct stm32_pwmtimer_s *priv, uint8_t channel, - ub16_t duty) +static int stm32l4pwm_update_duty(FAR struct stm32l4_pwmtimer_s *priv, + uint8_t channel, ub16_t duty) { /* Register offset */ @@ -1315,7 +1317,7 @@ static int pwm_update_duty(FAR struct stm32_pwmtimer_s *priv, uint8_t channel, /* Get the reload values */ - reload = pwm_getreg(priv, STM32L4_GTIM_ARR_OFFSET); + reload = stm32l4pwm_getreg(priv, STM32L4_GTIM_ARR_OFFSET); /* Duty cycle: * @@ -1351,14 +1353,14 @@ static int pwm_update_duty(FAR struct stm32_pwmtimer_s *priv, uint8_t channel, /* Set the duty cycle by writing to the CCR register for this channel */ - pwm_putreg(priv, ccr_offset, (uint16_t)ccr); + stm32l4pwm_putreg(priv, ccr_offset, (uint16_t)ccr); return OK; } #endif /**************************************************************************** - * Name: pwm_interrupt + * Name: stm32l4pwm_interrupt * * Description: * Handle timer interrupts. @@ -1371,19 +1373,19 @@ static int pwm_update_duty(FAR struct stm32_pwmtimer_s *priv, uint8_t channel, * ****************************************************************************/ -#if defined(CONFIG_PWM_PULSECOUNT) && (defined(CONFIG_STM32_TIM1_PWM) || defined(CONFIG_STM32_TIM8_PWM)) -static int pwm_interrupt(struct stm32_pwmtimer_s *priv) +#if defined(CONFIG_PWM_PULSECOUNT) && (defined(CONFIG_STM32L4_TIM1_PWM) || defined(CONFIG_STM32L4_TIM8_PWM)) +static int stm32l4pwm_interrupt(struct stm32l4_pwmtimer_s *priv) { uint16_t regval; /* Verify that this is an update interrupt. Nothing else is expected. */ - regval = pwm_getreg(priv, STM32L4_ATIM_SR_OFFSET); + regval = stm32l4pwm_getreg(priv, STM32L4_ATIM_SR_OFFSET); DEBUGASSERT((regval & ATIM_SR_UIF) != 0); /* Clear the UIF interrupt bit */ - pwm_putreg(priv, STM32L4_ATIM_SR_OFFSET, regval & ~ATIM_SR_UIF); + stm32l4pwm_putreg(priv, STM32L4_ATIM_SR_OFFSET, regval & ~ATIM_SR_UIF); /* Calculate the new count by subtracting the number of pulses * since the last interrupt. @@ -1395,13 +1397,13 @@ static int pwm_interrupt(struct stm32_pwmtimer_s *priv) * quickly as possible. */ - regval = pwm_getreg(priv, STM32L4_ATIM_BDTR_OFFSET); + regval = stm32l4pwm_getreg(priv, STM32L4_ATIM_BDTR_OFFSET); regval &= ~ATIM_BDTR_MOE; - pwm_putreg(priv, STM32L4_ATIM_BDTR_OFFSET, regval); + stm32l4pwm_putreg(priv, STM32L4_ATIM_BDTR_OFFSET, regval); /* Disable first interrtups, stop and reset the timer */ - (void)pwm_stop((FAR struct pwm_lowerhalf_s *)priv); + (void)stm32l4pwm_stop((FAR struct pwm_lowerhalf_s *)priv); /* Then perform the callback into the upper half driver */ @@ -1427,8 +1429,8 @@ static int pwm_interrupt(struct stm32_pwmtimer_s *priv) */ priv->prev = priv->curr; - priv->curr = pwm_pulsecount(priv->count - priv->prev); - pwm_putreg(priv, STM32L4_ATIM_RCR_OFFSET, (uint16_t)priv->curr - 1); + priv->curr = stm32l4pwm_pulsecount(priv->count - priv->prev); + stm32l4pwm_putreg(priv, STM32L4_ATIM_RCR_OFFSET, (uint16_t)priv->curr - 1); } /* Now all of the time critical stuff is done so we can do some debug output */ @@ -1454,22 +1456,22 @@ static int pwm_interrupt(struct stm32_pwmtimer_s *priv) * ****************************************************************************/ -#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_STM32_TIM1_PWM) -static int pwm_tim1interrupt(int irq, void *context) +#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_STM32L4_TIM1_PWM) +static int stm32l4pwm_tim1interrupt(int irq, void *context) { - return pwm_interrupt(&g_pwm1dev); + return stm32l4pwm_interrupt(&g_pwm1dev); } #endif -#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_STM32_TIM8_PWM) -static int pwm_tim8interrupt(int irq, void *context) +#if defined(CONFIG_PWM_PULSECOUNT) && defined(CONFIG_STM32L4_TIM8_PWM) +static int stm32l4pwm_tim8interrupt(int irq, void *context) { - return pwm_interrupt(&g_pwm8dev); + return stm32l4pwm_interrupt(&g_pwm8dev); } #endif /**************************************************************************** - * Name: pwm_pulsecount + * Name: stm32l4pwm_pulsecount * * Description: * Pick an optimal pulse count to program the RCR. @@ -1482,8 +1484,8 @@ static int pwm_tim8interrupt(int irq, void *context) * ****************************************************************************/ -#if defined(CONFIG_PWM_PULSECOUNT) && (defined(CONFIG_STM32_TIM1_PWM) || defined(CONFIG_STM32_TIM8_PWM)) -static uint8_t pwm_pulsecount(uint32_t count) +#if defined(CONFIG_PWM_PULSECOUNT) && (defined(CONFIG_STM32L4_TIM1_PWM) || defined(CONFIG_STM32L4_TIM8_PWM)) +static uint8_t stm32l4pwm_pulsecount(uint32_t count) { /* The the remaining pulse count is less than or equal to the maximum, the * just return the count. @@ -1516,7 +1518,7 @@ static uint8_t pwm_pulsecount(uint32_t count) #endif /**************************************************************************** - * Name: pwm_set_apb_clock + * Name: stm32l4pwm_setapbclock * * Description: * Enable or disable APB clock for the timer peripheral @@ -1527,7 +1529,7 @@ static uint8_t pwm_pulsecount(uint32_t count) * ****************************************************************************/ -static void pwm_set_apb_clock(FAR struct stm32_pwmtimer_s *priv, bool on) +static void stm32l4pwm_setapbclock(FAR struct stm32l4_pwmtimer_s *priv, bool on) { uint32_t en_bit; uint32_t regaddr; @@ -1607,7 +1609,7 @@ static void pwm_set_apb_clock(FAR struct stm32_pwmtimer_s *priv, bool on) } /**************************************************************************** - * Name: pwm_setup + * Name: stm32l4pwm_setup * * Description: * This method is called when the driver is opened. The lower half driver @@ -1626,18 +1628,18 @@ static void pwm_set_apb_clock(FAR struct stm32_pwmtimer_s *priv, bool on) * ****************************************************************************/ -static int pwm_setup(FAR struct pwm_lowerhalf_s *dev) +static int stm32l4pwm_setup(FAR struct pwm_lowerhalf_s *dev) { - FAR struct stm32_pwmtimer_s *priv = (FAR struct stm32_pwmtimer_s *)dev; + FAR struct stm32l4_pwmtimer_s *priv = (FAR struct stm32l4_pwmtimer_s *)dev; uint32_t pincfg; int i; pwminfo("TIM%u\n", priv->timid); - pwm_dumpregs(priv, "Initially"); + stm32l4pwm_dumpregs(priv, "Initially"); /* Enable APB1/2 clocking for timer. */ - pwm_set_apb_clock(priv, true); + stm32l4pwm_setapbclock(priv, true); /* Configure the PWM output pins, but do not start the timer yet */ @@ -1651,7 +1653,7 @@ static int pwm_setup(FAR struct pwm_lowerhalf_s *dev) pwminfo("pincfg: %08x\n", pincfg); - stm32_configgpio(pincfg); + stm32l4_configgpio(pincfg); pwm_dumpgpio(pincfg, "PWM setup"); } @@ -1659,7 +1661,7 @@ static int pwm_setup(FAR struct pwm_lowerhalf_s *dev) } /**************************************************************************** - * Name: pwm_shutdown + * Name: stm32l4pwm_shutdown * * Description: * This method is called when the driver is closed. The lower half driver @@ -1674,9 +1676,9 @@ static int pwm_setup(FAR struct pwm_lowerhalf_s *dev) * ****************************************************************************/ -static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev) +static int stm32l4pwm_shutdown(FAR struct pwm_lowerhalf_s *dev) { - FAR struct stm32_pwmtimer_s *priv = (FAR struct stm32_pwmtimer_s *)dev; + FAR struct stm32l4_pwmtimer_s *priv = (FAR struct stm32l4_pwmtimer_s *)dev; uint32_t pincfg; int i; @@ -1684,11 +1686,11 @@ static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev) /* Make sure that the output has been stopped */ - pwm_stop(dev); + stm32l4pwm_stop(dev); /* Disable APB1/2 clocking for timer. */ - pwm_set_apb_clock(priv, false); + stm32l4pwm_setapbclock(priv, false); /* Then put the GPIO pins back to the default state */ @@ -1706,14 +1708,14 @@ static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev) pincfg |= GPIO_INPUT | GPIO_FLOAT; - stm32_configgpio(pincfg); + stm32l4_configgpio(pincfg); } return OK; } /**************************************************************************** - * Name: pwm_start + * Name: stm32l4pwm_start * * Description: * (Re-)initialize the timer resources and start the pulsed output @@ -1728,11 +1730,11 @@ static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev) ****************************************************************************/ #ifdef CONFIG_PWM_PULSECOUNT -static int pwm_start(FAR struct pwm_lowerhalf_s *dev, +static int stm32l4pwm_start(FAR struct pwm_lowerhalf_s *dev, FAR const struct pwm_info_s *info, FAR void *handle) { - FAR struct stm32_pwmtimer_s *priv = (FAR struct stm32_pwmtimer_s *)dev; + FAR struct stm32l4_pwmtimer_s *priv = (FAR struct stm32l4_pwmtimer_s *)dev; /* Check if a pulsecount has been selected */ @@ -1754,14 +1756,14 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev, /* Start the time */ - return pwm_timer(priv, info); + return stm32l4pwm_timer(priv, info); } #else -static int pwm_start(FAR struct pwm_lowerhalf_s *dev, +static int stm32l4pwm_start(FAR struct pwm_lowerhalf_s *dev, FAR const struct pwm_info_s *info) { int ret = OK; - FAR struct stm32_pwmtimer_s *priv = (FAR struct stm32_pwmtimer_s *)dev; + FAR struct stm32l4_pwmtimer_s *priv = (FAR struct stm32l4_pwmtimer_s *)dev; #ifndef CONFIG_PWM_PULSECOUNT /* if frequency has not changed we just update duty */ @@ -1773,17 +1775,17 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev, for (i = 0; ret == OK && i < CONFIG_PWM_NCHANNELS; i++) { - ret = pwm_update_duty(priv,info->channels[i].channel, + ret = stm32l4pwm_update_duty(priv,info->channels[i].channel, info->channels[i].duty); } #else - ret = pwm_update_duty(priv,priv->channels[0].channel,info->duty); + ret = stm32l4pwm_update_duty(priv,priv->channels[0].channel,info->duty); #endif } else #endif { - ret = pwm_timer(priv, info); + ret = stm32l4pwm_timer(priv, info); #ifndef CONFIG_PWM_PULSECOUNT /* Save current frequency */ @@ -1800,7 +1802,7 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev, #endif /**************************************************************************** - * Name: pwm_stop + * Name: stm32l4pwm_stop * * Description: * Stop the pulsed output and reset the timer resources @@ -1818,9 +1820,9 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev, * ****************************************************************************/ -static int pwm_stop(FAR struct pwm_lowerhalf_s *dev) +static int stm32l4pwm_stop(FAR struct pwm_lowerhalf_s *dev) { - FAR struct stm32_pwmtimer_s *priv = (FAR struct stm32_pwmtimer_s *)dev; + FAR struct stm32l4_pwmtimer_s *priv = (FAR struct stm32l4_pwmtimer_s *)dev; uint32_t resetbit; uint32_t regaddr; uint32_t regval; @@ -1840,8 +1842,8 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev) /* Disable further interrupts and stop the timer */ - pwm_putreg(priv, STM32L4_GTIM_DIER_OFFSET, 0); - pwm_putreg(priv, STM32L4_GTIM_SR_OFFSET, 0); + stm32l4pwm_putreg(priv, STM32L4_GTIM_DIER_OFFSET, 0); + stm32l4pwm_putreg(priv, STM32L4_GTIM_SR_OFFSET, 0); /* Determine which timer to reset */ @@ -1900,7 +1902,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev) } /* Reset the timer - stopping the output and putting the timer back - * into a state where pwm_start() can be called. + * into a state where stm32l4pwm_start() can be called. */ regval = getreg32(regaddr); @@ -1912,12 +1914,12 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev) leave_critical_section(flags); pwminfo("regaddr: %08x resetbit: %08x\n", regaddr, resetbit); - pwm_dumpregs(priv, "After stop"); + stm32l4pwm_dumpregs(priv, "After stop"); return OK; } /**************************************************************************** - * Name: pwm_ioctl + * Name: stm32l4pwm_ioctl * * Description: * Lower-half logic may support platform-specific ioctl commands @@ -1932,10 +1934,11 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev) * ****************************************************************************/ -static int pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd, unsigned long arg) +static int stm32l4pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd, + unsigned long arg) { #ifdef CONFIG_DEBUG_PWM_INFO - FAR struct stm32_pwmtimer_s *priv = (FAR struct stm32_pwmtimer_s *)dev; + FAR struct stm32l4_pwmtimer_s *priv = (FAR struct stm32l4_pwmtimer_s *)dev; /* There are no platform-specific ioctl commands */ @@ -1967,7 +1970,7 @@ static int pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd, unsigned long arg FAR struct pwm_lowerhalf_s *stm32l4_pwminitialize(int timer) { - FAR struct stm32_pwmtimer_s *lower; + FAR struct stm32l4_pwmtimer_s *lower; pwminfo("TIM%u\n", timer); @@ -1980,7 +1983,7 @@ FAR struct pwm_lowerhalf_s *stm32l4_pwminitialize(int timer) /* Attach but disable the TIM1 update interrupt */ #ifdef CONFIG_PWM_PULSECOUNT - irq_attach(lower->irq, pwm_tim1interrupt); + irq_attach(lower->irq, stm32l4pwm_tim1interrupt); up_disable_irq(lower->irq); #endif break; @@ -2017,7 +2020,7 @@ FAR struct pwm_lowerhalf_s *stm32l4_pwminitialize(int timer) /* Attach but disable the TIM8 update interrupt */ #ifdef CONFIG_PWM_PULSECOUNT - irq_attach(lower->irq, pwm_tim8interrupt); + irq_attach(lower->irq, stm32l4pwm_tim8interrupt); up_disable_irq(lower->irq); #endif break; From 67a95493550c3b42aac278737e4d4fb9a6e4b435 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Mon, 11 Jul 2016 11:19:58 -0600 Subject: [PATCH 08/31] TMPFS: Eliminate some warnings --- fs/tmpfs/fs_tmpfs.c | 34 +++++++++++++++++++++------------- 1 file changed, 21 insertions(+), 13 deletions(-) diff --git a/fs/tmpfs/fs_tmpfs.c b/fs/tmpfs/fs_tmpfs.c index ee56d7189b5..df265ff17bc 100644 --- a/fs/tmpfs/fs_tmpfs.c +++ b/fs/tmpfs/fs_tmpfs.c @@ -924,8 +924,8 @@ static int tmpfs_find_object(FAR struct tmpfs_s *fs, FAR struct tmpfs_object_s **object, FAR struct tmpfs_directory_s **parent) { - FAR struct tmpfs_object_s *to; - FAR struct tmpfs_directory_s *tdo; + FAR struct tmpfs_object_s *to = NULL; + FAR struct tmpfs_directory_s *tdo = NULL; FAR struct tmpfs_directory_s *next_tdo; FAR char *segment; FAR char *next_segment; @@ -1019,24 +1019,30 @@ static int tmpfs_find_object(FAR struct tmpfs_s *fs, if (parent) { - /* Get exclusive access to the parent and increment the reference - * count on the object. - */ + if (tdo != NULL) + { + /* Get exclusive access to the parent and increment the reference + * count on the object. + */ - tmpfs_lock_directory(tdo); - tdo->tdo_refs++; + tmpfs_lock_directory(tdo); + tdo->tdo_refs++; + } *parent = tdo; } if (object) { - /* Get exclusive access to the object and increment the reference - * count on the object. - */ + if (to != NULL) + { + /* Get exclusive access to the object and increment the reference + * count on the object. + */ - tmpfs_lock_object(to); - to->to_refs++; + tmpfs_lock_object(to); + to->to_refs++; + } *object = to; } @@ -2086,7 +2092,7 @@ static int tmpfs_unlink(FAR struct inode *mountpt, FAR const char *relpath) { FAR struct tmpfs_s *fs; FAR struct tmpfs_directory_s *tdo; - FAR struct tmpfs_file_s *tfo; + FAR struct tmpfs_file_s *tfo = NULL; FAR const char *name; int ret; @@ -2113,6 +2119,8 @@ static int tmpfs_unlink(FAR struct inode *mountpt, FAR const char *relpath) goto errout_with_lock; } + DEBUGASSERT(tfo != NULL); + /* Get the file name from the relative path */ name = strrchr(relpath, '/'); From fb1855244e8e61eb0caeeacf40b91e6cde32fd28 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Mon, 11 Jul 2016 13:13:17 -0600 Subject: [PATCH 09/31] STM32 timer: Eliminate a warning --- arch/arm/src/stm32/stm32_tim.c | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-) diff --git a/arch/arm/src/stm32/stm32_tim.c b/arch/arm/src/stm32/stm32_tim.c index b001f10cd5e..ff470b3065c 100644 --- a/arch/arm/src/stm32/stm32_tim.c +++ b/arch/arm/src/stm32/stm32_tim.c @@ -158,9 +158,12 @@ # undef CONFIG_STM32_TIM17 #endif +#undef HAVE_TIM_GPIOCONFIG #if defined(CONFIG_STM32_TIM1) # if defined(GPIO_TIM1_CH1OUT) ||defined(GPIO_TIM1_CH2OUT)||\ defined(GPIO_TIM1_CH3OUT) ||defined(GPIO_TIM1_CH4OUT) +# undef HAVE_TIM_GPIOCONFIG +# define HAVE_TIM_GPIOCONFIG 1 # define HAVE_TIM1_GPIOCONFIG 1 #endif #endif @@ -168,6 +171,8 @@ #if defined(CONFIG_STM32_TIM2) # if defined(GPIO_TIM2_CH1OUT) ||defined(GPIO_TIM2_CH2OUT)||\ defined(GPIO_TIM2_CH3OUT) ||defined(GPIO_TIM2_CH4OUT) +# undef HAVE_TIM_GPIOCONFIG +# define HAVE_TIM_GPIOCONFIG 1 # define HAVE_TIM2_GPIOCONFIG 1 #endif #endif @@ -175,6 +180,8 @@ #if defined(CONFIG_STM32_TIM3) # if defined(GPIO_TIM3_CH1OUT) ||defined(GPIO_TIM3_CH2OUT)||\ defined(GPIO_TIM3_CH3OUT) ||defined(GPIO_TIM3_CH4OUT) +# undef HAVE_TIM_GPIOCONFIG +# define HAVE_TIM_GPIOCONFIG 1 # define HAVE_TIM3_GPIOCONFIG 1 #endif #endif @@ -182,6 +189,8 @@ #if defined(CONFIG_STM32_TIM4) # if defined(GPIO_TIM4_CH1OUT) ||defined(GPIO_TIM4_CH2OUT)||\ defined(GPIO_TIM4_CH3OUT) ||defined(GPIO_TIM4_CH4OUT) +# undef HAVE_TIM_GPIOCONFIG +# define HAVE_TIM_GPIOCONFIG 1 # define HAVE_TIM4_GPIOCONFIG 1 #endif #endif @@ -189,6 +198,8 @@ #if defined(CONFIG_STM32_TIM5) # if defined(GPIO_TIM5_CH1OUT) ||defined(GPIO_TIM5_CH2OUT)||\ defined(GPIO_TIM5_CH3OUT) ||defined(GPIO_TIM5_CH4OUT) +# undef HAVE_TIM_GPIOCONFIG +# define HAVE_TIM_GPIOCONFIG 1 # define HAVE_TIM5_GPIOCONFIG 1 #endif #endif @@ -196,6 +207,8 @@ #if defined(CONFIG_STM32_TIM8) # if defined(GPIO_TIM8_CH1OUT) ||defined(GPIO_TIM8_CH2OUT)||\ defined(GPIO_TIM8_CH3OUT) ||defined(GPIO_TIM8_CH4OUT) +# undef HAVE_TIM_GPIOCONFIG +# define HAVE_TIM_GPIOCONFIG 1 # define HAVE_TIM8_GPIOCONFIG 1 #endif #endif @@ -314,7 +327,10 @@ static void stm32_tim_reload_counter(FAR struct stm32_tim_dev_s *dev); static void stm32_tim_enable(FAR struct stm32_tim_dev_s *dev); static void stm32_tim_disable(FAR struct stm32_tim_dev_s *dev); static void stm32_tim_reset(FAR struct stm32_tim_dev_s *dev); + +#ifdef HAVE_TIM_GPIOCONFIG static void stm32_tim_gpioconfig(uint32_t cfg, stm32_tim_channel_t mode); +#endif /* Timer methods */ @@ -637,9 +653,7 @@ static void stm32_tim_reset(FAR struct stm32_tim_dev_s *dev) * Name: stm32_tim_gpioconfig ************************************************************************************/ -#if defined(HAVE_TIM1_GPIOCONFIG)||defined(HAVE_TIM2_GPIOCONFIG)||\ - defined(HAVE_TIM3_GPIOCONFIG)||defined(HAVE_TIM4_GPIOCONFIG)||\ - defined(HAVE_TIM5_GPIOCONFIG)||defined(HAVE_TIM8_GPIOCONFIG) +#ifdef HAVE_TIM_GPIOCONFIG static void stm32_tim_gpioconfig(uint32_t cfg, stm32_tim_channel_t mode) { /* TODO: Add support for input capture and bipolar dual outputs for TIM8 */ From 6a081e118d0529906d6bb942bbb11d886258bc60 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Mon, 11 Jul 2016 13:43:43 -0600 Subject: [PATCH 10/31] Add guess at missing lib_libexpif.c file --- libc/math/lib_libexpi.c | 4 +- libc/math/lib_libexpif.c | 96 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 98 insertions(+), 2 deletions(-) create mode 100644 libc/math/lib_libexpif.c diff --git a/libc/math/lib_libexpi.c b/libc/math/lib_libexpi.c index c8f5793d390..c6f8341ae45 100644 --- a/libc/math/lib_libexpi.c +++ b/libc/math/lib_libexpi.c @@ -58,7 +58,7 @@ * Private Data ****************************************************************************/ -static double _expi_square_tbl[11] = +static double g_expi_square_tbl[11] = { M_E, /* e^1 */ M_E2, /* e^2 */ @@ -94,7 +94,7 @@ double lib_expi(size_t n) if (n & (1 << i)) { n &= ~(1 << i); - val *= _expi_square_tbl[i]; + val *= g_expi_square_tbl[i]; } } diff --git a/libc/math/lib_libexpif.c b/libc/math/lib_libexpif.c new file mode 100644 index 00000000000..8d8509c723f --- /dev/null +++ b/libc/math/lib_libexpif.c @@ -0,0 +1,96 @@ +/**************************************************************************** + * libc/math/lib_libexpif.c + * + * This file is a part of NuttX: + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Ported by: Darcy Gong/Gregory Nutt + * + * It derives from the Rhombs OS math library by Nick Johnson which has + * a compatibile, MIT-style license: + * + * Copyright (C) 2009-2011 Nick Johnson + * + * Permission to use, copy, modify, and distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include +#include + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define M_E2 (M_E * M_E) +#define M_E4 (M_E2 * M_E2) +#define M_E8 (M_E4 * M_E4) +#define M_E16 (M_E8 * M_E8) +#define M_E32 (M_E16 * M_E16) +#define M_E64 (M_E32 * M_E32) +#define M_E128 (M_E64 * M_E64) + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static float g_expif_square_tbl[11] = +{ + (float)M_E, /* e^1 */ + (float)M_E2, /* e^2 */ + (float)M_E4, /* e^4 */ + (float)M_E8, /* e^8 */ + (float)M_E16, /* e^16 */ + (float)M_E32, /* e^32 */ + (float)M_E64, /* e^64 */ + (float)M_E128, /* e^128 */ +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +float lib_expif(size_t n) +{ + size_t i; + float val; + + if (n > 128) + { + return INFINITY_F; + } + + val = 1.0F; + + for (i = 0; n; i++) + { + if (n & (1 << i)) + { + n &= ~(1 << i); + val *= g_expif_square_tbl[i]; + } + } + + return val; +} From 29eae1023255abe012d63680adfc3bdef2a32dde Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Mon, 11 Jul 2016 13:53:31 -0600 Subject: [PATCH 11/31] lib_expi/f(): Exponental table should be 'const'. Dimension was wrong for float version. --- libc/math/lib_libexpi.c | 4 ++-- libc/math/lib_libexpif.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/libc/math/lib_libexpi.c b/libc/math/lib_libexpi.c index c6f8341ae45..cab07ca8fa8 100644 --- a/libc/math/lib_libexpi.c +++ b/libc/math/lib_libexpi.c @@ -58,7 +58,7 @@ * Private Data ****************************************************************************/ -static double g_expi_square_tbl[11] = +static const double g_expi_square_tbl[11] = { M_E, /* e^1 */ M_E2, /* e^2 */ @@ -91,7 +91,7 @@ double lib_expi(size_t n) for (i = 0; n; i++) { - if (n & (1 << i)) + if ((n & (1 << i)) != 0) { n &= ~(1 << i); val *= g_expi_square_tbl[i]; diff --git a/libc/math/lib_libexpif.c b/libc/math/lib_libexpif.c index 8d8509c723f..d1204d21275 100644 --- a/libc/math/lib_libexpif.c +++ b/libc/math/lib_libexpif.c @@ -55,7 +55,7 @@ * Private Data ****************************************************************************/ -static float g_expif_square_tbl[11] = +static const float g_expif_square_tbl[8] = { (float)M_E, /* e^1 */ (float)M_E2, /* e^2 */ @@ -85,7 +85,7 @@ float lib_expif(size_t n) for (i = 0; n; i++) { - if (n & (1 << i)) + if ((n & (1 << i)) != 0) { n &= ~(1 << i); val *= g_expif_square_tbl[i]; From f9d4b5020710061eb6af3ed35233d1b0fbb93438 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Mon, 11 Jul 2016 13:52:21 -0600 Subject: [PATCH 12/31] If there are no streams, let printf() fall back to use syslog() for output. --- libc/stdio/lib_printf.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/libc/stdio/lib_printf.c b/libc/stdio/lib_printf.c index b760abb4bb9..7c3e460b975 100644 --- a/libc/stdio/lib_printf.c +++ b/libc/stdio/lib_printf.c @@ -58,13 +58,8 @@ int printf(FAR const IPTR char *fmt, ...) va_start(ap, fmt); #if CONFIG_NFILE_STREAMS > 0 ret = vfprintf(stdout, fmt, ap); -#elif CONFIG_NFILE_DESCRIPTORS > 0 - ret = vsyslog(LOG_INFO, fmt, ap); #else -# ifdef CONFIG_CPP_HAVE_WARNING -# warning "printf has no data sink" -# endif - ret = 0; + ret = vsyslog(LOG_INFO, fmt, ap); #endif va_end(ap); From dfe8596e53cc38236cb1d47562b407464676c8f6 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Mon, 11 Jul 2016 14:15:34 -0600 Subject: [PATCH 13/31] Cosmetic --- libc/math/lib_libexpi.c | 39 +++++++++++++++++++-------------------- libc/math/lib_libexpif.c | 32 ++++++++++++++++---------------- 2 files changed, 35 insertions(+), 36 deletions(-) diff --git a/libc/math/lib_libexpi.c b/libc/math/lib_libexpi.c index cab07ca8fa8..bcb56221300 100644 --- a/libc/math/lib_libexpi.c +++ b/libc/math/lib_libexpi.c @@ -43,13 +43,13 @@ * Pre-processor Definitions ****************************************************************************/ -#define M_E2 (M_E * M_E) -#define M_E4 (M_E2 * M_E2) -#define M_E8 (M_E4 * M_E4) -#define M_E16 (M_E8 * M_E8) -#define M_E32 (M_E16 * M_E16) -#define M_E64 (M_E32 * M_E32) -#define M_E128 (M_E64 * M_E64) +#define M_E2 (M_E * M_E) +#define M_E4 (M_E2 * M_E2) +#define M_E8 (M_E4 * M_E4) +#define M_E16 (M_E8 * M_E8) +#define M_E32 (M_E16 * M_E16) +#define M_E64 (M_E32 * M_E32) +#define M_E128 (M_E64 * M_E64) #define M_E256 (M_E128 * M_E128) #define M_E512 (M_E256 * M_E256) #define M_E1024 (M_E512 * M_E512) @@ -60,17 +60,17 @@ static const double g_expi_square_tbl[11] = { - M_E, /* e^1 */ - M_E2, /* e^2 */ - M_E4, /* e^4 */ - M_E8, /* e^8 */ - M_E16, /* e^16 */ - M_E32, /* e^32 */ - M_E64, /* e^64 */ - M_E128, /* e^128 */ - M_E256, /* e^256 */ - M_E512, /* e^512 */ - M_E1024, /* e^1024 */ + M_E, /* e^1 */ + M_E2, /* e^2 */ + M_E4, /* e^4 */ + M_E8, /* e^8 */ + M_E16, /* e^16 */ + M_E32, /* e^32 */ + M_E64, /* e^64 */ + M_E128, /* e^128 */ + M_E256, /* e^256 */ + M_E512, /* e^512 */ + M_E1024, /* e^1024 */ }; /**************************************************************************** @@ -89,7 +89,7 @@ double lib_expi(size_t n) val = 1.0; - for (i = 0; n; i++) + for (i = 0; n != 0; i++) { if ((n & (1 << i)) != 0) { @@ -100,4 +100,3 @@ double lib_expi(size_t n) return val; } - diff --git a/libc/math/lib_libexpif.c b/libc/math/lib_libexpif.c index d1204d21275..88dd9dd61ee 100644 --- a/libc/math/lib_libexpif.c +++ b/libc/math/lib_libexpif.c @@ -43,13 +43,13 @@ * Pre-processor Definitions ****************************************************************************/ -#define M_E2 (M_E * M_E) -#define M_E4 (M_E2 * M_E2) -#define M_E8 (M_E4 * M_E4) -#define M_E16 (M_E8 * M_E8) -#define M_E32 (M_E16 * M_E16) -#define M_E64 (M_E32 * M_E32) -#define M_E128 (M_E64 * M_E64) +#define M_E2 (M_E * M_E) +#define M_E4 (M_E2 * M_E2) +#define M_E8 (M_E4 * M_E4) +#define M_E16 (M_E8 * M_E8) +#define M_E32 (M_E16 * M_E16) +#define M_E64 (M_E32 * M_E32) +#define M_E128 (M_E64 * M_E64) /**************************************************************************** * Private Data @@ -57,14 +57,14 @@ static const float g_expif_square_tbl[8] = { - (float)M_E, /* e^1 */ - (float)M_E2, /* e^2 */ - (float)M_E4, /* e^4 */ - (float)M_E8, /* e^8 */ - (float)M_E16, /* e^16 */ - (float)M_E32, /* e^32 */ - (float)M_E64, /* e^64 */ - (float)M_E128, /* e^128 */ + (float)M_E, /* e^1 */ + (float)M_E2, /* e^2 */ + (float)M_E4, /* e^4 */ + (float)M_E8, /* e^8 */ + (float)M_E16, /* e^16 */ + (float)M_E32, /* e^32 */ + (float)M_E64, /* e^64 */ + (float)M_E128, /* e^128 */ }; /**************************************************************************** @@ -83,7 +83,7 @@ float lib_expif(size_t n) val = 1.0F; - for (i = 0; n; i++) + for (i = 0; n != 0; i++) { if ((n & (1 << i)) != 0) { From 4dd020784a3ce36c618698293f912f299db76d81 Mon Sep 17 00:00:00 2001 From: Sebastien Lorquet Date: Mon, 11 Jul 2016 23:57:57 +0200 Subject: [PATCH 14/31] renames in tickless --- arch/arm/src/stm32l4/stm32l4_tickless.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm/src/stm32l4/stm32l4_tickless.c b/arch/arm/src/stm32l4/stm32l4_tickless.c index 123e93459db..b14bef51e83 100644 --- a/arch/arm/src/stm32l4/stm32l4_tickless.c +++ b/arch/arm/src/stm32l4/stm32l4_tickless.c @@ -118,7 +118,7 @@ * Private Types ****************************************************************************/ -struct stm32_tickless_s +struct stm32l4_tickless_s { struct stm32l4_oneshot_s oneshot; struct stm32l4_freerun_s freerun; @@ -128,14 +128,14 @@ struct stm32_tickless_s * Private Data ****************************************************************************/ -static struct stm32_tickless_s g_tickless; +static struct stm32l4_tickless_s g_tickless; /**************************************************************************** * Private Functions ****************************************************************************/ /**************************************************************************** - * Name: stm32_oneshot_handler + * Name: stm32l4_oneshot_handler * * Description: * Called when the one shot timer expires @@ -152,7 +152,7 @@ static struct stm32_tickless_s g_tickless; * ****************************************************************************/ -static void stm32_oneshot_handler(void *arg) +static void stm32l4_oneshot_handler(void *arg) { tmrinfo("Expired...\n"); sched_timer_expiration(); @@ -201,7 +201,7 @@ void up_timer_initialize(void) CONFIG_USEC_PER_TICK); if (ret < 0) { - tmrerr("ERROR: stm32_oneshot_initialize failed\n"); + tmrerr("ERROR: stm32l4_oneshot_initialize failed\n"); PANIC(); } @@ -211,7 +211,7 @@ void up_timer_initialize(void) ret = stm32l4_oneshot_max_delay(&g_tickless.oneshot, &max_delay); if (ret < 0) { - tmrerr("ERROR: stm32_oneshot_max_delay failed\n"); + tmrerr("ERROR: stm32l4_oneshot_max_delay failed\n"); PANIC(); } @@ -235,7 +235,7 @@ void up_timer_initialize(void) CONFIG_USEC_PER_TICK); if (ret < 0) { - tmrerr("ERROR: stm32_freerun_initialize failed\n"); + tmrerr("ERROR: stm32l4_freerun_initialize failed\n"); PANIC(); } } @@ -346,6 +346,6 @@ int up_timer_cancel(FAR struct timespec *ts) int up_timer_start(FAR const struct timespec *ts) { - return stm32l4_oneshot_start(&g_tickless.oneshot, stm32_oneshot_handler, NULL, ts); + return stm32l4_oneshot_start(&g_tickless.oneshot, stm32l4_oneshot_handler, NULL, ts); } #endif /* CONFIG_SCHED_TICKLESS */ From 3a873a44ef2af469bdae46e3f1d5dc8e9ec1aad2 Mon Sep 17 00:00:00 2001 From: Sebastien Lorquet Date: Mon, 11 Jul 2016 23:59:24 +0200 Subject: [PATCH 15/31] renames in USB OTG --- arch/arm/src/stm32l4/stm32l4_otgfsdev.c | 1996 +++++++++++----------- arch/arm/src/stm32l4/stm32l4_otgfshost.c | 1350 +++++++-------- 2 files changed, 1673 insertions(+), 1673 deletions(-) diff --git a/arch/arm/src/stm32l4/stm32l4_otgfsdev.c b/arch/arm/src/stm32l4/stm32l4_otgfsdev.c index 23d155e2cf5..6d891282c94 100644 --- a/arch/arm/src/stm32l4/stm32l4_otgfsdev.c +++ b/arch/arm/src/stm32l4/stm32l4_otgfsdev.c @@ -119,7 +119,7 @@ /* Number of endpoints */ -#define STM32_NENDPOINTS (6) /* ep0-5 x 2 for IN and OUT */ +#define STM32L4_NENDPOINTS (6) /* ep0-5 x 2 for IN and OUT */ /* Adjust actual number of endpoints based upon size; 0 means 'not available', * and we expect that the first 0-length endpoint implies that all others @@ -127,8 +127,8 @@ */ #if CONFIG_USBDEV_EP1_TXFIFO_SIZE == 0 -# undef STM32_NENDPOINTS -# define STM32_NENDPOINTS 1 +# undef STM32L4_NENDPOINTS +# define STM32L4_NENDPOINTS 1 # undef CONFIG_USBDEV_EP2_TXFIFO_SIZE # define CONFIG_USBDEV_EP2_TXFIFO_SIZE 0 # undef CONFIG_USBDEV_EP3_TXFIFO_SIZE @@ -138,8 +138,8 @@ # undef CONFIG_USBDEV_EP5_TXFIFO_SIZE # define CONFIG_USBDEV_EP5_TXFIFO_SIZE 0 #elif CONFIG_USBDEV_EP2_TXFIFO_SIZE == 0 -# undef STM32_NENDPOINTS -# define STM32_NENDPOINTS 2 +# undef STM32L4_NENDPOINTS +# define STM32L4_NENDPOINTS 2 # undef CONFIG_USBDEV_EP3_TXFIFO_SIZE # define CONFIG_USBDEV_EP3_TXFIFO_SIZE 0 # undef CONFIG_USBDEV_EP4_TXFIFO_SIZE @@ -147,20 +147,20 @@ # undef CONFIG_USBDEV_EP5_TXFIFO_SIZE # define CONFIG_USBDEV_EP5_TXFIFO_SIZE 0 #elif CONFIG_USBDEV_EP3_TXFIFO_SIZE == 0 -# undef STM32_NENDPOINTS -# define STM32_NENDPOINTS 3 +# undef STM32L4_NENDPOINTS +# define STM32L4_NENDPOINTS 3 # undef CONFIG_USBDEV_EP4_TXFIFO_SIZE # define CONFIG_USBDEV_EP4_TXFIFO_SIZE 0 # undef CONFIG_USBDEV_EP5_TXFIFO_SIZE # define CONFIG_USBDEV_EP5_TXFIFO_SIZE 0 #elif CONFIG_USBDEV_EP4_TXFIFO_SIZE == 0 -# undef STM32_NENDPOINTS -# define STM32_NENDPOINTS 4 +# undef STM32L4_NENDPOINTS +# define STM32L4_NENDPOINTS 4 # undef CONFIG_USBDEV_EP5_TXFIFO_SIZE # define CONFIG_USBDEV_EP5_TXFIFO_SIZE 0 #elif CONFIG_USBDEV_EP5_TXFIFO_SIZE == 0 -# undef STM32_NENDPOINTS -# define STM32_NENDPOINTS 5 +# undef STM32L4_NENDPOINTS +# define STM32L4_NENDPOINTS 5 #endif /* Sanity check on allocations specified. */ @@ -180,136 +180,136 @@ * FIFO sizes must be provided in units of 32-bit words. */ -#define STM32_RXFIFO_BYTES ((CONFIG_USBDEV_RXFIFO_SIZE + 3) & ~3) -#define STM32_RXFIFO_WORDS ((CONFIG_USBDEV_RXFIFO_SIZE + 3) >> 2) +#define STM32L4_RXFIFO_BYTES ((CONFIG_USBDEV_RXFIFO_SIZE + 3) & ~3) +#define STM32L4_RXFIFO_WORDS ((CONFIG_USBDEV_RXFIFO_SIZE + 3) >> 2) -#define STM32_EP0_TXFIFO_BYTES ((CONFIG_USBDEV_EP0_TXFIFO_SIZE + 3) & ~3) -#define STM32_EP0_TXFIFO_WORDS ((CONFIG_USBDEV_EP0_TXFIFO_SIZE + 3) >> 2) +#define STM32L4_EP0_TXFIFO_BYTES ((CONFIG_USBDEV_EP0_TXFIFO_SIZE + 3) & ~3) +#define STM32L4_EP0_TXFIFO_WORDS ((CONFIG_USBDEV_EP0_TXFIFO_SIZE + 3) >> 2) -#if STM32_EP0_TXFIFO_WORDS < 16 || STM32_EP0_TXFIFO_WORDS > 256 +#if STM32L4_EP0_TXFIFO_WORDS < 16 || STM32L4_EP0_TXFIFO_WORDS > 256 # error "CONFIG_USBDEV_EP0_TXFIFO_SIZE is out of range" #endif -#define STM32_EP1_TXFIFO_BYTES ((CONFIG_USBDEV_EP1_TXFIFO_SIZE + 3) & ~3) -#define STM32_EP1_TXFIFO_WORDS ((CONFIG_USBDEV_EP1_TXFIFO_SIZE + 3) >> 2) +#define STM32L4_EP1_TXFIFO_BYTES ((CONFIG_USBDEV_EP1_TXFIFO_SIZE + 3) & ~3) +#define STM32L4_EP1_TXFIFO_WORDS ((CONFIG_USBDEV_EP1_TXFIFO_SIZE + 3) >> 2) -#if STM32_EP1_TXFIFO_BYTES != 0 && STM32_EP1_TXFIFO_WORDS < 16 +#if STM32L4_EP1_TXFIFO_BYTES != 0 && STM32L4_EP1_TXFIFO_WORDS < 16 # error "CONFIG_USBDEV_EP1_TXFIFO_SIZE is out of range" #endif -#define STM32_EP2_TXFIFO_BYTES ((CONFIG_USBDEV_EP2_TXFIFO_SIZE + 3) & ~3) -#define STM32_EP2_TXFIFO_WORDS ((CONFIG_USBDEV_EP2_TXFIFO_SIZE + 3) >> 2) +#define STM32L4_EP2_TXFIFO_BYTES ((CONFIG_USBDEV_EP2_TXFIFO_SIZE + 3) & ~3) +#define STM32L4_EP2_TXFIFO_WORDS ((CONFIG_USBDEV_EP2_TXFIFO_SIZE + 3) >> 2) -#if STM32_EP2_TXFIFO_BYTES != 0 && STM32_EP2_TXFIFO_WORDS < 16 +#if STM32L4_EP2_TXFIFO_BYTES != 0 && STM32L4_EP2_TXFIFO_WORDS < 16 # error "CONFIG_USBDEV_EP2_TXFIFO_SIZE is out of range" #endif -#define STM32_EP3_TXFIFO_BYTES ((CONFIG_USBDEV_EP3_TXFIFO_SIZE + 3) & ~3) -#define STM32_EP3_TXFIFO_WORDS ((CONFIG_USBDEV_EP3_TXFIFO_SIZE + 3) >> 2) +#define STM32L4_EP3_TXFIFO_BYTES ((CONFIG_USBDEV_EP3_TXFIFO_SIZE + 3) & ~3) +#define STM32L4_EP3_TXFIFO_WORDS ((CONFIG_USBDEV_EP3_TXFIFO_SIZE + 3) >> 2) -#if STM32_EP3_TXFIFO_BYTES != 0 && STM32_EP3_TXFIFO_WORDS < 16 +#if STM32L4_EP3_TXFIFO_BYTES != 0 && STM32L4_EP3_TXFIFO_WORDS < 16 # error "CONFIG_USBDEV_EP3_TXFIFO_SIZE is out of range" #endif -#define STM32_EP4_TXFIFO_BYTES ((CONFIG_USBDEV_EP4_TXFIFO_SIZE + 3) & ~3) -#define STM32_EP4_TXFIFO_WORDS ((CONFIG_USBDEV_EP4_TXFIFO_SIZE + 3) >> 2) +#define STM32L4_EP4_TXFIFO_BYTES ((CONFIG_USBDEV_EP4_TXFIFO_SIZE + 3) & ~3) +#define STM32L4_EP4_TXFIFO_WORDS ((CONFIG_USBDEV_EP4_TXFIFO_SIZE + 3) >> 2) -#if STM32_EP4_TXFIFO_BYTES != 0 && STM32_EP4_TXFIFO_WORDS < 16 +#if STM32L4_EP4_TXFIFO_BYTES != 0 && STM32L4_EP4_TXFIFO_WORDS < 16 # error "CONFIG_USBDEV_EP4_TXFIFO_SIZE is out of range" #endif -#define STM32_EP5_TXFIFO_BYTES ((CONFIG_USBDEV_EP5_TXFIFO_SIZE + 3) & ~3) -#define STM32_EP5_TXFIFO_WORDS ((CONFIG_USBDEV_EP5_TXFIFO_SIZE + 3) >> 2) +#define STM32L4_EP5_TXFIFO_BYTES ((CONFIG_USBDEV_EP5_TXFIFO_SIZE + 3) & ~3) +#define STM32L4_EP5_TXFIFO_WORDS ((CONFIG_USBDEV_EP5_TXFIFO_SIZE + 3) >> 2) -#if STM32_EP5_TXFIFO_BYTES != 0 && STM32_EP5_TXFIFO_WORDS < 16 +#if STM32L4_EP5_TXFIFO_BYTES != 0 && STM32L4_EP5_TXFIFO_WORDS < 16 # error "CONFIG_USBDEV_EP5_TXFIFO_SIZE is out of range" #endif /* Debug ***********************************************************************/ /* Trace error codes */ -#define STM32_TRACEERR_ALLOCFAIL 0x01 -#define STM32_TRACEERR_BADCLEARFEATURE 0x02 -#define STM32_TRACEERR_BADDEVGETSTATUS 0x03 -#define STM32_TRACEERR_BADEPNO 0x04 -#define STM32_TRACEERR_BADEPGETSTATUS 0x05 -#define STM32_TRACEERR_BADGETCONFIG 0x06 -#define STM32_TRACEERR_BADGETSETDESC 0x07 -#define STM32_TRACEERR_BADGETSTATUS 0x08 -#define STM32_TRACEERR_BADSETADDRESS 0x09 -#define STM32_TRACEERR_BADSETCONFIG 0x0a -#define STM32_TRACEERR_BADSETFEATURE 0x0b -#define STM32_TRACEERR_BADTESTMODE 0x0c -#define STM32_TRACEERR_BINDFAILED 0x0d -#define STM32_TRACEERR_DISPATCHSTALL 0x0e -#define STM32_TRACEERR_DRIVER 0x0f -#define STM32_TRACEERR_DRIVERREGISTERED 0x10 -#define STM32_TRACEERR_EP0NOSETUP 0x11 -#define STM32_TRACEERR_EP0SETUPSTALLED 0x12 -#define STM32_TRACEERR_EPINNULLPACKET 0x13 -#define STM32_TRACEERR_EPINUNEXPECTED 0x14 -#define STM32_TRACEERR_EPOUTNULLPACKET 0x15 -#define STM32_TRACEERR_EPOUTUNEXPECTED 0x16 -#define STM32_TRACEERR_INVALIDCTRLREQ 0x17 -#define STM32_TRACEERR_INVALIDPARMS 0x18 -#define STM32_TRACEERR_IRQREGISTRATION 0x19 -#define STM32_TRACEERR_NOEP 0x1a -#define STM32_TRACEERR_NOTCONFIGURED 0x1b -#define STM32_TRACEERR_EPOUTQEMPTY 0x1c -#define STM32_TRACEERR_EPINREQEMPTY 0x1d -#define STM32_TRACEERR_NOOUTSETUP 0x1e -#define STM32_TRACEERR_POLLTIMEOUT 0x1f +#define STM32L4_TRACEERR_ALLOCFAIL 0x01 +#define STM32L4_TRACEERR_BADCLEARFEATURE 0x02 +#define STM32L4_TRACEERR_BADDEVGETSTATUS 0x03 +#define STM32L4_TRACEERR_BADEPNO 0x04 +#define STM32L4_TRACEERR_BADEPGETSTATUS 0x05 +#define STM32L4_TRACEERR_BADGETCONFIG 0x06 +#define STM32L4_TRACEERR_BADGETSETDESC 0x07 +#define STM32L4_TRACEERR_BADGETSTATUS 0x08 +#define STM32L4_TRACEERR_BADSETADDRESS 0x09 +#define STM32L4_TRACEERR_BADSETCONFIG 0x0a +#define STM32L4_TRACEERR_BADSETFEATURE 0x0b +#define STM32L4_TRACEERR_BADTESTMODE 0x0c +#define STM32L4_TRACEERR_BINDFAILED 0x0d +#define STM32L4_TRACEERR_DISPATCHSTALL 0x0e +#define STM32L4_TRACEERR_DRIVER 0x0f +#define STM32L4_TRACEERR_DRIVERREGISTERED 0x10 +#define STM32L4_TRACEERR_EP0NOSETUP 0x11 +#define STM32L4_TRACEERR_EP0SETUPSTALLED 0x12 +#define STM32L4_TRACEERR_EPINNULLPACKET 0x13 +#define STM32L4_TRACEERR_EPINUNEXPECTED 0x14 +#define STM32L4_TRACEERR_EPOUTNULLPACKET 0x15 +#define STM32L4_TRACEERR_EPOUTUNEXPECTED 0x16 +#define STM32L4_TRACEERR_INVALIDCTRLREQ 0x17 +#define STM32L4_TRACEERR_INVALIDPARMS 0x18 +#define STM32L4_TRACEERR_IRQREGISTRATION 0x19 +#define STM32L4_TRACEERR_NOEP 0x1a +#define STM32L4_TRACEERR_NOTCONFIGURED 0x1b +#define STM32L4_TRACEERR_EPOUTQEMPTY 0x1c +#define STM32L4_TRACEERR_EPINREQEMPTY 0x1d +#define STM32L4_TRACEERR_NOOUTSETUP 0x1e +#define STM32L4_TRACEERR_POLLTIMEOUT 0x1f /* Trace interrupt codes */ -#define STM32_TRACEINTID_USB 1 /* USB Interrupt entry/exit */ -#define STM32_TRACEINTID_INTPENDING 2 /* On each pass through the loop */ +#define STM32L4_TRACEINTID_USB 1 /* USB Interrupt entry/exit */ +#define STM32L4_TRACEINTID_INTPENDING 2 /* On each pass through the loop */ -#define STM32_TRACEINTID_EPOUT (10 + 0) /* First level interrupt decode */ -#define STM32_TRACEINTID_EPIN (10 + 1) -#define STM32_TRACEINTID_MISMATCH (10 + 2) -#define STM32_TRACEINTID_WAKEUP (10 + 3) -#define STM32_TRACEINTID_SUSPEND (10 + 4) -#define STM32_TRACEINTID_SOF (10 + 5) -#define STM32_TRACEINTID_RXFIFO (10 + 6) -#define STM32_TRACEINTID_DEVRESET (10 + 7) -#define STM32_TRACEINTID_ENUMDNE (10 + 8) -#define STM32_TRACEINTID_IISOIXFR (10 + 9) -#define STM32_TRACEINTID_IISOOXFR (10 + 10) -#define STM32_TRACEINTID_SRQ (10 + 11) -#define STM32_TRACEINTID_OTG (10 + 12) +#define STM32L4_TRACEINTID_EPOUT (10 + 0) /* First level interrupt decode */ +#define STM32L4_TRACEINTID_EPIN (10 + 1) +#define STM32L4_TRACEINTID_MISMATCH (10 + 2) +#define STM32L4_TRACEINTID_WAKEUP (10 + 3) +#define STM32L4_TRACEINTID_SUSPEND (10 + 4) +#define STM32L4_TRACEINTID_SOF (10 + 5) +#define STM32L4_TRACEINTID_RXFIFO (10 + 6) +#define STM32L4_TRACEINTID_DEVRESET (10 + 7) +#define STM32L4_TRACEINTID_ENUMDNE (10 + 8) +#define STM32L4_TRACEINTID_IISOIXFR (10 + 9) +#define STM32L4_TRACEINTID_IISOOXFR (10 + 10) +#define STM32L4_TRACEINTID_SRQ (10 + 11) +#define STM32L4_TRACEINTID_OTG (10 + 12) -#define STM32_TRACEINTID_EPOUT_XFRC (40 + 0) /* EPOUT second level decode */ -#define STM32_TRACEINTID_EPOUT_EPDISD (40 + 1) -#define STM32_TRACEINTID_EPOUT_SETUP (40 + 2) -#define STM32_TRACEINTID_DISPATCH (40 + 3) +#define STM32L4_TRACEINTID_EPOUT_XFRC (40 + 0) /* EPOUT second level decode */ +#define STM32L4_TRACEINTID_EPOUT_EPDISD (40 + 1) +#define STM32L4_TRACEINTID_EPOUT_SETUP (40 + 2) +#define STM32L4_TRACEINTID_DISPATCH (40 + 3) -#define STM32_TRACEINTID_GETSTATUS (50 + 0) /* EPOUT third level decode */ -#define STM32_TRACEINTID_EPGETSTATUS (50 + 1) -#define STM32_TRACEINTID_DEVGETSTATUS (50 + 2) -#define STM32_TRACEINTID_IFGETSTATUS (50 + 3) -#define STM32_TRACEINTID_CLEARFEATURE (50 + 4) -#define STM32_TRACEINTID_SETFEATURE (50 + 5) -#define STM32_TRACEINTID_SETADDRESS (50 + 6) -#define STM32_TRACEINTID_GETSETDESC (50 + 7) -#define STM32_TRACEINTID_GETCONFIG (50 + 8) -#define STM32_TRACEINTID_SETCONFIG (50 + 9) -#define STM32_TRACEINTID_GETSETIF (50 + 10) -#define STM32_TRACEINTID_SYNCHFRAME (50 + 11) +#define STM32L4_TRACEINTID_GETSTATUS (50 + 0) /* EPOUT third level decode */ +#define STM32L4_TRACEINTID_EPGETSTATUS (50 + 1) +#define STM32L4_TRACEINTID_DEVGETSTATUS (50 + 2) +#define STM32L4_TRACEINTID_IFGETSTATUS (50 + 3) +#define STM32L4_TRACEINTID_CLEARFEATURE (50 + 4) +#define STM32L4_TRACEINTID_SETFEATURE (50 + 5) +#define STM32L4_TRACEINTID_SETADDRESS (50 + 6) +#define STM32L4_TRACEINTID_GETSETDESC (50 + 7) +#define STM32L4_TRACEINTID_GETCONFIG (50 + 8) +#define STM32L4_TRACEINTID_SETCONFIG (50 + 9) +#define STM32L4_TRACEINTID_GETSETIF (50 + 10) +#define STM32L4_TRACEINTID_SYNCHFRAME (50 + 11) -#define STM32_TRACEINTID_EPIN_XFRC (70 + 0) /* EPIN second level decode */ -#define STM32_TRACEINTID_EPIN_TOC (70 + 1) -#define STM32_TRACEINTID_EPIN_ITTXFE (70 + 2) -#define STM32_TRACEINTID_EPIN_EPDISD (70 + 3) -#define STM32_TRACEINTID_EPIN_TXFE (70 + 4) +#define STM32L4_TRACEINTID_EPIN_XFRC (70 + 0) /* EPIN second level decode */ +#define STM32L4_TRACEINTID_EPIN_TOC (70 + 1) +#define STM32L4_TRACEINTID_EPIN_ITTXFE (70 + 2) +#define STM32L4_TRACEINTID_EPIN_EPDISD (70 + 3) +#define STM32L4_TRACEINTID_EPIN_TXFE (70 + 4) -#define STM32_TRACEINTID_EPIN_EMPWAIT (80 + 0) /* EPIN second level decode */ +#define STM32L4_TRACEINTID_EPIN_EMPWAIT (80 + 0) /* EPIN second level decode */ -#define STM32_TRACEINTID_OUTNAK (90 + 0) /* RXFLVL second level decode */ -#define STM32_TRACEINTID_OUTRECVD (90 + 1) -#define STM32_TRACEINTID_OUTDONE (90 + 2) -#define STM32_TRACEINTID_SETUPDONE (90 + 3) -#define STM32_TRACEINTID_SETUPRECVD (90 + 4) +#define STM32L4_TRACEINTID_OUTNAK (90 + 0) /* RXFLVL second level decode */ +#define STM32L4_TRACEINTID_OUTRECVD (90 + 1) +#define STM32L4_TRACEINTID_OUTDONE (90 + 2) +#define STM32L4_TRACEINTID_SETUPDONE (90 + 3) +#define STM32L4_TRACEINTID_SETUPRECVD (90 + 4) /* CONFIG_USB_DUMPBUFFER will dump the contents of buffers to the console. */ @@ -328,8 +328,8 @@ /* Odd physical endpoint numbers are IN; even are OUT */ -#define STM32_EPPHYIN2LOG(epphy) ((uint8_t)(epphy)|USB_DIR_IN) -#define STM32_EPPHYOUT2LOG(epphy) ((uint8_t)(epphy)|USB_DIR_OUT) +#define STM32L4_EPPHYIN2LOG(epphy) ((uint8_t)(epphy)|USB_DIR_IN) +#define STM32L4_EPPHYOUT2LOG(epphy) ((uint8_t)(epphy)|USB_DIR_OUT) /* Endpoint 0 */ @@ -339,21 +339,21 @@ * This is a bitmap, and the first endpoint (0) is reserved. */ -#define STM32_EP_AVAILABLE (((1 << STM32_NENDPOINTS) - 1) & ~1) +#define STM32L4_EP_AVAILABLE (((1 << STM32L4_NENDPOINTS) - 1) & ~1) /* Maximum packet sizes for full speed endpoints */ -#define STM32_MAXPACKET (64) /* Max packet size (1-64) */ +#define STM32L4_MAXPACKET (64) /* Max packet size (1-64) */ /* Delays **********************************************************************/ -#define STM32_READY_DELAY 200000 -#define STM32_FLUSH_DELAY 200000 +#define STM32L4_READY_DELAY 200000 +#define STM32L4_FLUSH_DELAY 200000 /* Request queue operations ****************************************************/ -#define stm32_rqempty(ep) ((ep)->head == NULL) -#define stm32_rqpeek(ep) ((ep)->head) +#define stm32l4_rqempty(ep) ((ep)->head == NULL) +#define stm32l4_rqpeek(ep) ((ep)->head) /* Standard stuff **************************************************************/ @@ -371,7 +371,7 @@ /* Overall device state */ -enum stm32_devstate_e +enum stm32l4_devstate_e { DEVSTATE_DEFAULT = 0, /* Power-up, unconfigured state. This state simply * means that the device is not yet been given an @@ -398,11 +398,11 @@ enum stm32_devstate_e /* Endpoint 0 states */ -enum stm32_ep0state_e +enum stm32l4_ep0state_e { EP0STATE_IDLE = 0, /* Idle State, leave on receiving a SETUP packet or * epsubmit: - * SET: In stm32_epin() and stm32_epout() when + * SET: In stm32l4_epin() and stm32l4_epout() when * we revert from request processing to * SETUP processing. * TESTED: Never @@ -410,51 +410,51 @@ enum stm32_ep0state_e EP0STATE_SETUP_OUT, /* OUT SETUP packet received. Waiting for the DATA * OUT phase of SETUP Packet to complete before * processing a SETUP command (without a USB request): - * SET: Set in stm32_rxinterrupt() when SETUP OUT + * SET: Set in stm32l4_rxinterrupt() when SETUP OUT * packet is received. - * TESTED: In stm32_ep0out_receive() + * TESTED: In stm32l4_ep0out_receive() */ EP0STATE_SETUP_READY, /* IN SETUP packet received -OR- OUT SETUP packet and * accompanying data have been received. Processing * of SETUP command will happen soon. - * SET: (1) stm32_ep0out_receive() when the OUT + * SET: (1) stm32l4_ep0out_receive() when the OUT * SETUP data phase completes, or (2) - * stm32_rxinterrupt() when an IN SETUP is + * stm32l4_rxinterrupt() when an IN SETUP is * packet received. - * TESTED: Tested in stm32_epout_interrupt() when + * TESTED: Tested in stm32l4_epout_interrupt() when * SETUP phase is done to see if the SETUP * command is ready to be processed. Also - * tested in stm32_ep0out_setup() just to + * tested in stm32l4_ep0out_setup() just to * double-check that we have a SETUP request * and any accompanying data. */ - EP0STATE_SETUP_PROCESS, /* SETUP Packet is being processed by stm32_ep0out_setup(): + EP0STATE_SETUP_PROCESS, /* SETUP Packet is being processed by stm32l4_ep0out_setup(): * SET: When SETUP packet received in EP0 OUT * TESTED: Never */ EP0STATE_SETUPRESPONSE, /* Short SETUP response write (without a USB request): * SET: When SETUP response is sent by - * stm32_ep0in_setupresponse() + * stm32l4_ep0in_setupresponse() * TESTED: Never */ EP0STATE_DATA_IN, /* Waiting for data out stage (with a USB request): - * SET: In stm32_epin_request() when a write + * SET: In stm32l4_epin_request() when a write * request is processed on EP0. - * TESTED: In stm32_epin() to see if we should + * TESTED: In stm32l4_epin() to see if we should * revert to SETUP processing. */ EP0STATE_DATA_OUT /* Waiting for data in phase to complete ( with a * USB request) - * SET: In stm32_epout_request() when a read + * SET: In stm32l4_epout_request() when a read * request is processed on EP0. - * TESTED: In stm32_epout() to see if we should + * TESTED: In stm32l4_epout() to see if we should * revert to SETUP processing */ }; /* Parsed control request */ -struct stm32_ctrlreq_s +struct stm32l4_ctrlreq_s { uint8_t type; uint8_t req; @@ -465,28 +465,28 @@ struct stm32_ctrlreq_s /* A container for a request so that the request may be retained in a list */ -struct stm32_req_s +struct stm32l4_req_s { struct usbdev_req_s req; /* Standard USB request */ - struct stm32_req_s *flink; /* Supports a singly linked list */ + struct stm32l4_req_s *flink; /* Supports a singly linked list */ }; /* This is the internal representation of an endpoint */ -struct stm32_ep_s +struct stm32l4_ep_s { /* Common endpoint fields. This must be the first thing defined in the * structure so that it is possible to simply cast from struct usbdev_ep_s - * to struct stm32_ep_s. + * to struct stm32l4_ep_s. */ struct usbdev_ep_s ep; /* Standard endpoint structure */ /* STM32-specific fields */ - struct stm32_usbdev_s *dev; /* Reference to private driver data */ - struct stm32_req_s *head; /* Request list for this endpoint */ - struct stm32_req_s *tail; + struct stm32l4_usbdev_s *dev; /* Reference to private driver data */ + struct stm32l4_req_s *head; /* Request list for this endpoint */ + struct stm32l4_req_s *tail; uint8_t epphy; /* Physical EP address */ uint8_t eptype:2; /* Endpoint type */ uint8_t active:1; /* 1: A request is being processed */ @@ -498,11 +498,11 @@ struct stm32_ep_s /* This structure retains the state of the USB device controller */ -struct stm32_usbdev_s +struct stm32l4_usbdev_s { /* Common device fields. This must be the first thing defined in the * structure so that it is possible to simply cast from struct usbdev_s - * to struct stm32_usbdev_s. + * to struct stm32l4_usbdev_s. */ struct usbdev_s usbdev; @@ -520,8 +520,8 @@ struct stm32_usbdev_s uint8_t wakeup:1; /* 1: Device remote wake-up */ uint8_t dotest:1; /* 1: Test mode selected */ - uint8_t devstate:4; /* See enum stm32_devstate_e */ - uint8_t ep0state:4; /* See enum stm32_ep0state_e */ + uint8_t devstate:4; /* See enum stm32l4_devstate_e */ + uint8_t ep0state:4; /* See enum stm32l4_ep0state_e */ uint8_t testmode:4; /* Selected test mode */ uint8_t epavail[2]; /* Bitset of available OUT/IN endpoints */ @@ -551,8 +551,8 @@ struct stm32_usbdev_s /* The endpoint lists */ - struct stm32_ep_s epin[STM32_NENDPOINTS]; - struct stm32_ep_s epout[STM32_NENDPOINTS]; + struct stm32l4_ep_s epin[STM32L4_NENDPOINTS]; + struct stm32l4_ep_s epout[STM32L4_NENDPOINTS]; }; /**************************************************************************** @@ -561,180 +561,180 @@ struct stm32_usbdev_s /* Register operations ********************************************************/ -#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_USB) -static uint32_t stm32_getreg(uint32_t addr); -static void stm32_putreg(uint32_t val, uint32_t addr); +#if defined(CONFIG_STM32L4_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_USB) +static uint32_t stm32l4_getreg(uint32_t addr); +static void stm32l4_putreg(uint32_t val, uint32_t addr); #else -# define stm32_getreg(addr) getreg32(addr) -# define stm32_putreg(val,addr) putreg32(val,addr) +# define stm32l4_getreg(addr) getreg32(addr) +# define stm32l4_putreg(val,addr) putreg32(val,addr) #endif /* Request queue operations ****************************************************/ -static FAR struct stm32_req_s *stm32_req_remfirst(FAR struct stm32_ep_s *privep); -static bool stm32_req_addlast(FAR struct stm32_ep_s *privep, - FAR struct stm32_req_s *req); +static FAR struct stm32l4_req_s *stm32l4_req_remfirst(FAR struct stm32l4_ep_s *privep); +static bool stm32l4_req_addlast(FAR struct stm32l4_ep_s *privep, + FAR struct stm32l4_req_s *req); /* Low level data transfers and request operations *****************************/ /* Special endpoint 0 data transfer logic */ -static void stm32_ep0in_setupresponse(FAR struct stm32_usbdev_s *priv, +static void stm32l4_ep0in_setupresponse(FAR struct stm32l4_usbdev_s *priv, FAR uint8_t *data, uint32_t nbytes); -static inline void stm32_ep0in_transmitzlp(FAR struct stm32_usbdev_s *priv); -static void stm32_ep0in_activate(void); +static inline void stm32l4_ep0in_transmitzlp(FAR struct stm32l4_usbdev_s *priv); +static void stm32l4_ep0in_activate(void); -static void stm32_ep0out_ctrlsetup(FAR struct stm32_usbdev_s *priv); +static void stm32l4_ep0out_ctrlsetup(FAR struct stm32l4_usbdev_s *priv); /* IN request and TxFIFO handling */ -static void stm32_txfifo_write(FAR struct stm32_ep_s *privep, +static void stm32l4_txfifo_write(FAR struct stm32l4_ep_s *privep, FAR uint8_t *buf, int nbytes); -static void stm32_epin_transfer(FAR struct stm32_ep_s *privep, +static void stm32l4_epin_transfer(FAR struct stm32l4_ep_s *privep, FAR uint8_t *buf, int nbytes); -static void stm32_epin_request(FAR struct stm32_usbdev_s *priv, - FAR struct stm32_ep_s *privep); +static void stm32l4_epin_request(FAR struct stm32l4_usbdev_s *priv, + FAR struct stm32l4_ep_s *privep); /* OUT request and RxFIFO handling */ -static void stm32_rxfifo_read(FAR struct stm32_ep_s *privep, +static void stm32l4_rxfifo_read(FAR struct stm32l4_ep_s *privep, FAR uint8_t *dest, uint16_t len); -static void stm32_rxfifo_discard(FAR struct stm32_ep_s *privep, int len); -static void stm32_epout_complete(FAR struct stm32_usbdev_s *priv, - FAR struct stm32_ep_s *privep); -static inline void stm32_ep0out_receive(FAR struct stm32_ep_s *privep, int bcnt); -static inline void stm32_epout_receive(FAR struct stm32_ep_s *privep, int bcnt); -static void stm32_epout_request(FAR struct stm32_usbdev_s *priv, - FAR struct stm32_ep_s *privep); +static void stm32l4_rxfifo_discard(FAR struct stm32l4_ep_s *privep, int len); +static void stm32l4_epout_complete(FAR struct stm32l4_usbdev_s *priv, + FAR struct stm32l4_ep_s *privep); +static inline void stm32l4_ep0out_receive(FAR struct stm32l4_ep_s *privep, int bcnt); +static inline void stm32l4_epout_receive(FAR struct stm32l4_ep_s *privep, int bcnt); +static void stm32l4_epout_request(FAR struct stm32l4_usbdev_s *priv, + FAR struct stm32l4_ep_s *privep); /* General request handling */ -static void stm32_ep_flush(FAR struct stm32_ep_s *privep); -static void stm32_req_complete(FAR struct stm32_ep_s *privep, +static void stm32l4_ep_flush(FAR struct stm32l4_ep_s *privep); +static void stm32l4_req_complete(FAR struct stm32l4_ep_s *privep, int16_t result); -static void stm32_req_cancel(FAR struct stm32_ep_s *privep, +static void stm32l4_req_cancel(FAR struct stm32l4_ep_s *privep, int16_t status); /* Interrupt handling **********************************************************/ -static struct stm32_ep_s *stm32_ep_findbyaddr(struct stm32_usbdev_s *priv, +static struct stm32l4_ep_s *stm32l4_ep_findbyaddr(struct stm32l4_usbdev_s *priv, uint16_t eplog); -static int stm32_req_dispatch(FAR struct stm32_usbdev_s *priv, +static int stm32l4_req_dispatch(FAR struct stm32l4_usbdev_s *priv, FAR const struct usb_ctrlreq_s *ctrl); -static void stm32_usbreset(FAR struct stm32_usbdev_s *priv); +static void stm32l4_usbreset(FAR struct stm32l4_usbdev_s *priv); /* Second level OUT endpoint interrupt processing */ -static inline void stm32_ep0out_testmode(FAR struct stm32_usbdev_s *priv, +static inline void stm32l4_ep0out_testmode(FAR struct stm32l4_usbdev_s *priv, uint16_t index); -static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv, - FAR struct stm32_ctrlreq_s *ctrlreq); -static inline void stm32_ep0out_setup(struct stm32_usbdev_s *priv); -static inline void stm32_epout(FAR struct stm32_usbdev_s *priv, +static inline void stm32l4_ep0out_stdrequest(struct stm32l4_usbdev_s *priv, + FAR struct stm32l4_ctrlreq_s *ctrlreq); +static inline void stm32l4_ep0out_setup(struct stm32l4_usbdev_s *priv); +static inline void stm32l4_epout(FAR struct stm32l4_usbdev_s *priv, uint8_t epno); -static inline void stm32_epout_interrupt(FAR struct stm32_usbdev_s *priv); +static inline void stm32l4_epout_interrupt(FAR struct stm32l4_usbdev_s *priv); /* Second level IN endpoint interrupt processing */ -static inline void stm32_epin_runtestmode(FAR struct stm32_usbdev_s *priv); -static inline void stm32_epin(FAR struct stm32_usbdev_s *priv, uint8_t epno); -static inline void stm32_epin_txfifoempty(FAR struct stm32_usbdev_s *priv, int epno); -static inline void stm32_epin_interrupt(FAR struct stm32_usbdev_s *priv); +static inline void stm32l4_epin_runtestmode(FAR struct stm32l4_usbdev_s *priv); +static inline void stm32l4_epin(FAR struct stm32l4_usbdev_s *priv, uint8_t epno); +static inline void stm32l4_epin_txfifoempty(FAR struct stm32l4_usbdev_s *priv, int epno); +static inline void stm32l4_epin_interrupt(FAR struct stm32l4_usbdev_s *priv); /* Other second level interrupt processing */ -static inline void stm32_resumeinterrupt(FAR struct stm32_usbdev_s *priv); -static inline void stm32_suspendinterrupt(FAR struct stm32_usbdev_s *priv); -static inline void stm32_rxinterrupt(FAR struct stm32_usbdev_s *priv); -static inline void stm32_enuminterrupt(FAR struct stm32_usbdev_s *priv); +static inline void stm32l4_resumeinterrupt(FAR struct stm32l4_usbdev_s *priv); +static inline void stm32l4_suspendinterrupt(FAR struct stm32l4_usbdev_s *priv); +static inline void stm32l4_rxinterrupt(FAR struct stm32l4_usbdev_s *priv); +static inline void stm32l4_enuminterrupt(FAR struct stm32l4_usbdev_s *priv); #ifdef CONFIG_USBDEV_ISOCHRONOUS -static inline void stm32_isocininterrupt(FAR struct stm32_usbdev_s *priv); -static inline void stm32_isocoutinterrupt(FAR struct stm32_usbdev_s *priv); +static inline void stm32l4_isocininterrupt(FAR struct stm32l4_usbdev_s *priv); +static inline void stm32l4_isocoutinterrupt(FAR struct stm32l4_usbdev_s *priv); #endif #ifdef CONFIG_USBDEV_VBUSSENSING -static inline void stm32_sessioninterrupt(FAR struct stm32_usbdev_s *priv); -static inline void stm32_otginterrupt(FAR struct stm32_usbdev_s *priv); +static inline void stm32l4_sessioninterrupt(FAR struct stm32l4_usbdev_s *priv); +static inline void stm32l4_otginterrupt(FAR struct stm32l4_usbdev_s *priv); #endif /* First level interrupt processing */ -static int stm32_usbinterrupt(int irq, FAR void *context); +static int stm32l4_usbinterrupt(int irq, FAR void *context); /* Endpoint operations *********************************************************/ /* Global OUT NAK controls */ -static void stm32_enablegonak(FAR struct stm32_ep_s *privep); -static void stm32_disablegonak(FAR struct stm32_ep_s *privep); +static void stm32l4_enablegonak(FAR struct stm32l4_ep_s *privep); +static void stm32l4_disablegonak(FAR struct stm32l4_ep_s *privep); /* Endpoint configuration */ -static int stm32_epout_configure(FAR struct stm32_ep_s *privep, +static int stm32l4_epout_configure(FAR struct stm32l4_ep_s *privep, uint8_t eptype, uint16_t maxpacket); -static int stm32_epin_configure(FAR struct stm32_ep_s *privep, +static int stm32l4_epin_configure(FAR struct stm32l4_ep_s *privep, uint8_t eptype, uint16_t maxpacket); -static int stm32_ep_configure(FAR struct usbdev_ep_s *ep, +static int stm32l4_ep_configure(FAR struct usbdev_ep_s *ep, FAR const struct usb_epdesc_s *desc, bool last); -static void stm32_ep0_configure(FAR struct stm32_usbdev_s *priv); +static void stm32l4_ep0_configure(FAR struct stm32l4_usbdev_s *priv); /* Endpoint disable */ -static void stm32_epout_disable(FAR struct stm32_ep_s *privep); -static void stm32_epin_disable(FAR struct stm32_ep_s *privep); -static int stm32_ep_disable(FAR struct usbdev_ep_s *ep); +static void stm32l4_epout_disable(FAR struct stm32l4_ep_s *privep); +static void stm32l4_epin_disable(FAR struct stm32l4_ep_s *privep); +static int stm32l4_ep_disable(FAR struct usbdev_ep_s *ep); /* Endpoint request management */ -static FAR struct usbdev_req_s *stm32_ep_allocreq(FAR struct usbdev_ep_s *ep); -static void stm32_ep_freereq(FAR struct usbdev_ep_s *ep, +static FAR struct usbdev_req_s *stm32l4_ep_allocreq(FAR struct usbdev_ep_s *ep); +static void stm32l4_ep_freereq(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *); /* Endpoint buffer management */ #ifdef CONFIG_USBDEV_DMA -static void *stm32_ep_allocbuffer(FAR struct usbdev_ep_s *ep, unsigned bytes); -static void stm32_ep_freebuffer(FAR struct usbdev_ep_s *ep, FAR void *buf); +static void *stm32l4_ep_allocbuffer(FAR struct usbdev_ep_s *ep, unsigned bytes); +static void stm32l4_ep_freebuffer(FAR struct usbdev_ep_s *ep, FAR void *buf); #endif /* Endpoint request submission */ -static int stm32_ep_submit(FAR struct usbdev_ep_s *ep, +static int stm32l4_ep_submit(FAR struct usbdev_ep_s *ep, struct usbdev_req_s *req); /* Endpoint request cancellation */ -static int stm32_ep_cancel(FAR struct usbdev_ep_s *ep, +static int stm32l4_ep_cancel(FAR struct usbdev_ep_s *ep, struct usbdev_req_s *req); /* Stall handling */ -static int stm32_epout_setstall(FAR struct stm32_ep_s *privep); -static int stm32_epin_setstall(FAR struct stm32_ep_s *privep); -static int stm32_ep_setstall(FAR struct stm32_ep_s *privep); -static int stm32_ep_clrstall(FAR struct stm32_ep_s *privep); -static int stm32_ep_stall(FAR struct usbdev_ep_s *ep, bool resume); -static void stm32_ep0_stall(FAR struct stm32_usbdev_s *priv); +static int stm32l4_epout_setstall(FAR struct stm32l4_ep_s *privep); +static int stm32l4_epin_setstall(FAR struct stm32l4_ep_s *privep); +static int stm32l4_ep_setstall(FAR struct stm32l4_ep_s *privep); +static int stm32l4_ep_clrstall(FAR struct stm32l4_ep_s *privep); +static int stm32l4_ep_stall(FAR struct usbdev_ep_s *ep, bool resume); +static void stm32l4_ep0_stall(FAR struct stm32l4_usbdev_s *priv); /* Endpoint allocation */ -static FAR struct usbdev_ep_s *stm32_ep_alloc(FAR struct usbdev_s *dev, +static FAR struct usbdev_ep_s *stm32l4_ep_alloc(FAR struct usbdev_s *dev, uint8_t epno, bool in, uint8_t eptype); -static void stm32_ep_free(FAR struct usbdev_s *dev, +static void stm32l4_ep_free(FAR struct usbdev_s *dev, FAR struct usbdev_ep_s *ep); /* USB device controller operations ********************************************/ -static int stm32_getframe(struct usbdev_s *dev); -static int stm32_wakeup(struct usbdev_s *dev); -static int stm32_selfpowered(struct usbdev_s *dev, bool selfpowered); -static int stm32_pullup(struct usbdev_s *dev, bool enable); -static void stm32_setaddress(struct stm32_usbdev_s *priv, +static int stm32l4_getframe(struct usbdev_s *dev); +static int stm32l4_wakeup(struct usbdev_s *dev); +static int stm32l4_selfpowered(struct usbdev_s *dev, bool selfpowered); +static int stm32l4_pullup(struct usbdev_s *dev, bool enable); +static void stm32l4_setaddress(struct stm32l4_usbdev_s *priv, uint16_t address); -static int stm32_txfifo_flush(uint32_t txfnum); -static int stm32_rxfifo_flush(void); +static int stm32l4_txfifo_flush(uint32_t txfnum); +static int stm32l4_rxfifo_flush(void); /* Initialization **************************************************************/ -static void stm32_swinitialize(FAR struct stm32_usbdev_s *priv); -static void stm32_hwinitialize(FAR struct stm32_usbdev_s *priv); +static void stm32l4_swinitialize(FAR struct stm32l4_usbdev_s *priv); +static void stm32l4_hwinitialize(FAR struct stm32l4_usbdev_s *priv); /**************************************************************************** * Private Data @@ -743,31 +743,31 @@ static void stm32_hwinitialize(FAR struct stm32_usbdev_s *priv); * be simply retained in a single global instance. */ -static struct stm32_usbdev_s g_otgfsdev; +static struct stm32l4_usbdev_s g_otgfsdev; static const struct usbdev_epops_s g_epops = { - .configure = stm32_ep_configure, - .disable = stm32_ep_disable, - .allocreq = stm32_ep_allocreq, - .freereq = stm32_ep_freereq, + .configure = stm32l4_ep_configure, + .disable = stm32l4_ep_disable, + .allocreq = stm32l4_ep_allocreq, + .freereq = stm32l4_ep_freereq, #ifdef CONFIG_USBDEV_DMA - .allocbuffer = stm32_ep_allocbuffer, - .freebuffer = stm32_ep_freebuffer, + .allocbuffer = stm32l4_ep_allocbuffer, + .freebuffer = stm32l4_ep_freebuffer, #endif - .submit = stm32_ep_submit, - .cancel = stm32_ep_cancel, - .stall = stm32_ep_stall, + .submit = stm32l4_ep_submit, + .cancel = stm32l4_ep_cancel, + .stall = stm32l4_ep_stall, }; static const struct usbdev_ops_s g_devops = { - .allocep = stm32_ep_alloc, - .freeep = stm32_ep_free, - .getframe = stm32_getframe, - .wakeup = stm32_wakeup, - .selfpowered = stm32_selfpowered, - .pullup = stm32_pullup, + .allocep = stm32l4_ep_alloc, + .freeep = stm32l4_ep_free, + .getframe = stm32l4_getframe, + .wakeup = stm32l4_wakeup, + .selfpowered = stm32l4_selfpowered, + .pullup = stm32l4_pullup, }; /* Device error strings that may be enabled for more descriptive USB trace @@ -777,37 +777,37 @@ static const struct usbdev_ops_s g_devops = #ifdef CONFIG_USBDEV_TRACE_STRINGS const struct trace_msg_t g_usb_trace_strings_deverror[] = { - TRACE_STR(STM32_TRACEERR_ALLOCFAIL ), - TRACE_STR(STM32_TRACEERR_BADCLEARFEATURE ), - TRACE_STR(STM32_TRACEERR_BADDEVGETSTATUS ), - TRACE_STR(STM32_TRACEERR_BADEPNO ), - TRACE_STR(STM32_TRACEERR_BADEPGETSTATUS ), - TRACE_STR(STM32_TRACEERR_BADGETCONFIG ), - TRACE_STR(STM32_TRACEERR_BADGETSETDESC ), - TRACE_STR(STM32_TRACEERR_BADGETSTATUS ), - TRACE_STR(STM32_TRACEERR_BADSETADDRESS ), - TRACE_STR(STM32_TRACEERR_BADSETCONFIG ), - TRACE_STR(STM32_TRACEERR_BADSETFEATURE ), - TRACE_STR(STM32_TRACEERR_BADTESTMODE ), - TRACE_STR(STM32_TRACEERR_BINDFAILED ), - TRACE_STR(STM32_TRACEERR_DISPATCHSTALL ), - TRACE_STR(STM32_TRACEERR_DRIVER ), - TRACE_STR(STM32_TRACEERR_DRIVERREGISTERED), - TRACE_STR(STM32_TRACEERR_EP0NOSETUP ), - TRACE_STR(STM32_TRACEERR_EP0SETUPSTALLED ), - TRACE_STR(STM32_TRACEERR_EPINNULLPACKET ), - TRACE_STR(STM32_TRACEERR_EPINUNEXPECTED ), - TRACE_STR(STM32_TRACEERR_EPOUTNULLPACKET ), - TRACE_STR(STM32_TRACEERR_EPOUTUNEXPECTED ), - TRACE_STR(STM32_TRACEERR_INVALIDCTRLREQ ), - TRACE_STR(STM32_TRACEERR_INVALIDPARMS ), - TRACE_STR(STM32_TRACEERR_IRQREGISTRATION ), - TRACE_STR(STM32_TRACEERR_NOEP ), - TRACE_STR(STM32_TRACEERR_NOTCONFIGURED ), - TRACE_STR(STM32_TRACEERR_EPOUTQEMPTY ), - TRACE_STR(STM32_TRACEERR_EPINREQEMPTY ), - TRACE_STR(STM32_TRACEERR_NOOUTSETUP ), - TRACE_STR(STM32_TRACEERR_POLLTIMEOUT ), + TRACE_STR(STM32L4_TRACEERR_ALLOCFAIL ), + TRACE_STR(STM32L4_TRACEERR_BADCLEARFEATURE ), + TRACE_STR(STM32L4_TRACEERR_BADDEVGETSTATUS ), + TRACE_STR(STM32L4_TRACEERR_BADEPNO ), + TRACE_STR(STM32L4_TRACEERR_BADEPGETSTATUS ), + TRACE_STR(STM32L4_TRACEERR_BADGETCONFIG ), + TRACE_STR(STM32L4_TRACEERR_BADGETSETDESC ), + TRACE_STR(STM32L4_TRACEERR_BADGETSTATUS ), + TRACE_STR(STM32L4_TRACEERR_BADSETADDRESS ), + TRACE_STR(STM32L4_TRACEERR_BADSETCONFIG ), + TRACE_STR(STM32L4_TRACEERR_BADSETFEATURE ), + TRACE_STR(STM32L4_TRACEERR_BADTESTMODE ), + TRACE_STR(STM32L4_TRACEERR_BINDFAILED ), + TRACE_STR(STM32L4_TRACEERR_DISPATCHSTALL ), + TRACE_STR(STM32L4_TRACEERR_DRIVER ), + TRACE_STR(STM32L4_TRACEERR_DRIVERREGISTERED), + TRACE_STR(STM32L4_TRACEERR_EP0NOSETUP ), + TRACE_STR(STM32L4_TRACEERR_EP0SETUPSTALLED ), + TRACE_STR(STM32L4_TRACEERR_EPINNULLPACKET ), + TRACE_STR(STM32L4_TRACEERR_EPINUNEXPECTED ), + TRACE_STR(STM32L4_TRACEERR_EPOUTNULLPACKET ), + TRACE_STR(STM32L4_TRACEERR_EPOUTUNEXPECTED ), + TRACE_STR(STM32L4_TRACEERR_INVALIDCTRLREQ ), + TRACE_STR(STM32L4_TRACEERR_INVALIDPARMS ), + TRACE_STR(STM32L4_TRACEERR_IRQREGISTRATION ), + TRACE_STR(STM32L4_TRACEERR_NOEP ), + TRACE_STR(STM32L4_TRACEERR_NOTCONFIGURED ), + TRACE_STR(STM32L4_TRACEERR_EPOUTQEMPTY ), + TRACE_STR(STM32L4_TRACEERR_EPINREQEMPTY ), + TRACE_STR(STM32L4_TRACEERR_NOOUTSETUP ), + TRACE_STR(STM32L4_TRACEERR_POLLTIMEOUT ), TRACE_STR_END }; #endif @@ -819,48 +819,48 @@ const struct trace_msg_t g_usb_trace_strings_deverror[] = #ifdef CONFIG_USBDEV_TRACE_STRINGS const struct trace_msg_t g_usb_trace_strings_intdecode[] = { - TRACE_STR(STM32_TRACEINTID_USB ), - TRACE_STR(STM32_TRACEINTID_INTPENDING ), - TRACE_STR(STM32_TRACEINTID_EPOUT ), - TRACE_STR(STM32_TRACEINTID_EPIN ), - TRACE_STR(STM32_TRACEINTID_MISMATCH ), - TRACE_STR(STM32_TRACEINTID_WAKEUP ), - TRACE_STR(STM32_TRACEINTID_SUSPEND ), - TRACE_STR(STM32_TRACEINTID_SOF ), - TRACE_STR(STM32_TRACEINTID_RXFIFO ), - TRACE_STR(STM32_TRACEINTID_DEVRESET ), - TRACE_STR(STM32_TRACEINTID_ENUMDNE ), - TRACE_STR(STM32_TRACEINTID_IISOIXFR ), - TRACE_STR(STM32_TRACEINTID_IISOOXFR ), - TRACE_STR(STM32_TRACEINTID_SRQ ), - TRACE_STR(STM32_TRACEINTID_OTG ), - TRACE_STR(STM32_TRACEINTID_EPOUT_XFRC ), - TRACE_STR(STM32_TRACEINTID_EPOUT_EPDISD), - TRACE_STR(STM32_TRACEINTID_EPOUT_SETUP ), - TRACE_STR(STM32_TRACEINTID_DISPATCH ), - TRACE_STR(STM32_TRACEINTID_GETSTATUS ), - TRACE_STR(STM32_TRACEINTID_EPGETSTATUS ), - TRACE_STR(STM32_TRACEINTID_DEVGETSTATUS), - TRACE_STR(STM32_TRACEINTID_IFGETSTATUS ), - TRACE_STR(STM32_TRACEINTID_CLEARFEATURE), - TRACE_STR(STM32_TRACEINTID_SETFEATURE ), - TRACE_STR(STM32_TRACEINTID_SETADDRESS ), - TRACE_STR(STM32_TRACEINTID_GETSETDESC ), - TRACE_STR(STM32_TRACEINTID_GETCONFIG ), - TRACE_STR(STM32_TRACEINTID_SETCONFIG ), - TRACE_STR(STM32_TRACEINTID_GETSETIF ), - TRACE_STR(STM32_TRACEINTID_SYNCHFRAME ), - TRACE_STR(STM32_TRACEINTID_EPIN_XFRC ), - TRACE_STR(STM32_TRACEINTID_EPIN_TOC ), - TRACE_STR(STM32_TRACEINTID_EPIN_ITTXFE ), - TRACE_STR(STM32_TRACEINTID_EPIN_EPDISD ), - TRACE_STR(STM32_TRACEINTID_EPIN_TXFE ), - TRACE_STR(STM32_TRACEINTID_EPIN_EMPWAIT), - TRACE_STR(STM32_TRACEINTID_OUTNAK ), - TRACE_STR(STM32_TRACEINTID_OUTRECVD ), - TRACE_STR(STM32_TRACEINTID_OUTDONE ), - TRACE_STR(STM32_TRACEINTID_SETUPDONE ), - TRACE_STR(STM32_TRACEINTID_SETUPRECVD ), + TRACE_STR(STM32L4_TRACEINTID_USB ), + TRACE_STR(STM32L4_TRACEINTID_INTPENDING ), + TRACE_STR(STM32L4_TRACEINTID_EPOUT ), + TRACE_STR(STM32L4_TRACEINTID_EPIN ), + TRACE_STR(STM32L4_TRACEINTID_MISMATCH ), + TRACE_STR(STM32L4_TRACEINTID_WAKEUP ), + TRACE_STR(STM32L4_TRACEINTID_SUSPEND ), + TRACE_STR(STM32L4_TRACEINTID_SOF ), + TRACE_STR(STM32L4_TRACEINTID_RXFIFO ), + TRACE_STR(STM32L4_TRACEINTID_DEVRESET ), + TRACE_STR(STM32L4_TRACEINTID_ENUMDNE ), + TRACE_STR(STM32L4_TRACEINTID_IISOIXFR ), + TRACE_STR(STM32L4_TRACEINTID_IISOOXFR ), + TRACE_STR(STM32L4_TRACEINTID_SRQ ), + TRACE_STR(STM32L4_TRACEINTID_OTG ), + TRACE_STR(STM32L4_TRACEINTID_EPOUT_XFRC ), + TRACE_STR(STM32L4_TRACEINTID_EPOUT_EPDISD), + TRACE_STR(STM32L4_TRACEINTID_EPOUT_SETUP ), + TRACE_STR(STM32L4_TRACEINTID_DISPATCH ), + TRACE_STR(STM32L4_TRACEINTID_GETSTATUS ), + TRACE_STR(STM32L4_TRACEINTID_EPGETSTATUS ), + TRACE_STR(STM32L4_TRACEINTID_DEVGETSTATUS), + TRACE_STR(STM32L4_TRACEINTID_IFGETSTATUS ), + TRACE_STR(STM32L4_TRACEINTID_CLEARFEATURE), + TRACE_STR(STM32L4_TRACEINTID_SETFEATURE ), + TRACE_STR(STM32L4_TRACEINTID_SETADDRESS ), + TRACE_STR(STM32L4_TRACEINTID_GETSETDESC ), + TRACE_STR(STM32L4_TRACEINTID_GETCONFIG ), + TRACE_STR(STM32L4_TRACEINTID_SETCONFIG ), + TRACE_STR(STM32L4_TRACEINTID_GETSETIF ), + TRACE_STR(STM32L4_TRACEINTID_SYNCHFRAME ), + TRACE_STR(STM32L4_TRACEINTID_EPIN_XFRC ), + TRACE_STR(STM32L4_TRACEINTID_EPIN_TOC ), + TRACE_STR(STM32L4_TRACEINTID_EPIN_ITTXFE ), + TRACE_STR(STM32L4_TRACEINTID_EPIN_EPDISD ), + TRACE_STR(STM32L4_TRACEINTID_EPIN_TXFE ), + TRACE_STR(STM32L4_TRACEINTID_EPIN_EMPWAIT), + TRACE_STR(STM32L4_TRACEINTID_OUTNAK ), + TRACE_STR(STM32L4_TRACEINTID_OUTRECVD ), + TRACE_STR(STM32L4_TRACEINTID_OUTDONE ), + TRACE_STR(STM32L4_TRACEINTID_SETUPDONE ), + TRACE_STR(STM32L4_TRACEINTID_SETUPRECVD ), TRACE_STR_END }; #endif @@ -874,15 +874,15 @@ const struct trace_msg_t g_usb_trace_strings_intdecode[] = ****************************************************************************/ /**************************************************************************** - * Name: stm32_getreg + * Name: stm32l4_getreg * * Description: * Get the contents of an STM32 register * ****************************************************************************/ -#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_USB) -static uint32_t stm32_getreg(uint32_t addr) +#if defined(CONFIG_STM32L4_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_USB) +static uint32_t stm32l4_getreg(uint32_t addr) { static uint32_t prevaddr = 0; static uint32_t preval = 0; @@ -937,15 +937,15 @@ static uint32_t stm32_getreg(uint32_t addr) #endif /**************************************************************************** - * Name: stm32_putreg + * Name: stm32l4_putreg * * Description: * Set the contents of an STM32 register to a value * ****************************************************************************/ -#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_USB) -static void stm32_putreg(uint32_t val, uint32_t addr) +#if defined(CONFIG_STM32L4_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_USB) +static void stm32l4_putreg(uint32_t val, uint32_t addr) { /* Show the register value being written */ @@ -958,16 +958,16 @@ static void stm32_putreg(uint32_t val, uint32_t addr) #endif /**************************************************************************** - * Name: stm32_req_remfirst + * Name: stm32l4_req_remfirst * * Description: * Remove a request from the head of an endpoint request queue * ****************************************************************************/ -static FAR struct stm32_req_s *stm32_req_remfirst(FAR struct stm32_ep_s *privep) +static FAR struct stm32l4_req_s *stm32l4_req_remfirst(FAR struct stm32l4_ep_s *privep) { - FAR struct stm32_req_s *ret = privep->head; + FAR struct stm32l4_req_s *ret = privep->head; if (ret) { @@ -984,15 +984,15 @@ static FAR struct stm32_req_s *stm32_req_remfirst(FAR struct stm32_ep_s *privep) } /**************************************************************************** - * Name: stm32_req_addlast + * Name: stm32l4_req_addlast * * Description: * Add a request to the end of an endpoint request queue * ****************************************************************************/ -static bool stm32_req_addlast(FAR struct stm32_ep_s *privep, - FAR struct stm32_req_s *req) +static bool stm32l4_req_addlast(FAR struct stm32l4_ep_s *privep, + FAR struct stm32l4_req_s *req) { bool is_empty = !privep->head; @@ -1011,49 +1011,49 @@ static bool stm32_req_addlast(FAR struct stm32_ep_s *privep, } /**************************************************************************** - * Name: stm32_ep0in_setupresponse + * Name: stm32l4_ep0in_setupresponse * * Description: * Schedule a short transfer on Endpoint 0 (IN or OUT) * ****************************************************************************/ -static void stm32_ep0in_setupresponse(FAR struct stm32_usbdev_s *priv, +static void stm32l4_ep0in_setupresponse(FAR struct stm32l4_usbdev_s *priv, FAR uint8_t *buf, uint32_t nbytes) { - stm32_epin_transfer(&priv->epin[EP0], buf, nbytes); + stm32l4_epin_transfer(&priv->epin[EP0], buf, nbytes); priv->ep0state = EP0STATE_SETUPRESPONSE; - stm32_ep0out_ctrlsetup(priv); + stm32l4_ep0out_ctrlsetup(priv); } /**************************************************************************** - * Name: stm32_ep0in_transmitzlp + * Name: stm32l4_ep0in_transmitzlp * * Description: * Send a zero length packet (ZLP) on endpoint 0 IN * ****************************************************************************/ -static inline void stm32_ep0in_transmitzlp(FAR struct stm32_usbdev_s *priv) +static inline void stm32l4_ep0in_transmitzlp(FAR struct stm32l4_usbdev_s *priv) { - stm32_ep0in_setupresponse(priv, NULL, 0); + stm32l4_ep0in_setupresponse(priv, NULL, 0); } /**************************************************************************** - * Name: stm32_ep0in_activate + * Name: stm32l4_ep0in_activate * * Description: * Activate the endpoint 0 IN endpoint. * ****************************************************************************/ -static void stm32_ep0in_activate(void) +static void stm32l4_ep0in_activate(void) { uint32_t regval; /* Set the max packet size of the IN EP. */ - regval = stm32_getreg(STM32_OTGFS_DIEPCTL0); + regval = stm32l4_getreg(STM32L4_OTGFS_DIEPCTL0); regval &= ~OTGFS_DIEPCTL0_MPSIZ_MASK; #if CONFIG_USBDEV_EP0_MAXSIZE == 8 @@ -1068,24 +1068,24 @@ static void stm32_ep0in_activate(void) # error "Unsupported value of CONFIG_USBDEV_EP0_MAXSIZE" #endif - stm32_putreg(regval, STM32_OTGFS_DIEPCTL0); + stm32l4_putreg(regval, STM32L4_OTGFS_DIEPCTL0); /* Clear global IN NAK */ - regval = stm32_getreg(STM32_OTGFS_DCTL); + regval = stm32l4_getreg(STM32L4_OTGFS_DCTL); regval |= OTGFS_DCTL_CGINAK; - stm32_putreg(regval, STM32_OTGFS_DCTL); + stm32l4_putreg(regval, STM32L4_OTGFS_DCTL); } /**************************************************************************** - * Name: stm32_ep0out_ctrlsetup + * Name: stm32l4_ep0out_ctrlsetup * * Description: * Setup to receive a SETUP packet. * ****************************************************************************/ -static void stm32_ep0out_ctrlsetup(FAR struct stm32_usbdev_s *priv) +static void stm32l4_ep0out_ctrlsetup(FAR struct stm32l4_usbdev_s *priv) { uint32_t regval; @@ -1094,24 +1094,24 @@ static void stm32_ep0out_ctrlsetup(FAR struct stm32_usbdev_s *priv) regval = (USB_SIZEOF_CTRLREQ * 3 << OTGFS_DOEPTSIZ0_XFRSIZ_SHIFT) | (OTGFS_DOEPTSIZ0_PKTCNT) | (3 << OTGFS_DOEPTSIZ0_STUPCNT_SHIFT); - stm32_putreg(regval, STM32_OTGFS_DOEPTSIZ0); + stm32l4_putreg(regval, STM32L4_OTGFS_DOEPTSIZ0); /* Then clear NAKing and enable the transfer */ - regval = stm32_getreg(STM32_OTGFS_DOEPCTL0); + regval = stm32l4_getreg(STM32L4_OTGFS_DOEPCTL0); regval |= (OTGFS_DOEPCTL0_CNAK | OTGFS_DOEPCTL0_EPENA); - stm32_putreg(regval, STM32_OTGFS_DOEPCTL0); + stm32l4_putreg(regval, STM32L4_OTGFS_DOEPCTL0); } /**************************************************************************** - * Name: stm32_txfifo_write + * Name: stm32l4_txfifo_write * * Description: * Send data to the endpoint's TxFIFO. * ****************************************************************************/ -static void stm32_txfifo_write(FAR struct stm32_ep_s *privep, +static void stm32l4_txfifo_write(FAR struct stm32l4_ep_s *privep, FAR uint8_t *buf, int nbytes) { uint32_t regaddr; @@ -1127,7 +1127,7 @@ static void stm32_txfifo_write(FAR struct stm32_ep_s *privep, /* Get the TxFIFO for this endpoint (same as the endpoint number) */ - regaddr = STM32_OTGFS_DFIFO_DEP(privep->epphy); + regaddr = STM32L4_OTGFS_DFIFO_DEP(privep->epphy); /* Then transfer each word to the TxFIFO */ @@ -1144,19 +1144,19 @@ static void stm32_txfifo_write(FAR struct stm32_ep_s *privep, /* Then write the packet data to the TxFIFO */ - stm32_putreg(regval, regaddr); + stm32l4_putreg(regval, regaddr); } } /**************************************************************************** - * Name: stm32_epin_transfer + * Name: stm32l4_epin_transfer * * Description: * Start the Tx data transfer * ****************************************************************************/ -static void stm32_epin_transfer(FAR struct stm32_ep_s *privep, +static void stm32l4_epin_transfer(FAR struct stm32l4_ep_s *privep, FAR uint8_t *buf, int nbytes) { uint32_t pktcnt; @@ -1164,7 +1164,7 @@ static void stm32_epin_transfer(FAR struct stm32_ep_s *privep, /* Read the DIEPSIZx register */ - regval = stm32_getreg(STM32_OTGFS_DIEPTSIZ(privep->epphy)); + regval = stm32l4_getreg(STM32L4_OTGFS_DIEPTSIZ(privep->epphy)); /* Clear the XFRSIZ, PKTCNT, and MCNT field of the DIEPSIZx register */ @@ -1207,11 +1207,11 @@ static void stm32_epin_transfer(FAR struct stm32_ep_s *privep, /* Save DIEPSIZx register value */ - stm32_putreg(regval, STM32_OTGFS_DIEPTSIZ(privep->epphy)); + stm32l4_putreg(regval, STM32L4_OTGFS_DIEPTSIZ(privep->epphy)); /* Read the DIEPCTLx register */ - regval = stm32_getreg(STM32_OTGFS_DIEPCTL(privep->epphy)); + regval = stm32l4_getreg(STM32L4_OTGFS_DIEPCTL(privep->epphy)); /* If this is an isochronous endpoint, then set the even/odd frame bit * the DIEPCTLx register. @@ -1223,7 +1223,7 @@ static void stm32_epin_transfer(FAR struct stm32_ep_s *privep, * even/odd frame to match. */ - uint32_t status = stm32_getreg(STM32_OTGFS_DSTS); + uint32_t status = stm32l4_getreg(STM32L4_OTGFS_DSTS); if ((status & OTGFS_DSTS_SOFFN0) == OTGFS_DSTS_SOFFN_EVEN) { regval |= OTGFS_DIEPCTL_SEVNFRM; @@ -1238,28 +1238,28 @@ static void stm32_epin_transfer(FAR struct stm32_ep_s *privep, regval &= ~OTGFS_DIEPCTL_EPDIS; regval |= (OTGFS_DIEPCTL_CNAK | OTGFS_DIEPCTL_EPENA); - stm32_putreg(regval, STM32_OTGFS_DIEPCTL(privep->epphy)); + stm32l4_putreg(regval, STM32L4_OTGFS_DIEPCTL(privep->epphy)); /* Transfer the data to the TxFIFO. At this point, the caller has already * assured that there is sufficient space in the TxFIFO to hold the transfer * we can just blindly continue. */ - stm32_txfifo_write(privep, buf, nbytes); + stm32l4_txfifo_write(privep, buf, nbytes); } /**************************************************************************** - * Name: stm32_epin_request + * Name: stm32l4_epin_request * * Description: * Begin or continue write request processing. * ****************************************************************************/ -static void stm32_epin_request(FAR struct stm32_usbdev_s *priv, - FAR struct stm32_ep_s *privep) +static void stm32l4_epin_request(FAR struct stm32l4_usbdev_s *priv, + FAR struct stm32l4_ep_s *privep) { - struct stm32_req_s *privreq; + struct stm32l4_req_s *privreq; uint32_t regaddr; uint32_t regval; uint8_t *buf; @@ -1270,27 +1270,27 @@ static void stm32_epin_request(FAR struct stm32_usbdev_s *priv, /* We get here in one of four possible ways. From three interrupting * events: * - * 1. From stm32_epin as part of the transfer complete interrupt processing + * 1. From stm32l4_epin as part of the transfer complete interrupt processing * This interrupt indicates that the last transfer has completed. * 2. As part of the ITTXFE interrupt processing. That interrupt indicates * that an IN token was received when the associated TxFIFO was empty. - * 3. From stm32_epin_txfifoempty as part of the TXFE interrupt processing. + * 3. From stm32l4_epin_txfifoempty as part of the TXFE interrupt processing. * The TXFE interrupt is only enabled when the TxFIFO is full and the * software must wait for space to become available in the TxFIFO. * * And this function may be called immediately when the write request is * queue to start up the next transaction. * - * 4. From stm32_ep_submit when a new write request is received WHILE the + * 4. From stm32l4_ep_submit when a new write request is received WHILE the * endpoint is not active (privep->active == false). */ /* Check the request from the head of the endpoint request queue */ - privreq = stm32_rqpeek(privep); + privreq = stm32l4_rqpeek(privep); if (!privreq) { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_EPINREQEMPTY), privep->epphy); + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_EPINREQEMPTY), privep->epphy); /* There is no TX transfer in progress and no new pending TX * requests to send. To stop transmitting any data on a particular @@ -1298,10 +1298,10 @@ static void stm32_epin_request(FAR struct stm32_usbdev_s *priv, * bit, the following field must be programmed. */ - regaddr = STM32_OTGFS_DIEPCTL(privep->epphy); - regval = stm32_getreg(regaddr); + regaddr = STM32L4_OTGFS_DIEPCTL(privep->epphy); + regval = stm32l4_getreg(regaddr); regval |= OTGFS_DIEPCTL_SNAK; - stm32_putreg(regval, regaddr); + stm32l4_putreg(regval, regaddr); /* The endpoint is no longer active */ @@ -1401,25 +1401,25 @@ static void stm32_epin_request(FAR struct stm32_usbdev_s *priv, * n: n words available */ - regaddr = STM32_OTGFS_DTXFSTS(privep->epphy); + regaddr = STM32L4_OTGFS_DTXFSTS(privep->epphy); /* Check for space in the TxFIFO. If space in the TxFIFO is not * available, then set up an interrupt to resume the transfer when * the TxFIFO is empty. */ - regval = stm32_getreg(regaddr); + regval = stm32l4_getreg(regaddr); if ((int)(regval & OTGFS_DTXFSTS_MASK) < nwords) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPIN_EMPWAIT), (uint16_t)regval); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_EPIN_EMPWAIT), (uint16_t)regval); /* There is insufficient space in the TxFIFO. Wait for a TxFIFO * empty interrupt and try again. */ - uint32_t empmsk = stm32_getreg(STM32_OTGFS_DIEPEMPMSK); + uint32_t empmsk = stm32l4_getreg(STM32L4_OTGFS_DIEPEMPMSK); empmsk |= OTGFS_DIEPEMPMSK(privep->epphy); - stm32_putreg(empmsk, STM32_OTGFS_DIEPEMPMSK); + stm32l4_putreg(empmsk, STM32L4_OTGFS_DIEPEMPMSK); /* Terminate the transfer. We will try again when the TxFIFO empty * interrupt is received. @@ -1431,7 +1431,7 @@ static void stm32_epin_request(FAR struct stm32_usbdev_s *priv, /* Transfer data to the TxFIFO */ buf = privreq->req.buf + privreq->req.xfrd; - stm32_epin_transfer(privep, buf, nbytes); + stm32l4_epin_transfer(privep, buf, nbytes); /* If it was not before, the OUT endpoint is now actively transferring * data. @@ -1464,19 +1464,19 @@ static void stm32_epin_request(FAR struct stm32_usbdev_s *priv, * yet completed). */ - stm32_req_complete(privep, OK); + stm32l4_req_complete(privep, OK); } } /**************************************************************************** - * Name: stm32_rxfifo_read + * Name: stm32l4_rxfifo_read * * Description: * Read packet from the RxFIFO into a read request. * ****************************************************************************/ -static void stm32_rxfifo_read(FAR struct stm32_ep_s *privep, +static void stm32l4_rxfifo_read(FAR struct stm32l4_ep_s *privep, FAR uint8_t *dest, uint16_t len) { uint32_t regaddr; @@ -1486,7 +1486,7 @@ static void stm32_rxfifo_read(FAR struct stm32_ep_s *privep, * we might as well use the address associated with EP0. */ - regaddr = STM32_OTGFS_DFIFO_DEP(EP0); + regaddr = STM32L4_OTGFS_DFIFO_DEP(EP0); /* Read 32-bits and write 4 x 8-bits at time (to avoid unaligned accesses) */ @@ -1500,7 +1500,7 @@ static void stm32_rxfifo_read(FAR struct stm32_ep_s *privep, /* Read 1 x 32-bits of EP0 packet data */ - data.w = stm32_getreg(regaddr); + data.w = stm32l4_getreg(regaddr); /* Write 4 x 8-bits of EP0 packet data */ @@ -1514,14 +1514,14 @@ static void stm32_rxfifo_read(FAR struct stm32_ep_s *privep, } /**************************************************************************** - * Name: stm32_rxfifo_discard + * Name: stm32l4_rxfifo_discard * * Description: * Discard packet data from the RxFIFO. * ****************************************************************************/ -static void stm32_rxfifo_discard(FAR struct stm32_ep_s *privep, int len) +static void stm32l4_rxfifo_discard(FAR struct stm32l4_ep_s *privep, int len) { if (len > 0) { @@ -1532,13 +1532,13 @@ static void stm32_rxfifo_discard(FAR struct stm32_ep_s *privep, int len) * we might as well use the address associated with EP0. */ - regaddr = STM32_OTGFS_DFIFO_DEP(EP0); + regaddr = STM32L4_OTGFS_DFIFO_DEP(EP0); /* Read 32-bits at time */ for (i = 0; i < len; i += 4) { - volatile uint32_t data = stm32_getreg(regaddr); + volatile uint32_t data = stm32l4_getreg(regaddr); (void)data; } @@ -1547,7 +1547,7 @@ static void stm32_rxfifo_discard(FAR struct stm32_ep_s *privep, int len) } /**************************************************************************** - * Name: stm32_epout_complete + * Name: stm32l4_epout_complete * * Description: * This function is called when an OUT transfer complete interrupt is @@ -1556,16 +1556,16 @@ static void stm32_rxfifo_discard(FAR struct stm32_ep_s *privep, int len) * ****************************************************************************/ -static void stm32_epout_complete(FAR struct stm32_usbdev_s *priv, - FAR struct stm32_ep_s *privep) +static void stm32l4_epout_complete(FAR struct stm32l4_usbdev_s *priv, + FAR struct stm32l4_ep_s *privep) { - struct stm32_req_s *privreq; + struct stm32l4_req_s *privreq; /* Since a transfer just completed, there must be a read request at the head of * the endpoint request queue. */ - privreq = stm32_rqpeek(privep); + privreq = stm32l4_rqpeek(privep); DEBUGASSERT(privreq); if (!privreq) @@ -1574,7 +1574,7 @@ static void stm32_epout_complete(FAR struct stm32_usbdev_s *priv, * should not happen. */ - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_EPOUTQEMPTY), privep->epphy); + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_EPOUTQEMPTY), privep->epphy); privep->active = false; return; } @@ -1587,16 +1587,16 @@ static void stm32_epout_complete(FAR struct stm32_usbdev_s *priv, */ usbtrace(TRACE_COMPLETE(privep->epphy), privreq->req.xfrd); - stm32_req_complete(privep, OK); + stm32l4_req_complete(privep, OK); privep->active = false; /* Now set up the next read request (if any) */ - stm32_epout_request(priv, privep); + stm32l4_epout_request(priv, privep); } /**************************************************************************** - * Name: stm32_ep0out_receive + * Name: stm32l4_ep0out_receive * * Description: * This function is called from the RXFLVL interrupt handler when new incoming @@ -1605,14 +1605,14 @@ static void stm32_epout_complete(FAR struct stm32_usbdev_s *priv, * ****************************************************************************/ -static inline void stm32_ep0out_receive(FAR struct stm32_ep_s *privep, int bcnt) +static inline void stm32l4_ep0out_receive(FAR struct stm32l4_ep_s *privep, int bcnt) { - FAR struct stm32_usbdev_s *priv; + FAR struct stm32l4_usbdev_s *priv; /* Sanity Checking */ DEBUGASSERT(privep && privep->ep.priv); - priv = (FAR struct stm32_usbdev_s *)privep->ep.priv; + priv = (FAR struct stm32l4_usbdev_s *)privep->ep.priv; uinfo("EP0: bcnt=%d\n", bcnt); usbtrace(TRACE_READ(EP0), bcnt); @@ -1626,11 +1626,11 @@ static inline void stm32_ep0out_receive(FAR struct stm32_ep_s *privep, int bcnt) /* Read the data into our special buffer for SETUP data */ int readlen = MIN(CONFIG_USBDEV_SETUP_MAXDATASIZE, bcnt); - stm32_rxfifo_read(privep, priv->ep0data, readlen); + stm32l4_rxfifo_read(privep, priv->ep0data, readlen); /* Do we have to discard any excess bytes? */ - stm32_rxfifo_discard(privep, bcnt - readlen); + stm32l4_rxfifo_discard(privep, bcnt - readlen); /* Now we can process the setup command */ @@ -1638,7 +1638,7 @@ static inline void stm32_ep0out_receive(FAR struct stm32_ep_s *privep, int bcnt) priv->ep0state = EP0STATE_SETUP_READY; priv->ep0datlen = readlen; - stm32_ep0out_setup(priv); + stm32l4_ep0out_setup(priv); } else { @@ -1647,14 +1647,14 @@ static inline void stm32_ep0out_receive(FAR struct stm32_ep_s *privep, int bcnt) * does not become constipated. */ - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_NOOUTSETUP), priv->ep0state); - stm32_rxfifo_discard(privep, bcnt); + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_NOOUTSETUP), priv->ep0state); + stm32l4_rxfifo_discard(privep, bcnt); privep->active = false; } } /**************************************************************************** - * Name: stm32_epout_receive + * Name: stm32l4_epout_receive * * Description: * This function is called from the RXFLVL interrupt handler when new incoming @@ -1663,9 +1663,9 @@ static inline void stm32_ep0out_receive(FAR struct stm32_ep_s *privep, int bcnt) * ****************************************************************************/ -static inline void stm32_epout_receive(FAR struct stm32_ep_s *privep, int bcnt) +static inline void stm32l4_epout_receive(FAR struct stm32l4_ep_s *privep, int bcnt) { - struct stm32_req_s *privreq; + struct stm32l4_req_s *privreq; uint8_t *dest; int buflen; int readlen; @@ -1674,7 +1674,7 @@ static inline void stm32_epout_receive(FAR struct stm32_ep_s *privep, int bcnt) * queue. */ - privreq = stm32_rqpeek(privep); + privreq = stm32l4_rqpeek(privep); if (!privreq) { /* Incoming data is available in the RxFIFO, but there is no read setup @@ -1688,7 +1688,7 @@ static inline void stm32_epout_receive(FAR struct stm32_ep_s *privep, int bcnt) if (privep->epphy == 0) { - stm32_ep0out_receive(privep, bcnt); + stm32l4_ep0out_receive(privep, bcnt); } else { @@ -1696,11 +1696,11 @@ static inline void stm32_epout_receive(FAR struct stm32_ep_s *privep, int bcnt) * NAKing is working as expected. */ - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_EPOUTQEMPTY), privep->epphy); + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_EPOUTQEMPTY), privep->epphy); /* Discard the data in the RxFIFO */ - stm32_rxfifo_discard(privep, bcnt); + stm32l4_rxfifo_discard(privep, bcnt); } privep->active = false; @@ -1722,13 +1722,13 @@ static inline void stm32_epout_receive(FAR struct stm32_ep_s *privep, int bcnt) /* Transfer the data from the RxFIFO to the request's data buffer */ - stm32_rxfifo_read(privep, dest, readlen); + stm32l4_rxfifo_read(privep, dest, readlen); /* If there were more bytes in the RxFIFO than could be held in the read * request, then we will have to discard those. */ - stm32_rxfifo_discard(privep, bcnt - readlen); + stm32l4_rxfifo_discard(privep, bcnt - readlen); /* Update the number of bytes transferred */ @@ -1736,7 +1736,7 @@ static inline void stm32_epout_receive(FAR struct stm32_ep_s *privep, int bcnt) } /**************************************************************************** - * Name: stm32_epout_request + * Name: stm32l4_epout_request * * Description: * This function is called when either (1) new read request is received, or @@ -1745,10 +1745,10 @@ static inline void stm32_epout_receive(FAR struct stm32_ep_s *privep, int bcnt) * ****************************************************************************/ -static void stm32_epout_request(FAR struct stm32_usbdev_s *priv, - FAR struct stm32_ep_s *privep) +static void stm32l4_epout_request(FAR struct stm32l4_usbdev_s *priv, + FAR struct stm32l4_ep_s *privep) { - struct stm32_req_s *privreq; + struct stm32l4_req_s *privreq; uint32_t regaddr; uint32_t regval; uint32_t xfrsize; @@ -1769,10 +1769,10 @@ static void stm32_epout_request(FAR struct stm32_usbdev_s *priv, { /* Get a reference to the request at the head of the endpoint's request queue */ - privreq = stm32_rqpeek(privep); + privreq = stm32l4_rqpeek(privep); if (!privreq) { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_EPOUTQEMPTY), privep->epphy); + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_EPOUTQEMPTY), privep->epphy); /* There are no read requests to be setup. Configure the hardware to * NAK any incoming packets. (This should already be the case. I @@ -1780,10 +1780,10 @@ static void stm32_epout_request(FAR struct stm32_usbdev_s *priv, * completed until SNAK is cleared). */ - regaddr = STM32_OTGFS_DOEPCTL(privep->epphy); - regval = stm32_getreg(regaddr); + regaddr = STM32L4_OTGFS_DOEPCTL(privep->epphy); + regval = stm32l4_getreg(regaddr); regval |= OTGFS_DOEPCTL_SNAK; - stm32_putreg(regval, regaddr); + stm32l4_putreg(regval, regaddr); /* This endpoint is no longer actively transferring */ @@ -1799,8 +1799,8 @@ static void stm32_epout_request(FAR struct stm32_usbdev_s *priv, if (privreq->req.len <= 0) { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_EPOUTNULLPACKET), 0); - stm32_req_complete(privep, OK); + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_EPOUTNULLPACKET), 0); + stm32l4_req_complete(privep, OK); } /* Otherwise, we have a usable read request... break out of the loop */ @@ -1824,17 +1824,17 @@ static void stm32_epout_request(FAR struct stm32_usbdev_s *priv, /* Then setup the hardware to perform this transfer */ - regaddr = STM32_OTGFS_DOEPTSIZ(privep->epphy); - regval = stm32_getreg(regaddr); + regaddr = STM32L4_OTGFS_DOEPTSIZ(privep->epphy); + regval = stm32l4_getreg(regaddr); regval &= ~(OTGFS_DOEPTSIZ_XFRSIZ_MASK | OTGFS_DOEPTSIZ_PKTCNT_MASK); regval |= (xfrsize << OTGFS_DOEPTSIZ_XFRSIZ_SHIFT); regval |= (pktcnt << OTGFS_DOEPTSIZ_PKTCNT_SHIFT); - stm32_putreg(regval, regaddr); + stm32l4_putreg(regval, regaddr); /* Then enable the transfer */ - regaddr = STM32_OTGFS_DOEPCTL(privep->epphy); - regval = stm32_getreg(regaddr); + regaddr = STM32L4_OTGFS_DOEPCTL(privep->epphy); + regval = stm32l4_getreg(regaddr); /* When an isochronous transfer is enabled the Even/Odd frame bit must * also be set appropriately. @@ -1857,7 +1857,7 @@ static void stm32_epout_request(FAR struct stm32_usbdev_s *priv, /* Clearing NAKing and enable the transfer. */ regval |= (OTGFS_DOEPCTL_CNAK | OTGFS_DOEPCTL_EPENA); - stm32_putreg(regval, regaddr); + stm32l4_putreg(regval, regaddr); /* A transfer is now active on this endpoint */ @@ -1875,40 +1875,40 @@ static void stm32_epout_request(FAR struct stm32_usbdev_s *priv, } /**************************************************************************** - * Name: stm32_ep_flush + * Name: stm32l4_ep_flush * * Description: * Flush any primed descriptors from this ep * ****************************************************************************/ -static void stm32_ep_flush(struct stm32_ep_s *privep) +static void stm32l4_ep_flush(struct stm32l4_ep_s *privep) { if (privep->isin) { - stm32_txfifo_flush(OTGFS_GRSTCTL_TXFNUM_D(privep->epphy)); + stm32l4_txfifo_flush(OTGFS_GRSTCTL_TXFNUM_D(privep->epphy)); } else { - stm32_rxfifo_flush(); + stm32l4_rxfifo_flush(); } } /**************************************************************************** - * Name: stm32_req_complete + * Name: stm32l4_req_complete * * Description: * Handle termination of the request at the head of the endpoint request queue. * ****************************************************************************/ -static void stm32_req_complete(struct stm32_ep_s *privep, int16_t result) +static void stm32l4_req_complete(struct stm32l4_ep_s *privep, int16_t result) { - FAR struct stm32_req_s *privreq; + FAR struct stm32l4_req_s *privreq; /* Remove the request at the head of the request list */ - privreq = stm32_req_remfirst(privep); + privreq = stm32l4_req_remfirst(privep); DEBUGASSERT(privreq != NULL); /* If endpoint 0, temporarily reflect the state of protocol stalled @@ -1935,30 +1935,30 @@ static void stm32_req_complete(struct stm32_ep_s *privep, int16_t result) } /**************************************************************************** - * Name: stm32_req_cancel + * Name: stm32l4_req_cancel * * Description: * Cancel all pending requests for an endpoint * ****************************************************************************/ -static void stm32_req_cancel(struct stm32_ep_s *privep, int16_t status) +static void stm32l4_req_cancel(struct stm32l4_ep_s *privep, int16_t status) { - if (!stm32_rqempty(privep)) + if (!stm32l4_rqempty(privep)) { - stm32_ep_flush(privep); + stm32l4_ep_flush(privep); } - while (!stm32_rqempty(privep)) + while (!stm32l4_rqempty(privep)) { usbtrace(TRACE_COMPLETE(privep->epphy), - (stm32_rqpeek(privep))->req.xfrd); - stm32_req_complete(privep, status); + (stm32l4_rqpeek(privep))->req.xfrd); + stm32l4_req_complete(privep, status); } } /**************************************************************************** - * Name: stm32_ep_findbyaddr + * Name: stm32l4_ep_findbyaddr * * Description: * Find the physical endpoint structure corresponding to a logic endpoint @@ -1966,13 +1966,13 @@ static void stm32_req_cancel(struct stm32_ep_s *privep, int16_t status) * ****************************************************************************/ -static struct stm32_ep_s *stm32_ep_findbyaddr(struct stm32_usbdev_s *priv, +static struct stm32l4_ep_s *stm32l4_ep_findbyaddr(struct stm32l4_usbdev_s *priv, uint16_t eplog) { - struct stm32_ep_s *privep; + struct stm32l4_ep_s *privep; uint8_t epphy = USB_EPNO(eplog); - if (epphy >= STM32_NENDPOINTS) + if (epphy >= STM32L4_NENDPOINTS) { return NULL; } @@ -1995,7 +1995,7 @@ static struct stm32_ep_s *stm32_ep_findbyaddr(struct stm32_usbdev_s *priv, } /**************************************************************************** - * Name: stm32_req_dispatch + * Name: stm32l4_req_dispatch * * Description: * Provide unhandled setup actions to the class driver. This is logically part @@ -2003,12 +2003,12 @@ static struct stm32_ep_s *stm32_ep_findbyaddr(struct stm32_usbdev_s *priv, * ****************************************************************************/ -static int stm32_req_dispatch(struct stm32_usbdev_s *priv, +static int stm32l4_req_dispatch(struct stm32l4_usbdev_s *priv, const struct usb_ctrlreq_s *ctrl) { int ret = -EIO; - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_DISPATCH), 0); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_DISPATCH), 0); if (priv->driver) { /* Forward to the control request to the class driver implementation */ @@ -2021,7 +2021,7 @@ static int stm32_req_dispatch(struct stm32_usbdev_s *priv, { /* Stall on failure */ - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_DISPATCHSTALL), 0); + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_DISPATCHSTALL), 0); priv->stalled = true; } @@ -2029,28 +2029,28 @@ static int stm32_req_dispatch(struct stm32_usbdev_s *priv, } /**************************************************************************** - * Name: stm32_usbreset + * Name: stm32l4_usbreset * * Description: * Reset Usb engine * ****************************************************************************/ -static void stm32_usbreset(struct stm32_usbdev_s *priv) +static void stm32l4_usbreset(struct stm32l4_usbdev_s *priv) { - FAR struct stm32_ep_s *privep; + FAR struct stm32l4_ep_s *privep; uint32_t regval; int i; /* Clear the Remote Wake-up Signaling */ - regval = stm32_getreg(STM32_OTGFS_DCTL); + regval = stm32l4_getreg(STM32L4_OTGFS_DCTL); regval &= ~OTGFS_DCTL_RWUSIG; - stm32_putreg(regval, STM32_OTGFS_DCTL); + stm32l4_putreg(regval, STM32L4_OTGFS_DCTL); /* Flush the EP0 Tx FIFO */ - stm32_txfifo_flush(OTGFS_GRSTCTL_TXFNUM_D(EP0)); + stm32l4_txfifo_flush(OTGFS_GRSTCTL_TXFNUM_D(EP0)); /* Tell the class driver that we are disconnected. The class * driver should then accept any new configurations. @@ -2063,22 +2063,22 @@ static void stm32_usbreset(struct stm32_usbdev_s *priv) /* Mark all endpoints as available */ - priv->epavail[0] = STM32_EP_AVAILABLE; - priv->epavail[1] = STM32_EP_AVAILABLE; + priv->epavail[0] = STM32L4_EP_AVAILABLE; + priv->epavail[1] = STM32L4_EP_AVAILABLE; /* Disable all end point interrupts */ - for (i = 0; i < STM32_NENDPOINTS ; i++) + for (i = 0; i < STM32L4_NENDPOINTS ; i++) { /* Disable endpoint interrupts */ - stm32_putreg(0xff, STM32_OTGFS_DIEPINT(i)); - stm32_putreg(0xff, STM32_OTGFS_DOEPINT(i)); + stm32l4_putreg(0xff, STM32L4_OTGFS_DIEPINT(i)); + stm32l4_putreg(0xff, STM32L4_OTGFS_DOEPINT(i)); /* Return write requests to the class implementation */ privep = &priv->epin[i]; - stm32_req_cancel(privep, -ESHUTDOWN); + stm32l4_req_cancel(privep, -ESHUTDOWN); /* Reset IN endpoint status */ @@ -2087,54 +2087,54 @@ static void stm32_usbreset(struct stm32_usbdev_s *priv) /* Return read requests to the class implementation */ privep = &priv->epout[i]; - stm32_req_cancel(privep, -ESHUTDOWN); + stm32l4_req_cancel(privep, -ESHUTDOWN); /* Reset endpoint status */ privep->stalled = false; } - stm32_putreg(0xffffffff, STM32_OTGFS_DAINT); + stm32l4_putreg(0xffffffff, STM32L4_OTGFS_DAINT); /* Mask all device endpoint interrupts except EP0 */ regval = (OTGFS_DAINT_IEP(EP0) | OTGFS_DAINT_OEP(EP0)); - stm32_putreg(regval, STM32_OTGFS_DAINTMSK); + stm32l4_putreg(regval, STM32L4_OTGFS_DAINTMSK); /* Unmask OUT interrupts */ regval = (OTGFS_DOEPMSK_XFRCM | OTGFS_DOEPMSK_STUPM | OTGFS_DOEPMSK_EPDM); - stm32_putreg(regval, STM32_OTGFS_DOEPMSK); + stm32l4_putreg(regval, STM32L4_OTGFS_DOEPMSK); /* Unmask IN interrupts */ regval = (OTGFS_DIEPMSK_XFRCM | OTGFS_DIEPMSK_EPDM | OTGFS_DIEPMSK_TOM); - stm32_putreg(regval, STM32_OTGFS_DIEPMSK); + stm32l4_putreg(regval, STM32L4_OTGFS_DIEPMSK); /* Reset device address to 0 */ - stm32_setaddress(priv, 0); + stm32l4_setaddress(priv, 0); priv->devstate = DEVSTATE_DEFAULT; priv->usbdev.speed = USB_SPEED_FULL; /* Re-configure EP0 */ - stm32_ep0_configure(priv); + stm32l4_ep0_configure(priv); /* Setup EP0 to receive SETUP packets */ - stm32_ep0out_ctrlsetup(priv); + stm32l4_ep0out_ctrlsetup(priv); } /**************************************************************************** - * Name: stm32_ep0out_testmode + * Name: stm32l4_ep0out_testmode * * Description: * Select test mode * ****************************************************************************/ -static inline void stm32_ep0out_testmode(FAR struct stm32_usbdev_s *priv, +static inline void stm32l4_ep0out_testmode(FAR struct stm32l4_usbdev_s *priv, uint16_t index) { uint8_t testmode; @@ -2163,18 +2163,18 @@ static inline void stm32_ep0out_testmode(FAR struct stm32_usbdev_s *priv, break; default: - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_BADTESTMODE), testmode); + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_BADTESTMODE), testmode); priv->dotest = false; priv->testmode = OTGFS_TESTMODE_DISABLED; priv->stalled = true; } priv->dotest = true; - stm32_ep0in_transmitzlp(priv); + stm32l4_ep0in_transmitzlp(priv); } /**************************************************************************** - * Name: stm32_ep0out_stdrequest + * Name: stm32l4_ep0out_stdrequest * * Description: * Handle a standard request on EP0. Pick off the things of interest to the @@ -2182,10 +2182,10 @@ static inline void stm32_ep0out_testmode(FAR struct stm32_usbdev_s *priv, * ****************************************************************************/ -static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv, - FAR struct stm32_ctrlreq_s *ctrlreq) +static inline void stm32l4_ep0out_stdrequest(struct stm32l4_usbdev_s *priv, + FAR struct stm32l4_ctrlreq_s *ctrlreq) { - FAR struct stm32_ep_s *privep; + FAR struct stm32l4_ep_s *privep; /* Handle standard request */ @@ -2199,7 +2199,7 @@ static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv, * len: 2; data = status */ - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_GETSTATUS), 0); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_GETSTATUS), 0); if (!priv->addressed || ctrlreq->len != 2 || USB_REQ_ISOUT(ctrlreq->type) || @@ -2213,11 +2213,11 @@ static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv, { case USB_REQ_RECIPIENT_ENDPOINT: { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPGETSTATUS), 0); - privep = stm32_ep_findbyaddr(priv, ctrlreq->index); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_EPGETSTATUS), 0); + privep = stm32l4_ep_findbyaddr(priv, ctrlreq->index); if (!privep) { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_BADEPGETSTATUS), 0); + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_BADEPGETSTATUS), 0); priv->stalled = true; } else @@ -2232,7 +2232,7 @@ static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv, } priv->ep0data[1] = 0; - stm32_ep0in_setupresponse(priv, priv->ep0data, 2); + stm32l4_ep0in_setupresponse(priv, priv->ep0data, 2); } } break; @@ -2241,7 +2241,7 @@ static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv, { if (ctrlreq->index == 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_DEVGETSTATUS), 0); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_DEVGETSTATUS), 0); /* Features: Remote Wakeup and self-powered */ @@ -2249,11 +2249,11 @@ static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv, priv->ep0data[0] |= (priv->wakeup << USB_FEATURE_REMOTEWAKEUP); priv->ep0data[1] = 0; - stm32_ep0in_setupresponse(priv, priv->ep0data, 2); + stm32l4_ep0in_setupresponse(priv, priv->ep0data, 2); } else { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_BADDEVGETSTATUS), 0); + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_BADDEVGETSTATUS), 0); priv->stalled = true; } } @@ -2261,17 +2261,17 @@ static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv, case USB_REQ_RECIPIENT_INTERFACE: { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_IFGETSTATUS), 0); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_IFGETSTATUS), 0); priv->ep0data[0] = 0; priv->ep0data[1] = 0; - stm32_ep0in_setupresponse(priv, priv->ep0data, 2); + stm32l4_ep0in_setupresponse(priv, priv->ep0data, 2); } break; default: { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_BADGETSTATUS), 0); + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_BADGETSTATUS), 0); priv->stalled = true; } break; @@ -2288,33 +2288,33 @@ static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv, * len: zero, data = none */ - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_CLEARFEATURE), 0); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_CLEARFEATURE), 0); if (priv->addressed != 0 && ctrlreq->len == 0) { uint8_t recipient = ctrlreq->type & USB_REQ_RECIPIENT_MASK; if (recipient == USB_REQ_RECIPIENT_ENDPOINT && ctrlreq->value == USB_FEATURE_ENDPOINTHALT && - (privep = stm32_ep_findbyaddr(priv, ctrlreq->index)) != NULL) + (privep = stm32l4_ep_findbyaddr(priv, ctrlreq->index)) != NULL) { - stm32_ep_clrstall(privep); - stm32_ep0in_transmitzlp(priv); + stm32l4_ep_clrstall(privep); + stm32l4_ep0in_transmitzlp(priv); } else if (recipient == USB_REQ_RECIPIENT_DEVICE && ctrlreq->value == USB_FEATURE_REMOTEWAKEUP) { priv->wakeup = 0; - stm32_ep0in_transmitzlp(priv); + stm32l4_ep0in_transmitzlp(priv); } else { /* Actually, I think we could just stall here. */ - (void)stm32_req_dispatch(priv, &priv->ctrlreq); + (void)stm32l4_req_dispatch(priv, &priv->ctrlreq); } } else { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_BADCLEARFEATURE), 0); + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_BADCLEARFEATURE), 0); priv->stalled = true; } } @@ -2328,44 +2328,44 @@ static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv, * len: 0; data = none */ - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SETFEATURE), 0); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_SETFEATURE), 0); if (priv->addressed != 0 && ctrlreq->len == 0) { uint8_t recipient = ctrlreq->type & USB_REQ_RECIPIENT_MASK; if (recipient == USB_REQ_RECIPIENT_ENDPOINT && ctrlreq->value == USB_FEATURE_ENDPOINTHALT && - (privep = stm32_ep_findbyaddr(priv, ctrlreq->index)) != NULL) + (privep = stm32l4_ep_findbyaddr(priv, ctrlreq->index)) != NULL) { - stm32_ep_setstall(privep); - stm32_ep0in_transmitzlp(priv); + stm32l4_ep_setstall(privep); + stm32l4_ep0in_transmitzlp(priv); } else if (recipient == USB_REQ_RECIPIENT_DEVICE && ctrlreq->value == USB_FEATURE_REMOTEWAKEUP) { priv->wakeup = 1; - stm32_ep0in_transmitzlp(priv); + stm32l4_ep0in_transmitzlp(priv); } else if (recipient == USB_REQ_RECIPIENT_DEVICE && ctrlreq->value == USB_FEATURE_TESTMODE && ((ctrlreq->index & 0xff) == 0)) { - stm32_ep0out_testmode(priv, ctrlreq->index); + stm32l4_ep0out_testmode(priv, ctrlreq->index); } else if (priv->configured) { /* Actually, I think we could just stall here. */ - (void)stm32_req_dispatch(priv, &priv->ctrlreq); + (void)stm32l4_req_dispatch(priv, &priv->ctrlreq); } else { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_BADSETFEATURE), 0); + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_BADSETFEATURE), 0); priv->stalled = true; } } else { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_BADSETFEATURE), 0); + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_BADSETFEATURE), 0); priv->stalled = true; } } @@ -2379,7 +2379,7 @@ static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv, * len: 0; data = none */ - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SETADDRESS), ctrlreq->value); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_SETADDRESS), ctrlreq->value); if ((ctrlreq->type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE && ctrlreq->index == 0 && ctrlreq->len == 0 && @@ -2390,14 +2390,14 @@ static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv, * the completion of the status phase. */ - stm32_setaddress(priv, (uint16_t)priv->ctrlreq.value[0]); - stm32_ep0in_transmitzlp(priv); + stm32l4_setaddress(priv, (uint16_t)priv->ctrlreq.value[0]); + stm32l4_ep0in_transmitzlp(priv); uinfo("USB_REQ_SETADDRESS %02x\n",(uint16_t)priv->ctrlreq.value[0]); } else { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_BADSETADDRESS), 0); + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_BADSETADDRESS), 0); priv->stalled = true; } } @@ -2418,14 +2418,14 @@ static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv, */ { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_GETSETDESC), 0); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_GETSETDESC), 0); if ((ctrlreq->type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE) { - (void)stm32_req_dispatch(priv, &priv->ctrlreq); + (void)stm32l4_req_dispatch(priv, &priv->ctrlreq); } else { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_BADGETSETDESC), 0); + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_BADGETSETDESC), 0); priv->stalled = true; } } @@ -2439,18 +2439,18 @@ static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv, */ { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_GETCONFIG), 0); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_GETCONFIG), 0); if (priv->addressed && (ctrlreq->type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE && ctrlreq->value == 0 && ctrlreq->index == 0 && ctrlreq->len == 1) { - (void)stm32_req_dispatch(priv, &priv->ctrlreq); + (void)stm32l4_req_dispatch(priv, &priv->ctrlreq); } else { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_BADGETCONFIG), 0); + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_BADGETCONFIG), 0); priv->stalled = true; } } @@ -2464,7 +2464,7 @@ static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv, */ { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SETCONFIG), 0); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_SETCONFIG), 0); if (priv->addressed && (ctrlreq->type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE && ctrlreq->index == 0 && @@ -2472,7 +2472,7 @@ static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv, { /* Give the configuration to the class driver */ - int ret = stm32_req_dispatch(priv, &priv->ctrlreq); + int ret = stm32l4_req_dispatch(priv, &priv->ctrlreq); /* If the class driver accepted the configuration, then mark the * device state as configured (or not, depending on the @@ -2496,7 +2496,7 @@ static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv, } else { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_BADSETCONFIG), 0); + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_BADSETCONFIG), 0); priv->stalled = true; } } @@ -2517,8 +2517,8 @@ static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv, */ { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_GETSETIF), 0); - (void)stm32_req_dispatch(priv, &priv->ctrlreq); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_GETSETIF), 0); + (void)stm32l4_req_dispatch(priv, &priv->ctrlreq); } break; @@ -2530,13 +2530,13 @@ static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv, */ { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SYNCHFRAME), 0); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_SYNCHFRAME), 0); } break; default: { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDCTRLREQ), 0); + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_INVALIDCTRLREQ), 0); priv->stalled = true; } break; @@ -2544,7 +2544,7 @@ static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv, } /**************************************************************************** - * Name: stm32_ep0out_setup + * Name: stm32l4_ep0out_setup * * Description: * USB Ctrl EP Setup Event. This is logically part of the USB interrupt @@ -2552,22 +2552,22 @@ static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv, * ****************************************************************************/ -static inline void stm32_ep0out_setup(struct stm32_usbdev_s *priv) +static inline void stm32l4_ep0out_setup(struct stm32l4_usbdev_s *priv) { - struct stm32_ctrlreq_s ctrlreq; + struct stm32l4_ctrlreq_s ctrlreq; /* Verify that a SETUP was received */ if (priv->ep0state != EP0STATE_SETUP_READY) { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_EP0NOSETUP), priv->ep0state); + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_EP0NOSETUP), priv->ep0state); return; } /* Terminate any pending requests */ - stm32_req_cancel(&priv->epout[EP0], -EPROTO); - stm32_req_cancel(&priv->epin[EP0], -EPROTO); + stm32l4_req_cancel(&priv->epout[EP0], -EPROTO); + stm32l4_req_cancel(&priv->epin[EP0], -EPROTO); /* Assume NOT stalled */ @@ -2596,21 +2596,21 @@ static inline void stm32_ep0out_setup(struct stm32_usbdev_s *priv) { /* Dispatch any non-standard requests */ - (void)stm32_req_dispatch(priv, &priv->ctrlreq); + (void)stm32l4_req_dispatch(priv, &priv->ctrlreq); } else { /* Handle standard requests. */ - stm32_ep0out_stdrequest(priv, &ctrlreq); + stm32l4_ep0out_stdrequest(priv, &ctrlreq); } /* Check if the setup processing resulted in a STALL */ if (priv->stalled) { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_EP0SETUPSTALLED), priv->ep0state); - stm32_ep0_stall(priv); + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_EP0SETUPSTALLED), priv->ep0state); + stm32l4_ep0_stall(priv); } /* Reset state/data associated with thie SETUP request */ @@ -2619,7 +2619,7 @@ static inline void stm32_ep0out_setup(struct stm32_usbdev_s *priv) } /**************************************************************************** - * Name: stm32_epout + * Name: stm32l4_epout * * Description: * This is part of the OUT endpoint interrupt processing. This function @@ -2627,9 +2627,9 @@ static inline void stm32_ep0out_setup(struct stm32_usbdev_s *priv) * ****************************************************************************/ -static inline void stm32_epout(FAR struct stm32_usbdev_s *priv, uint8_t epno) +static inline void stm32l4_epout(FAR struct stm32l4_usbdev_s *priv, uint8_t epno) { - FAR struct stm32_ep_s *privep; + FAR struct stm32l4_ep_s *privep; /* Endpoint 0 is a special case. */ @@ -2646,7 +2646,7 @@ static inline void stm32_epout(FAR struct stm32_usbdev_s *priv, uint8_t epno) { /* Continue processing data from the EP0 OUT request queue */ - stm32_epout_complete(priv, privep); + stm32l4_epout_complete(priv, privep); /* If we are not actively processing an OUT request, then we * need to setup to receive the next control request. @@ -2654,7 +2654,7 @@ static inline void stm32_epout(FAR struct stm32_usbdev_s *priv, uint8_t epno) if (!privep->active) { - stm32_ep0out_ctrlsetup(priv); + stm32l4_ep0out_ctrlsetup(priv); priv->ep0state = EP0STATE_IDLE; } } @@ -2666,12 +2666,12 @@ static inline void stm32_epout(FAR struct stm32_usbdev_s *priv, uint8_t epno) else if (priv->devstate == DEVSTATE_CONFIGURED) { - stm32_epout_complete(priv, &priv->epout[epno]); + stm32l4_epout_complete(priv, &priv->epout[epno]); } } /**************************************************************************** - * Name: stm32_epout_interrupt + * Name: stm32l4_epout_interrupt * * Description: * USB OUT endpoint interrupt handler. The core generates this interrupt when @@ -2683,7 +2683,7 @@ static inline void stm32_epout(FAR struct stm32_usbdev_s *priv, uint8_t epno) * ****************************************************************************/ -static inline void stm32_epout_interrupt(FAR struct stm32_usbdev_s *priv) +static inline void stm32l4_epout_interrupt(FAR struct stm32l4_usbdev_s *priv) { uint32_t daint; uint32_t regval; @@ -2694,8 +2694,8 @@ static inline void stm32_epout_interrupt(FAR struct stm32_usbdev_s *priv) * interrupt status register. */ - regval = stm32_getreg(STM32_OTGFS_DAINT); - regval &= stm32_getreg(STM32_OTGFS_DAINTMSK); + regval = stm32l4_getreg(STM32L4_OTGFS_DAINT); + regval &= stm32l4_getreg(STM32L4_OTGFS_DAINTMSK); daint = (regval & OTGFS_DAINT_OEP_MASK) >> OTGFS_DAINT_OEP_SHIFT; if (daint == 0) @@ -2710,10 +2710,10 @@ static inline void stm32_epout_interrupt(FAR struct stm32_usbdev_s *priv) * works by clearing each endpoint flags, masked or not. */ - regval = stm32_getreg(STM32_OTGFS_DAINT); + regval = stm32l4_getreg(STM32L4_OTGFS_DAINT); daint = (regval & OTGFS_DAINT_OEP_MASK) >> OTGFS_DAINT_OEP_SHIFT; - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_EPOUTUNEXPECTED), + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_EPOUTUNEXPECTED), (uint16_t)regval); epno = 0; @@ -2721,9 +2721,9 @@ static inline void stm32_epout_interrupt(FAR struct stm32_usbdev_s *priv) { if ((daint & 1) != 0) { - regval = stm32_getreg(STM32_OTGFS_DOEPINT(epno)); + regval = stm32l4_getreg(STM32L4_OTGFS_DOEPINT(epno)); uinfo("DOEPINT(%d) = %08x\n", epno, regval); - stm32_putreg(0xFF, STM32_OTGFS_DOEPINT(epno)); + stm32l4_putreg(0xFF, STM32L4_OTGFS_DOEPINT(epno)); } epno++; @@ -2744,26 +2744,26 @@ static inline void stm32_epout_interrupt(FAR struct stm32_usbdev_s *priv) { /* Yes.. get the OUT endpoint interrupt status */ - doepint = stm32_getreg(STM32_OTGFS_DOEPINT(epno)); - doepint &= stm32_getreg(STM32_OTGFS_DOEPMSK); + doepint = stm32l4_getreg(STM32L4_OTGFS_DOEPINT(epno)); + doepint &= stm32l4_getreg(STM32L4_OTGFS_DOEPMSK); /* Transfer completed interrupt. This interrupt is trigged when - * stm32_rxinterrupt() removes the last packet data from the RxFIFO. + * stm32l4_rxinterrupt() removes the last packet data from the RxFIFO. * In this case, core internally sets the NAK bit for this endpoint to * prevent it from receiving any more packets. */ if ((doepint & OTGFS_DOEPINT_XFRC) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPOUT_XFRC), (uint16_t)doepint); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_EPOUT_XFRC), (uint16_t)doepint); /* Clear the bit in DOEPINTn for this interrupt */ - stm32_putreg(OTGFS_DOEPINT_XFRC, STM32_OTGFS_DOEPINT(epno)); + stm32l4_putreg(OTGFS_DOEPINT_XFRC, STM32L4_OTGFS_DOEPINT(epno)); /* Handle the RX transfer data ready event */ - stm32_epout(priv, epno); + stm32l4_epout(priv, epno); } /* Endpoint disabled interrupt (ignored because this interrupt is @@ -2773,18 +2773,18 @@ static inline void stm32_epout_interrupt(FAR struct stm32_usbdev_s *priv) /* REVISIT: */ if ((doepint & OTGFS_DOEPINT_EPDISD) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPOUT_EPDISD), (uint16_t)doepint); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_EPOUT_EPDISD), (uint16_t)doepint); /* Clear the bit in DOEPINTn for this interrupt */ - stm32_putreg(OTGFS_DOEPINT_EPDISD, STM32_OTGFS_DOEPINT(epno)); + stm32l4_putreg(OTGFS_DOEPINT_EPDISD, STM32L4_OTGFS_DOEPINT(epno)); } #endif /* Setup Phase Done (control EPs) */ if ((doepint & OTGFS_DOEPINT_SETUP) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPOUT_SETUP), priv->ep0state); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_EPOUT_SETUP), priv->ep0state); /* Handle the receipt of the IN SETUP packets now (OUT setup * packet processing may be delayed until the accompanying @@ -2793,9 +2793,9 @@ static inline void stm32_epout_interrupt(FAR struct stm32_usbdev_s *priv) if (priv->ep0state == EP0STATE_SETUP_READY) { - stm32_ep0out_setup(priv); + stm32l4_ep0out_setup(priv); } - stm32_putreg(OTGFS_DOEPINT_SETUP, STM32_OTGFS_DOEPINT(epno)); + stm32l4_putreg(OTGFS_DOEPINT_SETUP, STM32L4_OTGFS_DOEPINT(epno)); } } @@ -2805,26 +2805,26 @@ static inline void stm32_epout_interrupt(FAR struct stm32_usbdev_s *priv) } /**************************************************************************** - * Name: stm32_epin_runtestmode + * Name: stm32l4_epin_runtestmode * * Description: * Execute the test mode setup by the SET FEATURE request * ****************************************************************************/ -static inline void stm32_epin_runtestmode(FAR struct stm32_usbdev_s *priv) +static inline void stm32l4_epin_runtestmode(FAR struct stm32l4_usbdev_s *priv) { - uint32_t regval = stm32_getreg(STM32_OTGFS_DCTL); + uint32_t regval = stm32l4_getreg(STM32L4_OTGFS_DCTL); regval &= OTGFS_DCTL_TCTL_MASK; regval |= (uint32_t)priv->testmode << OTGFS_DCTL_TCTL_SHIFT; - stm32_putreg(regval , STM32_OTGFS_DCTL); + stm32l4_putreg(regval , STM32L4_OTGFS_DCTL); priv->dotest = 0; priv->testmode = OTGFS_TESTMODE_DISABLED; } /**************************************************************************** - * Name: stm32_epin + * Name: stm32l4_epin * * Description: * This is part of the IN endpoint interrupt processing. This function @@ -2832,9 +2832,9 @@ static inline void stm32_epin_runtestmode(FAR struct stm32_usbdev_s *priv) * ****************************************************************************/ -static inline void stm32_epin(FAR struct stm32_usbdev_s *priv, uint8_t epno) +static inline void stm32l4_epin(FAR struct stm32l4_usbdev_s *priv, uint8_t epno) { - FAR struct stm32_ep_s *privep = &priv->epin[epno]; + FAR struct stm32l4_ep_s *privep = &priv->epin[epno]; /* Endpoint 0 is a special case. */ @@ -2848,7 +2848,7 @@ static inline void stm32_epin(FAR struct stm32_usbdev_s *priv, uint8_t epno) { /* Continue processing data from the EP0 OUT request queue */ - stm32_epin_request(priv, privep); + stm32l4_epin_request(priv, privep); /* If we are not actively processing an OUT request, then we * need to setup to receive the next control request. @@ -2856,7 +2856,7 @@ static inline void stm32_epin(FAR struct stm32_usbdev_s *priv, uint8_t epno) if (!privep->active) { - stm32_ep0out_ctrlsetup(priv); + stm32l4_ep0out_ctrlsetup(priv); priv->ep0state = EP0STATE_IDLE; } } @@ -2865,7 +2865,7 @@ static inline void stm32_epin(FAR struct stm32_usbdev_s *priv, uint8_t epno) if (priv->dotest) { - stm32_epin_runtestmode(priv); + stm32l4_epin_runtestmode(priv); } } @@ -2877,32 +2877,32 @@ static inline void stm32_epin(FAR struct stm32_usbdev_s *priv, uint8_t epno) { /* Continue processing data from the endpoint write request queue */ - stm32_epin_request(priv, privep); + stm32l4_epin_request(priv, privep); } } /**************************************************************************** - * Name: stm32_epin_txfifoempty + * Name: stm32l4_epin_txfifoempty * * Description: * TxFIFO empty interrupt handling * ****************************************************************************/ -static inline void stm32_epin_txfifoempty(FAR struct stm32_usbdev_s *priv, int epno) +static inline void stm32l4_epin_txfifoempty(FAR struct stm32l4_usbdev_s *priv, int epno) { - FAR struct stm32_ep_s *privep = &priv->epin[epno]; + FAR struct stm32l4_ep_s *privep = &priv->epin[epno]; /* Continue processing the write request queue. This may mean sending * more data from the existing request or terminating the current requests * and (perhaps) starting the IN transfer from the next write request. */ - stm32_epin_request(priv, privep); + stm32l4_epin_request(priv, privep); } /**************************************************************************** - * Name: stm32_epin_interrupt + * Name: stm32l4_epin_interrupt * * Description: * USB IN endpoint interrupt handler. The core generates this interrupt when @@ -2913,7 +2913,7 @@ static inline void stm32_epin_txfifoempty(FAR struct stm32_usbdev_s *priv, int e * ****************************************************************************/ -static inline void stm32_epin_interrupt(FAR struct stm32_usbdev_s *priv) +static inline void stm32l4_epin_interrupt(FAR struct stm32l4_usbdev_s *priv) { uint32_t diepint; uint32_t daint; @@ -2925,8 +2925,8 @@ static inline void stm32_epin_interrupt(FAR struct stm32_usbdev_s *priv) * interrupt status register. */ - daint = stm32_getreg(STM32_OTGFS_DAINT); - daint &= stm32_getreg(STM32_OTGFS_DAINTMSK); + daint = stm32l4_getreg(STM32L4_OTGFS_DAINT); + daint &= stm32l4_getreg(STM32L4_OTGFS_DAINTMSK); daint &= OTGFS_DAINT_IEP_MASK; if (daint == 0) @@ -2941,8 +2941,8 @@ static inline void stm32_epin_interrupt(FAR struct stm32_usbdev_s *priv) * works by clearing each endpoint flags, masked or not. */ - daint = stm32_getreg(STM32_OTGFS_DAINT); - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_EPINUNEXPECTED), + daint = stm32l4_getreg(STM32L4_OTGFS_DAINT); + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_EPINUNEXPECTED), (uint16_t)daint); daint &= OTGFS_DAINT_IEP_MASK; @@ -2953,8 +2953,8 @@ static inline void stm32_epin_interrupt(FAR struct stm32_usbdev_s *priv) if ((daint & 1) != 0) { uinfo("DIEPINT(%d) = %08x\n", - epno, stm32_getreg(STM32_OTGFS_DIEPINT(epno))); - stm32_putreg(0xFF, STM32_OTGFS_DIEPINT(epno)); + epno, stm32l4_getreg(STM32L4_OTGFS_DIEPINT(epno))); + stm32l4_putreg(0xFF, STM32L4_OTGFS_DIEPINT(epno)); } epno++; @@ -2978,7 +2978,7 @@ static inline void stm32_epin_interrupt(FAR struct stm32_usbdev_s *priv) * register. */ - mask = stm32_getreg(STM32_OTGFS_DIEPMSK); + mask = stm32l4_getreg(STM32L4_OTGFS_DIEPMSK); /* Check if the TxFIFO not empty interrupt is enabled for this * endpoint in the DIEPMSK register. Bits n corresponds to @@ -2987,7 +2987,7 @@ static inline void stm32_epin_interrupt(FAR struct stm32_usbdev_s *priv) * no TXFE bit in the mask register, so we fake one here. */ - empty = stm32_getreg(STM32_OTGFS_DIEPEMPMSK); + empty = stm32l4_getreg(STM32L4_OTGFS_DIEPEMPMSK); if ((empty & OTGFS_DIEPEMPMSK(epno)) != 0) { mask |= OTGFS_DIEPINT_TXFE; @@ -2997,14 +2997,14 @@ static inline void stm32_epin_interrupt(FAR struct stm32_usbdev_s *priv) * interrupts. */ - diepint = stm32_getreg(STM32_OTGFS_DIEPINT(epno)) & mask; + diepint = stm32l4_getreg(STM32L4_OTGFS_DIEPINT(epno)) & mask; /* Decode and process the enabled, pending interrupts */ /* Transfer completed interrupt */ if ((diepint & OTGFS_DIEPINT_XFRC) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPIN_XFRC), + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_EPIN_XFRC), (uint16_t)diepint); /* It is possible that logic may be waiting for a the @@ -3014,20 +3014,20 @@ static inline void stm32_epin_interrupt(FAR struct stm32_usbdev_s *priv) */ empty &= ~OTGFS_DIEPEMPMSK(epno); - stm32_putreg(empty, STM32_OTGFS_DIEPEMPMSK); - stm32_putreg(OTGFS_DIEPINT_XFRC, STM32_OTGFS_DIEPINT(epno)); + stm32l4_putreg(empty, STM32L4_OTGFS_DIEPEMPMSK); + stm32l4_putreg(OTGFS_DIEPINT_XFRC, STM32L4_OTGFS_DIEPINT(epno)); /* IN transfer complete */ - stm32_epin(priv, epno); + stm32l4_epin(priv, epno); } /* Timeout condition */ if ((diepint & OTGFS_DIEPINT_TOC) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPIN_TOC), (uint16_t)diepint); - stm32_putreg(OTGFS_DIEPINT_TOC, STM32_OTGFS_DIEPINT(epno)); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_EPIN_TOC), (uint16_t)diepint); + stm32l4_putreg(OTGFS_DIEPINT_TOC, STM32L4_OTGFS_DIEPINT(epno)); } /* IN token received when TxFIFO is empty. Applies to non-periodic IN @@ -3039,9 +3039,9 @@ static inline void stm32_epin_interrupt(FAR struct stm32_usbdev_s *priv) if ((diepint & OTGFS_DIEPINT_ITTXFE) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPIN_ITTXFE), (uint16_t)diepint); - stm32_epin_request(priv, &priv->epin[epno]); - stm32_putreg(OTGFS_DIEPINT_ITTXFE, STM32_OTGFS_DIEPINT(epno)); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_EPIN_ITTXFE), (uint16_t)diepint); + stm32l4_epin_request(priv, &priv->epin[epno]); + stm32l4_putreg(OTGFS_DIEPINT_ITTXFE, STM32L4_OTGFS_DIEPINT(epno)); } /* IN endpoint NAK effective (ignored as this used only in polled @@ -3050,8 +3050,8 @@ static inline void stm32_epin_interrupt(FAR struct stm32_usbdev_s *priv) #if 0 if ((diepint & OTGFS_DIEPINT_INEPNE) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPIN_INEPNE), (uint16_t)diepint); - stm32_putreg(OTGFS_DIEPINT_INEPNE, STM32_OTGFS_DIEPINT(epno)); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_EPIN_INEPNE), (uint16_t)diepint); + stm32l4_putreg(OTGFS_DIEPINT_INEPNE, STM32L4_OTGFS_DIEPINT(epno)); } #endif /* Endpoint disabled interrupt (ignored as this used only in polled @@ -3060,15 +3060,15 @@ static inline void stm32_epin_interrupt(FAR struct stm32_usbdev_s *priv) #if 0 if ((diepint & OTGFS_DIEPINT_EPDISD) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPIN_EPDISD), (uint16_t)diepint); - stm32_putreg(OTGFS_DIEPINT_EPDISD, STM32_OTGFS_DIEPINT(epno)); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_EPIN_EPDISD), (uint16_t)diepint); + stm32l4_putreg(OTGFS_DIEPINT_EPDISD, STM32L4_OTGFS_DIEPINT(epno)); } #endif /* Transmit FIFO empty */ if ((diepint & OTGFS_DIEPINT_TXFE) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPIN_TXFE), (uint16_t)diepint); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_EPIN_TXFE), (uint16_t)diepint); /* If we were waiting for TxFIFO to become empty, the we might have both * XFRC and TXFE interrupts pending. Since we do the same thing for both @@ -3082,16 +3082,16 @@ static inline void stm32_epin_interrupt(FAR struct stm32_usbdev_s *priv) */ empty &= ~OTGFS_DIEPEMPMSK(epno); - stm32_putreg(empty, STM32_OTGFS_DIEPEMPMSK); + stm32l4_putreg(empty, STM32L4_OTGFS_DIEPEMPMSK); /* Handle TxFIFO empty */ - stm32_epin_txfifoempty(priv, epno); + stm32l4_epin_txfifoempty(priv, epno); } /* Clear the pending TxFIFO empty interrupt */ - stm32_putreg(OTGFS_DIEPINT_TXFE, STM32_OTGFS_DIEPINT(epno)); + stm32l4_putreg(OTGFS_DIEPINT_TXFE, STM32L4_OTGFS_DIEPINT(epno)); } } @@ -3101,30 +3101,30 @@ static inline void stm32_epin_interrupt(FAR struct stm32_usbdev_s *priv) } /**************************************************************************** - * Name: stm32_resumeinterrupt + * Name: stm32l4_resumeinterrupt * * Description: * Resume/remote wakeup detected interrupt * ****************************************************************************/ -static inline void stm32_resumeinterrupt(FAR struct stm32_usbdev_s *priv) +static inline void stm32l4_resumeinterrupt(FAR struct stm32l4_usbdev_s *priv) { uint32_t regval; /* Restart the PHY clock and un-gate USB core clock (HCLK) */ #ifdef CONFIG_USBDEV_LOWPOWER - regval = stm32_getreg(STM32_OTGFS_PCGCCTL); + regval = stm32l4_getreg(STM32L4_OTGFS_PCGCCTL); regval &= ~(OTGFS_PCGCCTL_STPPCLK | OTGFS_PCGCCTL_GATEHCLK); - stm32_putreg(regval, STM32_OTGFS_PCGCCTL); + stm32l4_putreg(regval, STM32L4_OTGFS_PCGCCTL); #endif /* Clear remote wake-up signaling */ - regval = stm32_getreg(STM32_OTGFS_DCTL); + regval = stm32l4_getreg(STM32L4_OTGFS_DCTL); regval &= ~OTGFS_DCTL_RWUSIG; - stm32_putreg(regval, STM32_OTGFS_DCTL); + stm32l4_putreg(regval, STM32L4_OTGFS_DCTL); /* Restore full power -- whatever that means for this particular board */ @@ -3139,14 +3139,14 @@ static inline void stm32_resumeinterrupt(FAR struct stm32_usbdev_s *priv) } /**************************************************************************** - * Name: stm32_suspendinterrupt + * Name: stm32l4_suspendinterrupt * * Description: * USB suspend interrupt * ****************************************************************************/ -static inline void stm32_suspendinterrupt(FAR struct stm32_usbdev_s *priv) +static inline void stm32l4_suspendinterrupt(FAR struct stm32l4_usbdev_s *priv) { #ifdef CONFIG_USBDEV_LOWPOWER uint32_t regval; @@ -3165,7 +3165,7 @@ static inline void stm32_suspendinterrupt(FAR struct stm32_usbdev_s *priv) * connected to the host, and that we have been configured. */ - regval = stm32_getreg(STM32_OTGFS_DSTS); + regval = stm32l4_getreg(STM32L4_OTGFS_DSTS); if ((regval & OTGFS_DSTS_SUSPSTS) != 0 && devstate == DEVSTATE_CONFIGURED) { @@ -3173,16 +3173,16 @@ static inline void stm32_suspendinterrupt(FAR struct stm32_usbdev_s *priv) * PHY clock. */ - regval = stm32_getreg(STM32_OTGFS_PCGCCTL); + regval = stm32l4_getreg(STM32L4_OTGFS_PCGCCTL); regval |= OTGFS_PCGCCTL_STPPCLK; - stm32_putreg(regval, STM32_OTGFS_PCGCCTL); + stm32l4_putreg(regval, STM32L4_OTGFS_PCGCCTL); /* Setting OTGFS_PCGCCTL_GATEHCLK gate HCLK to modules other than * the AHB Slave and Master and wakeup logic. */ regval |= OTGFS_PCGCCTL_GATEHCLK; - stm32_putreg(regval, STM32_OTGFS_PCGCCTL); + stm32l4_putreg(regval, STM32L4_OTGFS_PCGCCTL); } #endif @@ -3194,7 +3194,7 @@ static inline void stm32_suspendinterrupt(FAR struct stm32_usbdev_s *priv) } /**************************************************************************** - * Name: stm32_rxinterrupt + * Name: stm32l4_rxinterrupt * * Description: * RxFIFO non-empty interrupt. This interrupt indicates that there is at @@ -3202,28 +3202,28 @@ static inline void stm32_suspendinterrupt(FAR struct stm32_usbdev_s *priv) * ****************************************************************************/ -static inline void stm32_rxinterrupt(FAR struct stm32_usbdev_s *priv) +static inline void stm32l4_rxinterrupt(FAR struct stm32l4_usbdev_s *priv) { - FAR struct stm32_ep_s *privep; + FAR struct stm32l4_ep_s *privep; uint32_t regval; int bcnt; int epphy; /* Disable the Rx status queue level interrupt */ - regval = stm32_getreg(STM32_OTGFS_GINTMSK); + regval = stm32l4_getreg(STM32L4_OTGFS_GINTMSK); regval &= ~OTGFS_GINT_RXFLVL; - stm32_putreg(regval, STM32_OTGFS_GINTMSK); + stm32l4_putreg(regval, STM32L4_OTGFS_GINTMSK); /* Get the status from the top of the FIFO */ - regval = stm32_getreg(STM32_OTGFS_GRXSTSP); + regval = stm32l4_getreg(STM32L4_OTGFS_GRXSTSP); /* Decode status fields */ epphy = (regval & OTGFS_GRXSTSD_EPNUM_MASK) >> OTGFS_GRXSTSD_EPNUM_SHIFT; - if (epphy < STM32_NENDPOINTS) + if (epphy < STM32L4_NENDPOINTS) { privep = &priv->epout[epphy]; @@ -3240,7 +3240,7 @@ static inline void stm32_rxinterrupt(FAR struct stm32_usbdev_s *priv) case OTGFS_GRXSTSD_PKTSTS_OUTNAK: { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_OUTNAK), 0); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_OUTNAK), 0); } break; @@ -3252,11 +3252,11 @@ static inline void stm32_rxinterrupt(FAR struct stm32_usbdev_s *priv) case OTGFS_GRXSTSD_PKTSTS_OUTRECVD: { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_OUTRECVD), epphy); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_OUTRECVD), epphy); bcnt = (regval & OTGFS_GRXSTSD_BCNT_MASK) >> OTGFS_GRXSTSD_BCNT_SHIFT; if (bcnt > 0) { - stm32_epout_receive(privep, bcnt); + stm32l4_epout_receive(privep, bcnt); } } break; @@ -3272,7 +3272,7 @@ static inline void stm32_rxinterrupt(FAR struct stm32_usbdev_s *priv) case OTGFS_GRXSTSD_PKTSTS_OUTDONE: { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_OUTDONE), epphy); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_OUTDONE), epphy); } break; @@ -3288,7 +3288,7 @@ static inline void stm32_rxinterrupt(FAR struct stm32_usbdev_s *priv) case OTGFS_GRXSTSD_PKTSTS_SETUPDONE: { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SETUPDONE), epphy); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_SETUPDONE), epphy); } break; @@ -3302,14 +3302,14 @@ static inline void stm32_rxinterrupt(FAR struct stm32_usbdev_s *priv) { uint16_t datlen; - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SETUPRECVD), epphy); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_SETUPRECVD), epphy); /* Read EP0 setup data. NOTE: If multiple SETUP packets are received, * the last one overwrites the previous setup packets and only that * last SETUP packet will be processed. */ - stm32_rxfifo_read(&priv->epout[EP0], (FAR uint8_t *)&priv->ctrlreq, + stm32l4_rxfifo_read(&priv->epout[EP0], (FAR uint8_t *)&priv->ctrlreq, USB_SIZEOF_CTRLREQ); /* Was this an IN or an OUT SETUP packet. If it is an OUT SETUP, @@ -3326,9 +3326,9 @@ static inline void stm32_rxinterrupt(FAR struct stm32_usbdev_s *priv) { /* Clear NAKSTS so that we can receive the data */ - regval = stm32_getreg(STM32_OTGFS_DOEPCTL0); + regval = stm32l4_getreg(STM32L4_OTGFS_DOEPCTL0); regval |= OTGFS_DOEPCTL0_CNAK; - stm32_putreg(regval, STM32_OTGFS_DOEPCTL0); + stm32l4_putreg(regval, STM32L4_OTGFS_DOEPCTL0); /* Wait for the data phase. */ @@ -3347,7 +3347,7 @@ static inline void stm32_rxinterrupt(FAR struct stm32_usbdev_s *priv) default: { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_INVALIDPARMS), (regval & OTGFS_GRXSTSD_PKTSTS_MASK) >> OTGFS_GRXSTSD_PKTSTS_SHIFT); } break; @@ -3356,37 +3356,37 @@ static inline void stm32_rxinterrupt(FAR struct stm32_usbdev_s *priv) /* Enable the Rx Status Queue Level interrupt */ - regval = stm32_getreg(STM32_OTGFS_GINTMSK); + regval = stm32l4_getreg(STM32L4_OTGFS_GINTMSK); regval |= OTGFS_GINT_RXFLVL; - stm32_putreg(regval, STM32_OTGFS_GINTMSK); + stm32l4_putreg(regval, STM32L4_OTGFS_GINTMSK); } /**************************************************************************** - * Name: stm32_enuminterrupt + * Name: stm32l4_enuminterrupt * * Description: * Enumeration done interrupt * ****************************************************************************/ -static inline void stm32_enuminterrupt(FAR struct stm32_usbdev_s *priv) +static inline void stm32l4_enuminterrupt(FAR struct stm32l4_usbdev_s *priv) { uint32_t regval; /* Activate EP0 */ - stm32_ep0in_activate(); + stm32l4_ep0in_activate(); /* Set USB turn-around time for the full speed device with internal PHY interface. */ - regval = stm32_getreg(STM32_OTGFS_GUSBCFG); + regval = stm32l4_getreg(STM32L4_OTGFS_GUSBCFG); regval &= ~OTGFS_GUSBCFG_TRDT_MASK; regval |= OTGFS_GUSBCFG_TRDT(5); - stm32_putreg(regval, STM32_OTGFS_GUSBCFG); + stm32l4_putreg(regval, STM32L4_OTGFS_GUSBCFG); } /**************************************************************************** - * Name: stm32_isocininterrupt + * Name: stm32l4_isocininterrupt * * Description: * Incomplete isochronous IN transfer interrupt. Assertion of the incomplete @@ -3396,7 +3396,7 @@ static inline void stm32_enuminterrupt(FAR struct stm32_usbdev_s *priv) ****************************************************************************/ #ifdef CONFIG_USBDEV_ISOCHRONOUS -static inline void stm32_isocininterrupt(FAR struct stm32_usbdev_s *priv) +static inline void stm32l4_isocininterrupt(FAR struct stm32l4_usbdev_s *priv) { int i; @@ -3404,7 +3404,7 @@ static inline void stm32_isocininterrupt(FAR struct stm32_usbdev_s *priv) * IN endpoints to detect endpoints with incomplete IN data transfers. */ - for (i = 0; i < STM32_NENDPOINTS; i++) + for (i = 0; i < STM32L4_NENDPOINTS; i++) { /* Is this an isochronous IN endpoint? */ @@ -3427,9 +3427,9 @@ static inline void stm32_isocininterrupt(FAR struct stm32_usbdev_s *priv) /* Check if this is the endpoint that had the incomplete transfer */ - regaddr = STM32_OTGFS_DIEPCTL(privep->epphy); - doepctl = stm32_getreg(regaddr); - dsts = stm32_getreg(STM32_OTGFS_DSTS); + regaddr = STM32L4_OTGFS_DIEPCTL(privep->epphy); + doepctl = stm32l4_getreg(regaddr); + dsts = stm32l4_getreg(STM32L4_OTGFS_DSTS); /* EONUM = 0:even frame, 1:odd frame * SOFFN = Frame number of the received SOF @@ -3450,16 +3450,16 @@ static inline void stm32_isocininterrupt(FAR struct stm32_usbdev_s *priv) * disable the endpoint. */ - stm32_req_complete(privep, -EIO); + stm32l4_req_complete(privep, -EIO); #warning "Will clear OTGFS_DIEPCTL_USBAEP too" - stm32_epin_disable(privep); + stm32l4_epin_disable(privep); break; } } #endif /**************************************************************************** - * Name: stm32_isocoutinterrupt + * Name: stm32l4_isocoutinterrupt * * Description: * Incomplete periodic transfer interrupt @@ -3467,10 +3467,10 @@ static inline void stm32_isocininterrupt(FAR struct stm32_usbdev_s *priv) ****************************************************************************/ #ifdef CONFIG_USBDEV_ISOCHRONOUS -static inline void stm32_isocoutinterrupt(FAR struct stm32_usbdev_s *priv) +static inline void stm32l4_isocoutinterrupt(FAR struct stm32l4_usbdev_s *priv) { - FAR struct stm32_ep_s *privep; - FAR struct stm32_req_s *privreq; + FAR struct stm32l4_ep_s *privep; + FAR struct stm32l4_req_s *privreq; uint32_t regaddr; uint32_t doepctl; uint32_t dsts; @@ -3486,7 +3486,7 @@ static inline void stm32_isocoutinterrupt(FAR struct stm32_usbdev_s *priv) * DOEPCTLx:EPENA = 1 */ - for (i = 0; i < STM32_NENDPOINTS; i++) + for (i = 0; i < STM32L4_NENDPOINTS; i++) { /* Is this an isochronous OUT endpoint? */ @@ -3509,9 +3509,9 @@ static inline void stm32_isocoutinterrupt(FAR struct stm32_usbdev_s *priv) /* Check if this is the endpoint that had the incomplete transfer */ - regaddr = STM32_OTGFS_DOEPCTL(privep->epphy); - doepctl = stm32_getreg(regaddr); - dsts = stm32_getreg(STM32_OTGFS_DSTS); + regaddr = STM32L4_OTGFS_DOEPCTL(privep->epphy); + doepctl = stm32l4_getreg(regaddr); + dsts = stm32l4_getreg(STM32L4_OTGFS_DSTS); /* EONUM = 0:even frame, 1:odd frame * SOFFN = Frame number of the received SOF @@ -3532,16 +3532,16 @@ static inline void stm32_isocoutinterrupt(FAR struct stm32_usbdev_s *priv) * disable the endpoint. */ - stm32_req_complete(privep, -EIO); + stm32l4_req_complete(privep, -EIO); #warning "Will clear OTGFS_DOEPCTL_USBAEP too" - stm32_epout_disable(privep); + stm32l4_epout_disable(privep); break; } } #endif /**************************************************************************** - * Name: stm32_sessioninterrupt + * Name: stm32l4_sessioninterrupt * * Description: * Session request/new session detected interrupt @@ -3549,14 +3549,14 @@ static inline void stm32_isocoutinterrupt(FAR struct stm32_usbdev_s *priv) ****************************************************************************/ #ifdef CONFIG_USBDEV_VBUSSENSING -static inline void stm32_sessioninterrupt(FAR struct stm32_usbdev_s *priv) +static inline void stm32l4_sessioninterrupt(FAR struct stm32l4_usbdev_s *priv) { #warning "Missing logic" } #endif /**************************************************************************** - * Name: stm32_otginterrupt + * Name: stm32l4_otginterrupt * * Description: * OTG interrupt @@ -3564,13 +3564,13 @@ static inline void stm32_sessioninterrupt(FAR struct stm32_usbdev_s *priv) ****************************************************************************/ #ifdef CONFIG_USBDEV_VBUSSENSING -static inline void stm32_otginterrupt(FAR struct stm32_usbdev_s *priv) +static inline void stm32l4_otginterrupt(FAR struct stm32l4_usbdev_s *priv) { uint32_t regval; /* Check for session end detected */ - regval = stm32_getreg(STM32_OTGFS_GOTGINT); + regval = stm32l4_getreg(STM32L4_OTGFS_GOTGINT); if ((regval & OTGFS_GOTGINT_SEDET) != 0) { #warning "Missing logic" @@ -3578,19 +3578,19 @@ static inline void stm32_otginterrupt(FAR struct stm32_usbdev_s *priv) /* Clear OTG interrupt */ - stm32_putreg(regval, STM32_OTGFS_GOTGINT); + stm32l4_putreg(regval, STM32L4_OTGFS_GOTGINT); } #endif /**************************************************************************** - * Name: stm32_usbinterrupt + * Name: stm32l4_usbinterrupt * * Description: * USB interrupt handler * ****************************************************************************/ -static int stm32_usbinterrupt(int irq, FAR void *context) +static int stm32l4_usbinterrupt(int irq, FAR void *context) { /* At present, there is only a single OTG FS device support. Hence it is * pre-allocated as g_otgfsdev. However, in most code, the private data @@ -3598,14 +3598,14 @@ static int stm32_usbinterrupt(int irq, FAR void *context) * global data) in order to simplify any future support for multiple devices. */ - FAR struct stm32_usbdev_s *priv = &g_otgfsdev; + FAR struct stm32l4_usbdev_s *priv = &g_otgfsdev; uint32_t regval; - usbtrace(TRACE_INTENTRY(STM32_TRACEINTID_USB), 0); + usbtrace(TRACE_INTENTRY(STM32L4_TRACEINTID_USB), 0); /* Assure that we are in device mode */ - DEBUGASSERT((stm32_getreg(STM32_OTGFS_GINTSTS) & OTGFS_GINTSTS_CMOD) == OTGFS_GINTSTS_DEVMODE); + DEBUGASSERT((stm32l4_getreg(STM32L4_OTGFS_GINTSTS) & OTGFS_GINTSTS_CMOD) == OTGFS_GINTSTS_DEVMODE); /* Get the state of all enabled interrupts. We will do this repeatedly * some interrupts (like RXFLVL) will generate additional interrupting @@ -3616,8 +3616,8 @@ static int stm32_usbinterrupt(int irq, FAR void *context) { /* Get the set of pending, un-masked interrupts */ - regval = stm32_getreg(STM32_OTGFS_GINTSTS); - regval &= stm32_getreg(STM32_OTGFS_GINTMSK); + regval = stm32l4_getreg(STM32L4_OTGFS_GINTSTS); + regval &= stm32l4_getreg(STM32L4_OTGFS_GINTMSK); /* Break out of the loop when there are no further pending (and * unmasked) interrupts to be processes. @@ -3627,7 +3627,7 @@ static int stm32_usbinterrupt(int irq, FAR void *context) { break; } - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_INTPENDING), (uint16_t)regval); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_INTPENDING), (uint16_t)regval); /* OUT endpoint interrupt. The core sets this bit to indicate that an * interrupt is pending on one of the OUT endpoints of the core. @@ -3635,9 +3635,9 @@ static int stm32_usbinterrupt(int irq, FAR void *context) if ((regval & OTGFS_GINT_OEP) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPOUT), (uint16_t)regval); - stm32_epout_interrupt(priv); - stm32_putreg(OTGFS_GINT_OEP, STM32_OTGFS_GINTSTS); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_EPOUT), (uint16_t)regval); + stm32l4_epout_interrupt(priv); + stm32l4_putreg(OTGFS_GINT_OEP, STM32L4_OTGFS_GINTSTS); } /* IN endpoint interrupt. The core sets this bit to indicate that @@ -3646,9 +3646,9 @@ static int stm32_usbinterrupt(int irq, FAR void *context) if ((regval & OTGFS_GINT_IEP) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_EPIN), (uint16_t)regval); - stm32_epin_interrupt(priv); - stm32_putreg(OTGFS_GINT_IEP, STM32_OTGFS_GINTSTS); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_EPIN), (uint16_t)regval); + stm32l4_epin_interrupt(priv); + stm32l4_putreg(OTGFS_GINT_IEP, STM32L4_OTGFS_GINTSTS); } /* Host/device mode mismatch error interrupt */ @@ -3656,8 +3656,8 @@ static int stm32_usbinterrupt(int irq, FAR void *context) #ifdef CONFIG_DEBUG_USB if ((regval & OTGFS_GINT_MMIS) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_MISMATCH), (uint16_t)regval); - stm32_putreg(OTGFS_GINT_MMIS, STM32_OTGFS_GINTSTS); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_MISMATCH), (uint16_t)regval); + stm32l4_putreg(OTGFS_GINT_MMIS, STM32L4_OTGFS_GINTSTS); } #endif @@ -3665,18 +3665,18 @@ static int stm32_usbinterrupt(int irq, FAR void *context) if ((regval & OTGFS_GINT_WKUP) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_WAKEUP), (uint16_t)regval); - stm32_resumeinterrupt(priv); - stm32_putreg(OTGFS_GINT_WKUP, STM32_OTGFS_GINTSTS); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_WAKEUP), (uint16_t)regval); + stm32l4_resumeinterrupt(priv); + stm32l4_putreg(OTGFS_GINT_WKUP, STM32L4_OTGFS_GINTSTS); } /* USB suspend interrupt */ if ((regval & OTGFS_GINT_USBSUSP) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SUSPEND), (uint16_t)regval); - stm32_suspendinterrupt(priv); - stm32_putreg(OTGFS_GINT_USBSUSP, STM32_OTGFS_GINTSTS); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_SUSPEND), (uint16_t)regval); + stm32l4_suspendinterrupt(priv); + stm32l4_putreg(OTGFS_GINT_USBSUSP, STM32L4_OTGFS_GINTSTS); } /* Start of frame interrupt */ @@ -3684,8 +3684,8 @@ static int stm32_usbinterrupt(int irq, FAR void *context) #ifdef CONFIG_USBDEV_SOFINTERRUPT if ((regval & OTGFS_GINT_SOF) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SOF), (uint16_t)regval); - stm32_putreg(OTGFS_GINT_SOF, STM32_OTGFS_GINTSTS); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_SOF), (uint16_t)regval); + stm32l4_putreg(OTGFS_GINT_SOF, STM32L4_OTGFS_GINTSTS); } #endif @@ -3695,22 +3695,22 @@ static int stm32_usbinterrupt(int irq, FAR void *context) if ((regval & OTGFS_GINT_RXFLVL) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_RXFIFO), (uint16_t)regval); - stm32_rxinterrupt(priv); - stm32_putreg(OTGFS_GINT_RXFLVL, STM32_OTGFS_GINTSTS); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_RXFIFO), (uint16_t)regval); + stm32l4_rxinterrupt(priv); + stm32l4_putreg(OTGFS_GINT_RXFLVL, STM32L4_OTGFS_GINTSTS); } /* USB reset interrupt */ if ((regval & OTGFS_GINT_USBRST) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_DEVRESET), (uint16_t)regval); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_DEVRESET), (uint16_t)regval); /* Perform the device reset */ - stm32_usbreset(priv); - usbtrace(TRACE_INTEXIT(STM32_TRACEINTID_USB), 0); - stm32_putreg(OTGFS_GINT_USBRST, STM32_OTGFS_GINTSTS); + stm32l4_usbreset(priv); + usbtrace(TRACE_INTEXIT(STM32L4_TRACEINTID_USB), 0); + stm32l4_putreg(OTGFS_GINT_USBRST, STM32L4_OTGFS_GINTSTS); return OK; } @@ -3718,9 +3718,9 @@ static int stm32_usbinterrupt(int irq, FAR void *context) if ((regval & OTGFS_GINT_ENUMDNE) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_ENUMDNE), (uint16_t)regval); - stm32_enuminterrupt(priv); - stm32_putreg(OTGFS_GINT_ENUMDNE, STM32_OTGFS_GINTSTS); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_ENUMDNE), (uint16_t)regval); + stm32l4_enuminterrupt(priv); + stm32l4_putreg(OTGFS_GINT_ENUMDNE, STM32L4_OTGFS_GINTSTS); } /* Incomplete isochronous IN transfer interrupt. When the core finds @@ -3732,9 +3732,9 @@ static int stm32_usbinterrupt(int irq, FAR void *context) #ifdef CONFIG_USBDEV_ISOCHRONOUS if ((regval & OTGFS_GINT_IISOIXFR) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_IISOIXFR), (uint16_t)regval); - stm32_isocininterrupt(priv); - stm32_putreg(OTGFS_GINT_IISOIXFR, STM32_OTGFS_GINTSTS); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_IISOIXFR), (uint16_t)regval); + stm32l4_isocininterrupt(priv); + stm32l4_putreg(OTGFS_GINT_IISOIXFR, STM32L4_OTGFS_GINTSTS); } /* Incomplete isochronous OUT transfer. For isochronous OUT @@ -3749,9 +3749,9 @@ static int stm32_usbinterrupt(int irq, FAR void *context) if ((regval & OTGFS_GINT_IISOOXFR) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_IISOOXFR), (uint16_t)regval); - stm32_isocoutinterrupt(priv); - stm32_putreg(OTGFS_GINT_IISOOXFR, STM32_OTGFS_GINTSTS); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_IISOOXFR), (uint16_t)regval); + stm32l4_isocoutinterrupt(priv); + stm32l4_putreg(OTGFS_GINT_IISOOXFR, STM32L4_OTGFS_GINTSTS); } #endif @@ -3760,23 +3760,23 @@ static int stm32_usbinterrupt(int irq, FAR void *context) #ifdef CONFIG_USBDEV_VBUSSENSING if ((regval & OTGFS_GINT_SRQ) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SRQ), (uint16_t)regval); - stm32_sessioninterrupt(priv); - stm32_putreg(OTGFS_GINT_SRQ, STM32_OTGFS_GINTSTS); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_SRQ), (uint16_t)regval); + stm32l4_sessioninterrupt(priv); + stm32l4_putreg(OTGFS_GINT_SRQ, STM32L4_OTGFS_GINTSTS); } /* OTG interrupt */ if ((regval & OTGFS_GINT_OTG) != 0) { - usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_OTG), (uint16_t)regval); - stm32_otginterrupt(priv); - stm32_putreg(OTGFS_GINT_OTG, STM32_OTGFS_GINTSTS); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_OTG), (uint16_t)regval); + stm32l4_otginterrupt(priv); + stm32l4_putreg(OTGFS_GINT_OTG, STM32L4_OTGFS_GINTSTS); } #endif } - usbtrace(TRACE_INTEXIT(STM32_TRACEINTID_USB), 0); + usbtrace(TRACE_INTEXIT(STM32L4_TRACEINTID_USB), 0); return OK; } @@ -3785,28 +3785,28 @@ static int stm32_usbinterrupt(int irq, FAR void *context) ****************************************************************************/ /**************************************************************************** - * Name: stm32_enablegonak + * Name: stm32l4_enablegonak * * Description: * Enable global OUT NAK mode * ****************************************************************************/ -static void stm32_enablegonak(FAR struct stm32_ep_s *privep) +static void stm32l4_enablegonak(FAR struct stm32l4_ep_s *privep) { uint32_t regval; /* First, make sure that there is no GNOAKEFF interrupt pending. */ #if 0 - stm32_putreg(OTGFS_GINT_GONAKEFF, STM32_OTGFS_GINTSTS); + stm32l4_putreg(OTGFS_GINT_GONAKEFF, STM32L4_OTGFS_GINTSTS); #endif /* Enable Global OUT NAK mode in the core. */ - regval = stm32_getreg(STM32_OTGFS_DCTL); + regval = stm32l4_getreg(STM32L4_OTGFS_DCTL); regval |= OTGFS_DCTL_SGONAK; - stm32_putreg(regval, STM32_OTGFS_DCTL); + stm32l4_putreg(regval, STM32L4_OTGFS_DCTL); #if 0 /* Wait for the GONAKEFF interrupt that indicates that the OUT NAK @@ -3814,8 +3814,8 @@ static void stm32_enablegonak(FAR struct stm32_ep_s *privep) * from the RxFIFO, the core sets the GONAKEFF interrupt. */ - while ((stm32_getreg(STM32_OTGFS_GINTSTS) & OTGFS_GINT_GONAKEFF) == 0); - stm32_putreg(OTGFS_GINT_GONAKEFF, STM32_OTGFS_GINTSTS); + while ((stm32l4_getreg(STM32L4_OTGFS_GINTSTS) & OTGFS_GINT_GONAKEFF) == 0); + stm32l4_putreg(OTGFS_GINT_GONAKEFF, STM32L4_OTGFS_GINTSTS); #else /* Since we are in the interrupt handler, we cannot wait inline for the @@ -3826,31 +3826,31 @@ static void stm32_enablegonak(FAR struct stm32_ep_s *privep) * in OTGFS DCTL register? */ - while ((stm32_getreg(STM32_OTGFS_DCTL) & OTGFS_DCTL_GONSTS) == 0); + while ((stm32l4_getreg(STM32L4_OTGFS_DCTL) & OTGFS_DCTL_GONSTS) == 0); #endif } /**************************************************************************** - * Name: stm32_disablegonak + * Name: stm32l4_disablegonak * * Description: * Disable global OUT NAK mode * ****************************************************************************/ -static void stm32_disablegonak(FAR struct stm32_ep_s *privep) +static void stm32l4_disablegonak(FAR struct stm32l4_ep_s *privep) { uint32_t regval; /* Set the "Clear the Global OUT NAK bit" to disable global OUT NAK mode */ - regval = stm32_getreg(STM32_OTGFS_DCTL); + regval = stm32l4_getreg(STM32L4_OTGFS_DCTL); regval |= OTGFS_DCTL_CGONAK; - stm32_putreg(regval, STM32_OTGFS_DCTL); + stm32l4_putreg(regval, STM32L4_OTGFS_DCTL); } /**************************************************************************** - * Name: stm32_epout_configure + * Name: stm32l4_epout_configure * * Description: * Configure an OUT endpoint, making it usable @@ -3862,7 +3862,7 @@ static void stm32_disablegonak(FAR struct stm32_ep_s *privep) * ****************************************************************************/ -static int stm32_epout_configure(FAR struct stm32_ep_s *privep, uint8_t eptype, +static int stm32l4_epout_configure(FAR struct stm32l4_ep_s *privep, uint8_t eptype, uint16_t maxpacket) { uint32_t mpsiz; @@ -3914,8 +3914,8 @@ static int stm32_epout_configure(FAR struct stm32_ep_s *privep, uint8_t eptype, * register. */ - regaddr = STM32_OTGFS_DOEPCTL(privep->epphy); - regval = stm32_getreg(regaddr); + regaddr = STM32L4_OTGFS_DOEPCTL(privep->epphy); + regval = stm32l4_getreg(regaddr); if ((regval & OTGFS_DOEPCTL_USBAEP) == 0) { if (regval & OTGFS_DOEPCTL_NAKSTS) @@ -3927,7 +3927,7 @@ static int stm32_epout_configure(FAR struct stm32_ep_s *privep, uint8_t eptype, regval |= mpsiz; regval |= (eptype << OTGFS_DOEPCTL_EPTYP_SHIFT); regval |= (OTGFS_DOEPCTL_SD0PID | OTGFS_DOEPCTL_USBAEP); - stm32_putreg(regval, regaddr); + stm32l4_putreg(regval, regaddr); /* Save the endpoint configuration */ @@ -3938,14 +3938,14 @@ static int stm32_epout_configure(FAR struct stm32_ep_s *privep, uint8_t eptype, /* Enable the interrupt for this endpoint */ - regval = stm32_getreg(STM32_OTGFS_DAINTMSK); + regval = stm32l4_getreg(STM32L4_OTGFS_DAINTMSK); regval |= OTGFS_DAINT_OEP(privep->epphy); - stm32_putreg(regval, STM32_OTGFS_DAINTMSK); + stm32l4_putreg(regval, STM32L4_OTGFS_DAINTMSK); return OK; } /**************************************************************************** - * Name: stm32_epin_configure + * Name: stm32l4_epin_configure * * Description: * Configure an IN endpoint, making it usable @@ -3957,7 +3957,7 @@ static int stm32_epout_configure(FAR struct stm32_ep_s *privep, uint8_t eptype, * ****************************************************************************/ -static int stm32_epin_configure(FAR struct stm32_ep_s *privep, uint8_t eptype, +static int stm32l4_epin_configure(FAR struct stm32l4_ep_s *privep, uint8_t eptype, uint16_t maxpacket) { uint32_t mpsiz; @@ -4010,8 +4010,8 @@ static int stm32_epin_configure(FAR struct stm32_ep_s *privep, uint8_t eptype, * register. */ - regaddr = STM32_OTGFS_DIEPCTL(privep->epphy); - regval = stm32_getreg(regaddr); + regaddr = STM32L4_OTGFS_DIEPCTL(privep->epphy); + regval = stm32l4_getreg(regaddr); if ((regval & OTGFS_DIEPCTL_USBAEP) == 0) { if (regval & OTGFS_DIEPCTL_NAKSTS) @@ -4024,7 +4024,7 @@ static int stm32_epin_configure(FAR struct stm32_ep_s *privep, uint8_t eptype, regval |= (eptype << OTGFS_DIEPCTL_EPTYP_SHIFT); regval |= (eptype << OTGFS_DIEPCTL_TXFNUM_SHIFT); regval |= (OTGFS_DIEPCTL_SD0PID | OTGFS_DIEPCTL_USBAEP); - stm32_putreg(regval, regaddr); + stm32l4_putreg(regval, regaddr); /* Save the endpoint configuration */ @@ -4035,15 +4035,15 @@ static int stm32_epin_configure(FAR struct stm32_ep_s *privep, uint8_t eptype, /* Enable the interrupt for this endpoint */ - regval = stm32_getreg(STM32_OTGFS_DAINTMSK); + regval = stm32l4_getreg(STM32L4_OTGFS_DAINTMSK); regval |= OTGFS_DAINT_IEP(privep->epphy); - stm32_putreg(regval, STM32_OTGFS_DAINTMSK); + stm32l4_putreg(regval, STM32L4_OTGFS_DAINTMSK); return OK; } /**************************************************************************** - * Name: stm32_ep_configure + * Name: stm32l4_ep_configure * * Description: * Configure endpoint, making it usable @@ -4057,11 +4057,11 @@ static int stm32_epin_configure(FAR struct stm32_ep_s *privep, uint8_t eptype, * ****************************************************************************/ -static int stm32_ep_configure(FAR struct usbdev_ep_s *ep, +static int stm32l4_ep_configure(FAR struct usbdev_ep_s *ep, FAR const struct usb_epdesc_s *desc, bool last) { - FAR struct stm32_ep_s *privep = (FAR struct stm32_ep_s *)ep; + FAR struct stm32l4_ep_s *privep = (FAR struct stm32l4_ep_s *)ep; uint16_t maxpacket; uint8_t eptype; int ret; @@ -4078,43 +4078,43 @@ static int stm32_ep_configure(FAR struct usbdev_ep_s *ep, if (privep->isin) { - ret = stm32_epin_configure(privep, eptype, maxpacket); + ret = stm32l4_epin_configure(privep, eptype, maxpacket); } else { - ret = stm32_epout_configure(privep, eptype, maxpacket); + ret = stm32l4_epout_configure(privep, eptype, maxpacket); } return ret; } /**************************************************************************** - * Name: stm32_ep0_configure + * Name: stm32l4_ep0_configure * * Description: * Reset Usb engine * ****************************************************************************/ -static void stm32_ep0_configure(FAR struct stm32_usbdev_s *priv) +static void stm32l4_ep0_configure(FAR struct stm32l4_usbdev_s *priv) { /* Enable EP0 IN and OUT */ - (void)stm32_epin_configure(&priv->epin[EP0], USB_EP_ATTR_XFER_CONTROL, + (void)stm32l4_epin_configure(&priv->epin[EP0], USB_EP_ATTR_XFER_CONTROL, CONFIG_USBDEV_EP0_MAXSIZE); - (void)stm32_epout_configure(&priv->epout[EP0], USB_EP_ATTR_XFER_CONTROL, + (void)stm32l4_epout_configure(&priv->epout[EP0], USB_EP_ATTR_XFER_CONTROL, CONFIG_USBDEV_EP0_MAXSIZE); } /**************************************************************************** - * Name: stm32_epout_disable + * Name: stm32l4_epout_disable * * Description: * Diable an OUT endpoint will no longer be used * ****************************************************************************/ -static void stm32_epout_disable(FAR struct stm32_ep_s *privep) +static void stm32l4_epout_disable(FAR struct stm32l4_ep_s *privep) { uint32_t regaddr; uint32_t regval; @@ -4129,25 +4129,25 @@ static void stm32_epout_disable(FAR struct stm32_ep_s *privep) */ flags = enter_critical_section(); - stm32_enablegonak(privep); + stm32l4_enablegonak(privep); /* Disable the required OUT endpoint by setting the EPDIS and SNAK bits * int DOECPTL register. */ - regaddr = STM32_OTGFS_DOEPCTL(privep->epphy); - regval = stm32_getreg(regaddr); + regaddr = STM32L4_OTGFS_DOEPCTL(privep->epphy); + regval = stm32l4_getreg(regaddr); regval &= ~OTGFS_DOEPCTL_USBAEP; regval |= (OTGFS_DOEPCTL_EPDIS | OTGFS_DOEPCTL_SNAK); - stm32_putreg(regval, regaddr); + stm32l4_putreg(regval, regaddr); /* Wait for the EPDISD interrupt which indicates that the OUT * endpoint is completely disabled. */ #if 0 /* Doesn't happen */ - regaddr = STM32_OTGFS_DOEPINT(privep->epphy); - while ((stm32_getreg(regaddr) & OTGFS_DOEPINT_EPDISD) == 0); + regaddr = STM32L4_OTGFS_DOEPINT(privep->epphy); + while ((stm32l4_getreg(regaddr) & OTGFS_DOEPINT_EPDISD) == 0); #else /* REVISIT: */ up_udelay(10); @@ -4155,36 +4155,36 @@ static void stm32_epout_disable(FAR struct stm32_ep_s *privep) /* Clear the EPDISD interrupt indication */ - stm32_putreg(OTGFS_DOEPINT_EPDISD, STM32_OTGFS_DOEPINT(privep->epphy)); + stm32l4_putreg(OTGFS_DOEPINT_EPDISD, STM32L4_OTGFS_DOEPINT(privep->epphy)); /* Then disable the Global OUT NAK mode to continue receiving data * from other non-disabled OUT endpoints. */ - stm32_disablegonak(privep); + stm32l4_disablegonak(privep); /* Disable endpoint interrupts */ - regval = stm32_getreg(STM32_OTGFS_DAINTMSK); + regval = stm32l4_getreg(STM32L4_OTGFS_DAINTMSK); regval &= ~OTGFS_DAINT_OEP(privep->epphy); - stm32_putreg(regval, STM32_OTGFS_DAINTMSK); + stm32l4_putreg(regval, STM32L4_OTGFS_DAINTMSK); /* Cancel any queued read requests */ - stm32_req_cancel(privep, -ESHUTDOWN); + stm32l4_req_cancel(privep, -ESHUTDOWN); leave_critical_section(flags); } /**************************************************************************** - * Name: stm32_epin_disable + * Name: stm32l4_epin_disable * * Description: * Disable an IN endpoint when it will no longer be used * ****************************************************************************/ -static void stm32_epin_disable(FAR struct stm32_ep_s *privep) +static void stm32l4_epin_disable(FAR struct stm32l4_ep_s *privep) { uint32_t regaddr; uint32_t regval; @@ -4196,8 +4196,8 @@ static void stm32_epin_disable(FAR struct stm32_ep_s *privep) * hardware. Trying to disable again will just hang in the wait. */ - regaddr = STM32_OTGFS_DIEPCTL(privep->epphy); - regval = stm32_getreg(regaddr); + regaddr = STM32L4_OTGFS_DIEPCTL(privep->epphy); + regval = stm32l4_getreg(regaddr); if ((regval & OTGFS_DIEPCTL_USBAEP) == 0) { return; @@ -4212,24 +4212,24 @@ static void stm32_epin_disable(FAR struct stm32_ep_s *privep) * to poll this bit below). */ - stm32_putreg(OTGFS_DIEPINT_INEPNE, STM32_OTGFS_DIEPINT(privep->epphy)); + stm32l4_putreg(OTGFS_DIEPINT_INEPNE, STM32L4_OTGFS_DIEPINT(privep->epphy)); /* Set the endpoint in NAK mode */ - regaddr = STM32_OTGFS_DIEPCTL(privep->epphy); - regval = stm32_getreg(regaddr); + regaddr = STM32L4_OTGFS_DIEPCTL(privep->epphy); + regval = stm32l4_getreg(regaddr); regval &= ~OTGFS_DIEPCTL_USBAEP; regval |= (OTGFS_DIEPCTL_EPDIS | OTGFS_DIEPCTL_SNAK); - stm32_putreg(regval, regaddr); + stm32l4_putreg(regval, regaddr); /* Wait for the INEPNE interrupt that indicates that we are now in NAK mode */ - regaddr = STM32_OTGFS_DIEPINT(privep->epphy); - while ((stm32_getreg(regaddr) & OTGFS_DIEPINT_INEPNE) == 0); + regaddr = STM32L4_OTGFS_DIEPINT(privep->epphy); + while ((stm32l4_getreg(regaddr) & OTGFS_DIEPINT_INEPNE) == 0); /* Clear the INEPNE interrupt indication */ - stm32_putreg(OTGFS_DIEPINT_INEPNE, regaddr); + stm32l4_putreg(OTGFS_DIEPINT_INEPNE, regaddr); #endif /* Deactivate and disable the endpoint by setting the EPDIS and SNAK bits @@ -4237,55 +4237,55 @@ static void stm32_epin_disable(FAR struct stm32_ep_s *privep) */ flags = enter_critical_section(); - regaddr = STM32_OTGFS_DIEPCTL(privep->epphy); - regval = stm32_getreg(regaddr); + regaddr = STM32L4_OTGFS_DIEPCTL(privep->epphy); + regval = stm32l4_getreg(regaddr); regval &= ~OTGFS_DIEPCTL_USBAEP; regval |= (OTGFS_DIEPCTL_EPDIS | OTGFS_DIEPCTL_SNAK); - stm32_putreg(regval, regaddr); + stm32l4_putreg(regval, regaddr); /* Wait for the EPDISD interrupt which indicates that the IN * endpoint is completely disabled. */ - regaddr = STM32_OTGFS_DIEPINT(privep->epphy); - while ((stm32_getreg(regaddr) & OTGFS_DIEPINT_EPDISD) == 0); + regaddr = STM32L4_OTGFS_DIEPINT(privep->epphy); + while ((stm32l4_getreg(regaddr) & OTGFS_DIEPINT_EPDISD) == 0); /* Clear the EPDISD interrupt indication */ - stm32_putreg(OTGFS_DIEPINT_EPDISD, stm32_getreg(regaddr)); + stm32l4_putreg(OTGFS_DIEPINT_EPDISD, stm32l4_getreg(regaddr)); /* Flush any data remaining in the TxFIFO */ - stm32_txfifo_flush(OTGFS_GRSTCTL_TXFNUM_D(privep->epphy)); + stm32l4_txfifo_flush(OTGFS_GRSTCTL_TXFNUM_D(privep->epphy)); /* Disable endpoint interrupts */ - regval = stm32_getreg(STM32_OTGFS_DAINTMSK); + regval = stm32l4_getreg(STM32L4_OTGFS_DAINTMSK); regval &= ~OTGFS_DAINT_IEP(privep->epphy); - stm32_putreg(regval, STM32_OTGFS_DAINTMSK); + stm32l4_putreg(regval, STM32L4_OTGFS_DAINTMSK); /* Cancel any queued write requests */ - stm32_req_cancel(privep, -ESHUTDOWN); + stm32l4_req_cancel(privep, -ESHUTDOWN); leave_critical_section(flags); } /**************************************************************************** - * Name: stm32_ep_disable + * Name: stm32l4_ep_disable * * Description: * The endpoint will no longer be used * ****************************************************************************/ -static int stm32_ep_disable(FAR struct usbdev_ep_s *ep) +static int stm32l4_ep_disable(FAR struct usbdev_ep_s *ep) { - FAR struct stm32_ep_s *privep = (FAR struct stm32_ep_s *)ep; + FAR struct stm32l4_ep_s *privep = (FAR struct stm32l4_ep_s *)ep; #ifdef CONFIG_DEBUG_USB if (!ep) { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0); + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_INVALIDPARMS), 0); return -EINVAL; } #endif @@ -4298,77 +4298,77 @@ static int stm32_ep_disable(FAR struct usbdev_ep_s *ep) { /* Disable the IN endpoint */ - stm32_epin_disable(privep); + stm32l4_epin_disable(privep); } else { /* Disable the OUT endpoint */ - stm32_epout_disable(privep); + stm32l4_epout_disable(privep); } return OK; } /**************************************************************************** - * Name: stm32_ep_allocreq + * Name: stm32l4_ep_allocreq * * Description: * Allocate an I/O request * ****************************************************************************/ -static FAR struct usbdev_req_s *stm32_ep_allocreq(FAR struct usbdev_ep_s *ep) +static FAR struct usbdev_req_s *stm32l4_ep_allocreq(FAR struct usbdev_ep_s *ep) { - FAR struct stm32_req_s *privreq; + FAR struct stm32l4_req_s *privreq; #ifdef CONFIG_DEBUG_USB if (!ep) { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0); + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_INVALIDPARMS), 0); return NULL; } #endif - usbtrace(TRACE_EPALLOCREQ, ((FAR struct stm32_ep_s *)ep)->epphy); + usbtrace(TRACE_EPALLOCREQ, ((FAR struct stm32l4_ep_s *)ep)->epphy); - privreq = (FAR struct stm32_req_s *)kmm_malloc(sizeof(struct stm32_req_s)); + privreq = (FAR struct stm32l4_req_s *)kmm_malloc(sizeof(struct stm32l4_req_s)); if (!privreq) { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_ALLOCFAIL), 0); + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_ALLOCFAIL), 0); return NULL; } - memset(privreq, 0, sizeof(struct stm32_req_s)); + memset(privreq, 0, sizeof(struct stm32l4_req_s)); return &privreq->req; } /**************************************************************************** - * Name: stm32_ep_freereq + * Name: stm32l4_ep_freereq * * Description: * Free an I/O request * ****************************************************************************/ -static void stm32_ep_freereq(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *req) +static void stm32l4_ep_freereq(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *req) { - FAR struct stm32_req_s *privreq = (FAR struct stm32_req_s *)req; + FAR struct stm32l4_req_s *privreq = (FAR struct stm32l4_req_s *)req; #ifdef CONFIG_DEBUG_USB if (!ep || !req) { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0); + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_INVALIDPARMS), 0); return; } #endif - usbtrace(TRACE_EPFREEREQ, ((FAR struct stm32_ep_s *)ep)->epphy); + usbtrace(TRACE_EPFREEREQ, ((FAR struct stm32l4_ep_s *)ep)->epphy); kmm_free(privreq); } /**************************************************************************** - * Name: stm32_ep_allocbuffer + * Name: stm32l4_ep_allocbuffer * * Description: * Allocate an I/O buffer @@ -4376,7 +4376,7 @@ static void stm32_ep_freereq(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s ****************************************************************************/ #ifdef CONFIG_USBDEV_DMA -static void *stm32_ep_allocbuffer(FAR struct usbdev_ep_s *ep, unsigned bytes) +static void *stm32l4_ep_allocbuffer(FAR struct usbdev_ep_s *ep, unsigned bytes) { usbtrace(TRACE_EPALLOCBUFFER, privep->epphy); @@ -4389,7 +4389,7 @@ static void *stm32_ep_allocbuffer(FAR struct usbdev_ep_s *ep, unsigned bytes) #endif /**************************************************************************** - * Name: stm32_ep_freebuffer + * Name: stm32l4_ep_freebuffer * * Description: * Free an I/O buffer @@ -4397,7 +4397,7 @@ static void *stm32_ep_allocbuffer(FAR struct usbdev_ep_s *ep, unsigned bytes) ****************************************************************************/ #ifdef CONFIG_USBDEV_DMA -static void stm32_ep_freebuffer(FAR struct usbdev_ep_s *ep, FAR void *buf) +static void stm32l4_ep_freebuffer(FAR struct usbdev_ep_s *ep, FAR void *buf) { usbtrace(TRACE_EPFREEBUFFER, privep->epphy); @@ -4410,18 +4410,18 @@ static void stm32_ep_freebuffer(FAR struct usbdev_ep_s *ep, FAR void *buf) #endif /**************************************************************************** - * Name: stm32_ep_submit + * Name: stm32l4_ep_submit * * Description: * Submit an I/O request to the endpoint * ****************************************************************************/ -static int stm32_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *req) +static int stm32l4_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *req) { - FAR struct stm32_req_s *privreq = (FAR struct stm32_req_s *)req; - FAR struct stm32_ep_s *privep = (FAR struct stm32_ep_s *)ep; - FAR struct stm32_usbdev_s *priv; + FAR struct stm32l4_req_s *privreq = (FAR struct stm32l4_req_s *)req; + FAR struct stm32l4_ep_s *privep = (FAR struct stm32l4_ep_s *)ep; + FAR struct stm32l4_usbdev_s *priv; irqstate_t flags; int ret = OK; @@ -4430,7 +4430,7 @@ static int stm32_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s * #ifdef CONFIG_DEBUG_USB if (!req || !req->callback || !req->buf || !ep) { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0); + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_INVALIDPARMS), 0); uinfo("req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep); return -EINVAL; } @@ -4442,7 +4442,7 @@ static int stm32_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s * #ifdef CONFIG_DEBUG_USB if (!priv->driver) { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_NOTCONFIGURED), priv->usbdev.speed); + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_NOTCONFIGURED), priv->usbdev.speed); return -ESHUTDOWN; } #endif @@ -4466,7 +4466,7 @@ static int stm32_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s * { /* Add the new request to the request queue for the endpoint. */ - if (stm32_req_addlast(privep, privreq) && !privep->active) + if (stm32l4_req_addlast(privep, privreq) && !privep->active) { /* If a request was added to an IN endpoint, then attempt to send * the request data buffer now. @@ -4482,7 +4482,7 @@ static int stm32_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s * if (!privep->active) { - stm32_epin_request(priv, privep); + stm32l4_epin_request(priv, privep); } } @@ -4494,7 +4494,7 @@ static int stm32_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s * else { usbtrace(TRACE_OUTREQQUEUED(privep->epphy), privreq->req.len); - stm32_epout_request(priv, privep); + stm32l4_epout_request(priv, privep); } } } @@ -4504,22 +4504,22 @@ static int stm32_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s * } /**************************************************************************** - * Name: stm32_ep_cancel + * Name: stm32l4_ep_cancel * * Description: * Cancel an I/O request previously sent to an endpoint * ****************************************************************************/ -static int stm32_ep_cancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *req) +static int stm32l4_ep_cancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *req) { - FAR struct stm32_ep_s *privep = (FAR struct stm32_ep_s *)ep; + FAR struct stm32l4_ep_s *privep = (FAR struct stm32l4_ep_s *)ep; irqstate_t flags; #ifdef CONFIG_DEBUG_USB if (!ep || !req) { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0); + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_INVALIDPARMS), 0); return -EINVAL; } #endif @@ -4534,20 +4534,20 @@ static int stm32_ep_cancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s * * but ... all other implementations cancel all requests ... */ - stm32_req_cancel(privep, -ESHUTDOWN); + stm32l4_req_cancel(privep, -ESHUTDOWN); leave_critical_section(flags); return OK; } /**************************************************************************** - * Name: stm32_epout_setstall + * Name: stm32l4_epout_setstall * * Description: * Stall an OUT endpoint * ****************************************************************************/ -static int stm32_epout_setstall(FAR struct stm32_ep_s *privep) +static int stm32l4_epout_setstall(FAR struct stm32l4_ep_s *privep) { #if 1 /* This implementation follows the requirements from the STM32 F4 reference @@ -4559,24 +4559,24 @@ static int stm32_epout_setstall(FAR struct stm32_ep_s *privep) /* Put the core in the Global OUT NAK mode */ - stm32_enablegonak(privep); + stm32l4_enablegonak(privep); /* Disable and STALL the OUT endpoint by setting the EPDIS and STALL bits * in the DOECPTL register. */ - regaddr = STM32_OTGFS_DOEPCTL(privep->epphy); - regval = stm32_getreg(regaddr); + regaddr = STM32L4_OTGFS_DOEPCTL(privep->epphy); + regval = stm32l4_getreg(regaddr); regval |= (OTGFS_DOEPCTL_EPDIS | OTGFS_DOEPCTL_STALL); - stm32_putreg(regval, regaddr); + stm32l4_putreg(regval, regaddr); /* Wait for the EPDISD interrupt which indicates that the OUT * endpoint is completely disabled. */ #if 0 /* Doesn't happen */ - regaddr = STM32_OTGFS_DOEPINT(privep->epphy); - while ((stm32_getreg(regaddr) & OTGFS_DOEPINT_EPDISD) == 0); + regaddr = STM32L4_OTGFS_DOEPINT(privep->epphy); + while ((stm32l4_getreg(regaddr) & OTGFS_DOEPINT_EPDISD) == 0); #else /* REVISIT: */ up_udelay(10); @@ -4584,7 +4584,7 @@ static int stm32_epout_setstall(FAR struct stm32_ep_s *privep) /* Disable Global OUT NAK mode */ - stm32_disablegonak(privep); + stm32l4_disablegonak(privep); /* The endpoint is now stalled */ @@ -4599,10 +4599,10 @@ static int stm32_epout_setstall(FAR struct stm32_ep_s *privep) /* Stall the OUT endpoint by setting the STALL bit in the DOECPTL register. */ - regaddr = STM32_OTGFS_DOEPCTL(privep->epphy); - regval = stm32_getreg(regaddr); + regaddr = STM32L4_OTGFS_DOEPCTL(privep->epphy); + regval = stm32l4_getreg(regaddr); regval |= OTGFS_DOEPCTL_STALL; - stm32_putreg(regval, regaddr); + stm32l4_putreg(regval, regaddr); /* The endpoint is now stalled */ @@ -4612,27 +4612,27 @@ static int stm32_epout_setstall(FAR struct stm32_ep_s *privep) } /**************************************************************************** - * Name: stm32_epin_setstall + * Name: stm32l4_epin_setstall * * Description: * Stall an IN endpoint * ****************************************************************************/ -static int stm32_epin_setstall(FAR struct stm32_ep_s *privep) +static int stm32l4_epin_setstall(FAR struct stm32l4_ep_s *privep) { uint32_t regaddr; uint32_t regval; /* Get the IN endpoint device control register */ - regaddr = STM32_OTGFS_DIEPCTL(privep->epphy); - regval = stm32_getreg(regaddr); + regaddr = STM32L4_OTGFS_DIEPCTL(privep->epphy); + regval = stm32l4_getreg(regaddr); /* Then stall the endpoint */ regval |= OTGFS_DIEPCTL_STALL; - stm32_putreg(regval, regaddr); + stm32l4_putreg(regval, regaddr); /* The endpoint is now stalled */ @@ -4641,14 +4641,14 @@ static int stm32_epin_setstall(FAR struct stm32_ep_s *privep) } /**************************************************************************** - * Name: stm32_ep_setstall + * Name: stm32l4_ep_setstall * * Description: * Stall an endpoint * ****************************************************************************/ -static int stm32_ep_setstall(FAR struct stm32_ep_s *privep) +static int stm32l4_ep_setstall(FAR struct stm32l4_ep_s *privep) { usbtrace(TRACE_EPSTALL, privep->epphy); @@ -4656,23 +4656,23 @@ static int stm32_ep_setstall(FAR struct stm32_ep_s *privep) if (privep->isin == 1) { - return stm32_epin_setstall(privep); + return stm32l4_epin_setstall(privep); } else { - return stm32_epout_setstall(privep); + return stm32l4_epout_setstall(privep); } } /**************************************************************************** - * Name: stm32_ep_clrstall + * Name: stm32l4_ep_clrstall * * Description: * Resume a stalled endpoint * ****************************************************************************/ -static int stm32_ep_clrstall(FAR struct stm32_ep_s *privep) +static int stm32l4_ep_clrstall(FAR struct stm32l4_ep_s *privep) { uint32_t regaddr; uint32_t regval; @@ -4687,7 +4687,7 @@ static int stm32_ep_clrstall(FAR struct stm32_ep_s *privep) { /* Clear the stall bit in the IN endpoint device control register */ - regaddr = STM32_OTGFS_DIEPCTL(privep->epphy); + regaddr = STM32L4_OTGFS_DIEPCTL(privep->epphy); stallbit = OTGFS_DIEPCTL_STALL; data0bit = OTGFS_DIEPCTL_SD0PID; } @@ -4695,14 +4695,14 @@ static int stm32_ep_clrstall(FAR struct stm32_ep_s *privep) { /* Clear the stall bit in the IN endpoint device control register */ - regaddr = STM32_OTGFS_DOEPCTL(privep->epphy); + regaddr = STM32L4_OTGFS_DOEPCTL(privep->epphy); stallbit = OTGFS_DOEPCTL_STALL; data0bit = OTGFS_DOEPCTL_SD0PID; } /* Clear the stall bit */ - regval = stm32_getreg(regaddr); + regval = stm32l4_getreg(regaddr); regval &= ~stallbit; /* Set the DATA0 pid for interrupt and bulk endpoints */ @@ -4715,7 +4715,7 @@ static int stm32_ep_clrstall(FAR struct stm32_ep_s *privep) regval |= data0bit; } - stm32_putreg(regval, regaddr); + stm32l4_putreg(regval, regaddr); /* The endpoint is no longer stalled */ @@ -4724,16 +4724,16 @@ static int stm32_ep_clrstall(FAR struct stm32_ep_s *privep) } /**************************************************************************** - * Name: stm32_ep_stall + * Name: stm32l4_ep_stall * * Description: * Stall or resume an endpoint * ****************************************************************************/ -static int stm32_ep_stall(FAR struct usbdev_ep_s *ep, bool resume) +static int stm32l4_ep_stall(FAR struct usbdev_ep_s *ep, bool resume) { - FAR struct stm32_ep_s *privep = (FAR struct stm32_ep_s *)ep; + FAR struct stm32l4_ep_s *privep = (FAR struct stm32l4_ep_s *)ep; irqstate_t flags; int ret; @@ -4742,11 +4742,11 @@ static int stm32_ep_stall(FAR struct usbdev_ep_s *ep, bool resume) flags = enter_critical_section(); if (resume) { - ret = stm32_ep_clrstall(privep); + ret = stm32l4_ep_clrstall(privep); } else { - ret = stm32_ep_setstall(privep); + ret = stm32l4_ep_setstall(privep); } leave_critical_section(flags); @@ -4754,19 +4754,19 @@ static int stm32_ep_stall(FAR struct usbdev_ep_s *ep, bool resume) } /**************************************************************************** - * Name: stm32_ep0_stall + * Name: stm32l4_ep0_stall * * Description: * Stall endpoint 0 * ****************************************************************************/ -static void stm32_ep0_stall(FAR struct stm32_usbdev_s *priv) +static void stm32l4_ep0_stall(FAR struct stm32l4_usbdev_s *priv) { - stm32_epin_setstall(&priv->epin[EP0]); - stm32_epout_setstall(&priv->epout[EP0]); + stm32l4_epin_setstall(&priv->epin[EP0]); + stm32l4_epout_setstall(&priv->epout[EP0]); priv->stalled = true; - stm32_ep0out_ctrlsetup(priv); + stm32l4_ep0out_ctrlsetup(priv); } /**************************************************************************** @@ -4774,7 +4774,7 @@ static void stm32_ep0_stall(FAR struct stm32_usbdev_s *priv) ****************************************************************************/ /**************************************************************************** - * Name: stm32_ep_alloc + * Name: stm32l4_ep_alloc * * Description: * Allocate an endpoint matching the parameters. @@ -4789,11 +4789,11 @@ static void stm32_ep0_stall(FAR struct stm32_usbdev_s *priv) * ****************************************************************************/ -static FAR struct usbdev_ep_s *stm32_ep_alloc(FAR struct usbdev_s *dev, +static FAR struct usbdev_ep_s *stm32l4_ep_alloc(FAR struct usbdev_s *dev, uint8_t eplog, bool in, uint8_t eptype) { - FAR struct stm32_usbdev_s *priv = (FAR struct stm32_usbdev_s *)dev; + FAR struct stm32l4_usbdev_s *priv = (FAR struct stm32l4_usbdev_s *)dev; uint8_t epavail; irqstate_t flags; int epphy; @@ -4821,9 +4821,9 @@ static FAR struct usbdev_ep_s *stm32_ep_alloc(FAR struct usbdev_s *dev, * by the hardware. */ - if (epphy >= STM32_NENDPOINTS) + if (epphy >= STM32L4_NENDPOINTS) { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_BADEPNO), (uint16_t)epphy); + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_BADEPNO), (uint16_t)epphy); return NULL; } @@ -4842,7 +4842,7 @@ static FAR struct usbdev_ep_s *stm32_ep_alloc(FAR struct usbdev_s *dev, * endpoints. */ - for (epno = 1; epno < STM32_NENDPOINTS; epno++) + for (epno = 1; epno < STM32L4_NENDPOINTS; epno++) { uint8_t bit = 1 << epno; if ((epavail & bit) != 0) @@ -4861,23 +4861,23 @@ static FAR struct usbdev_ep_s *stm32_ep_alloc(FAR struct usbdev_s *dev, /* We should not get here */ } - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_NOEP), (uint16_t)eplog); + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_NOEP), (uint16_t)eplog); leave_critical_section(flags); return NULL; } /**************************************************************************** - * Name: stm32_ep_free + * Name: stm32l4_ep_free * * Description: * Free the previously allocated endpoint * ****************************************************************************/ -static void stm32_ep_free(FAR struct usbdev_s *dev, FAR struct usbdev_ep_s *ep) +static void stm32l4_ep_free(FAR struct usbdev_s *dev, FAR struct usbdev_ep_s *ep) { - FAR struct stm32_usbdev_s *priv = (FAR struct stm32_usbdev_s *)dev; - FAR struct stm32_ep_s *privep = (FAR struct stm32_ep_s *)ep; + FAR struct stm32l4_usbdev_s *priv = (FAR struct stm32l4_usbdev_s *)dev; + FAR struct stm32l4_ep_s *privep = (FAR struct stm32l4_ep_s *)ep; irqstate_t flags; usbtrace(TRACE_DEVFREEEP, (uint16_t)privep->epphy); @@ -4893,14 +4893,14 @@ static void stm32_ep_free(FAR struct usbdev_s *dev, FAR struct usbdev_ep_s *ep) } /**************************************************************************** - * Name: stm32_getframe + * Name: stm32l4_getframe * * Description: * Returns the current frame number * ****************************************************************************/ -static int stm32_getframe(struct usbdev_s *dev) +static int stm32l4_getframe(struct usbdev_s *dev) { uint32_t regval; @@ -4908,21 +4908,21 @@ static int stm32_getframe(struct usbdev_s *dev) /* Return the last frame number of the last SOF detected by the hardware */ - regval = stm32_getreg(STM32_OTGFS_DSTS); + regval = stm32l4_getreg(STM32L4_OTGFS_DSTS); return (int)((regval & OTGFS_DSTS_SOFFN_MASK) >> OTGFS_DSTS_SOFFN_SHIFT); } /**************************************************************************** - * Name: stm32_wakeup + * Name: stm32l4_wakeup * * Description: * Exit suspend mode. * ****************************************************************************/ -static int stm32_wakeup(struct usbdev_s *dev) +static int stm32l4_wakeup(struct usbdev_s *dev) { - FAR struct stm32_usbdev_s *priv = (FAR struct stm32_usbdev_s *)dev; + FAR struct stm32l4_usbdev_s *priv = (FAR struct stm32l4_usbdev_s *)dev; uint32_t regval; irqstate_t flags; @@ -4935,24 +4935,24 @@ static int stm32_wakeup(struct usbdev_s *dev) { /* Yes... is the core suspended? */ - regval = stm32_getreg(STM32_OTGFS_DSTS); + regval = stm32l4_getreg(STM32L4_OTGFS_DSTS); if ((regval & OTGFS_DSTS_SUSPSTS) != 0) { /* Re-start the PHY clock and un-gate USB core clock (HCLK) */ #ifdef CONFIG_USBDEV_LOWPOWER - regval = stm32_getreg(STM32_OTGFS_PCGCCTL); + regval = stm32l4_getreg(STM32L4_OTGFS_PCGCCTL); regval &= ~(OTGFS_PCGCCTL_STPPCLK | OTGFS_PCGCCTL_GATEHCLK); - stm32_putreg(regval, STM32_OTGFS_PCGCCTL); + stm32l4_putreg(regval, STM32L4_OTGFS_PCGCCTL); #endif /* Activate Remote wakeup signaling */ - regval = stm32_getreg(STM32_OTGFS_DCTL); + regval = stm32l4_getreg(STM32L4_OTGFS_DCTL); regval |= OTGFS_DCTL_RWUSIG; - stm32_putreg(regval, STM32_OTGFS_DCTL); + stm32l4_putreg(regval, STM32L4_OTGFS_DCTL); up_mdelay(5); regval &= ~OTGFS_DCTL_RWUSIG; - stm32_putreg(regval, STM32_OTGFS_DCTL); + stm32l4_putreg(regval, STM32L4_OTGFS_DCTL); } } @@ -4961,23 +4961,23 @@ static int stm32_wakeup(struct usbdev_s *dev) } /**************************************************************************** - * Name: stm32_selfpowered + * Name: stm32l4_selfpowered * * Description: * Sets/clears the device self-powered feature * ****************************************************************************/ -static int stm32_selfpowered(struct usbdev_s *dev, bool selfpowered) +static int stm32l4_selfpowered(struct usbdev_s *dev, bool selfpowered) { - FAR struct stm32_usbdev_s *priv = (FAR struct stm32_usbdev_s *)dev; + FAR struct stm32l4_usbdev_s *priv = (FAR struct stm32l4_usbdev_s *)dev; usbtrace(TRACE_DEVSELFPOWERED, (uint16_t)selfpowered); #ifdef CONFIG_DEBUG_USB if (!dev) { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0); + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_INVALIDPARMS), 0); return -ENODEV; } #endif @@ -4987,21 +4987,21 @@ static int stm32_selfpowered(struct usbdev_s *dev, bool selfpowered) } /**************************************************************************** - * Name: stm32_pullup + * Name: stm32l4_pullup * * Description: * Software-controlled connect to/disconnect from USB host * ****************************************************************************/ -static int stm32_pullup(struct usbdev_s *dev, bool enable) +static int stm32l4_pullup(struct usbdev_s *dev, bool enable) { uint32_t regval; usbtrace(TRACE_DEVPULLUP, (uint16_t)enable); irqstate_t flags = enter_critical_section(); - regval = stm32_getreg(STM32_OTGFS_DCTL); + regval = stm32l4_getreg(STM32L4_OTGFS_DCTL); if (enable) { /* Connect the device by clearing the soft disconnect bit in the DCTL @@ -5019,29 +5019,29 @@ static int stm32_pullup(struct usbdev_s *dev, bool enable) regval |= OTGFS_DCTL_SDIS; } - stm32_putreg(regval, STM32_OTGFS_DCTL); + stm32l4_putreg(regval, STM32L4_OTGFS_DCTL); leave_critical_section(flags); return OK; } /**************************************************************************** - * Name: stm32_setaddress + * Name: stm32l4_setaddress * * Description: * Set the devices USB address * ****************************************************************************/ -static void stm32_setaddress(struct stm32_usbdev_s *priv, uint16_t address) +static void stm32l4_setaddress(struct stm32l4_usbdev_s *priv, uint16_t address) { uint32_t regval; /* Set the device address in the DCFG register */ - regval = stm32_getreg(STM32_OTGFS_DCFG); + regval = stm32l4_getreg(STM32L4_OTGFS_DCFG); regval &= ~OTGFS_DCFG_DAD_MASK; regval |= ((uint32_t)address << OTGFS_DCFG_DAD_SHIFT); - stm32_putreg(regval, STM32_OTGFS_DCFG); + stm32l4_putreg(regval, STM32L4_OTGFS_DCFG); /* Are we now addressed? (i.e., do we have a non-NULL device * address?) @@ -5060,14 +5060,14 @@ static void stm32_setaddress(struct stm32_usbdev_s *priv, uint16_t address) } /**************************************************************************** - * Name: stm32_txfifo_flush + * Name: stm32l4_txfifo_flush * * Description: * Flush the specific TX fifo. * ****************************************************************************/ -static int stm32_txfifo_flush(uint32_t txfnum) +static int stm32l4_txfifo_flush(uint32_t txfnum) { uint32_t regval; uint32_t timeout; @@ -5075,13 +5075,13 @@ static int stm32_txfifo_flush(uint32_t txfnum) /* Initiate the TX FIFO flush operation */ regval = OTGFS_GRSTCTL_TXFFLSH | txfnum; - stm32_putreg(regval, STM32_OTGFS_GRSTCTL); + stm32l4_putreg(regval, STM32L4_OTGFS_GRSTCTL); /* Wait for the FLUSH to complete */ - for (timeout = 0; timeout < STM32_FLUSH_DELAY; timeout++) + for (timeout = 0; timeout < STM32L4_FLUSH_DELAY; timeout++) { - regval = stm32_getreg(STM32_OTGFS_GRSTCTL); + regval = stm32l4_getreg(STM32L4_OTGFS_GRSTCTL); if ((regval & OTGFS_GRSTCTL_TXFFLSH) == 0) { break; @@ -5095,27 +5095,27 @@ static int stm32_txfifo_flush(uint32_t txfnum) } /**************************************************************************** - * Name: stm32_rxfifo_flush + * Name: stm32l4_rxfifo_flush * * Description: * Flush the RX fifo. * ****************************************************************************/ -static int stm32_rxfifo_flush(void) +static int stm32l4_rxfifo_flush(void) { uint32_t regval; uint32_t timeout; /* Initiate the RX FIFO flush operation */ - stm32_putreg(OTGFS_GRSTCTL_RXFFLSH, STM32_OTGFS_GRSTCTL); + stm32l4_putreg(OTGFS_GRSTCTL_RXFFLSH, STM32L4_OTGFS_GRSTCTL); /* Wait for the FLUSH to complete */ - for (timeout = 0; timeout < STM32_FLUSH_DELAY; timeout++) + for (timeout = 0; timeout < STM32L4_FLUSH_DELAY; timeout++) { - regval = stm32_getreg(STM32_OTGFS_GRSTCTL); + regval = stm32l4_getreg(STM32L4_OTGFS_GRSTCTL); if ((regval & OTGFS_GRSTCTL_RXFFLSH) == 0) { break; @@ -5129,34 +5129,34 @@ static int stm32_rxfifo_flush(void) } /**************************************************************************** - * Name: stm32_swinitialize + * Name: stm32l4_swinitialize * * Description: * Initialize all driver data structures. * ****************************************************************************/ -static void stm32_swinitialize(FAR struct stm32_usbdev_s *priv) +static void stm32l4_swinitialize(FAR struct stm32l4_usbdev_s *priv) { - FAR struct stm32_ep_s *privep; + FAR struct stm32l4_ep_s *privep; int i; /* Initialize the device state structure */ - memset(priv, 0, sizeof(struct stm32_usbdev_s)); + memset(priv, 0, sizeof(struct stm32l4_usbdev_s)); priv->usbdev.ops = &g_devops; priv->usbdev.ep0 = &priv->epin[EP0].ep; - priv->epavail[0] = STM32_EP_AVAILABLE; - priv->epavail[1] = STM32_EP_AVAILABLE; + priv->epavail[0] = STM32L4_EP_AVAILABLE; + priv->epavail[1] = STM32L4_EP_AVAILABLE; priv->epin[EP0].ep.priv = priv; priv->epout[EP0].ep.priv = priv; /* Initialize the IN endpoint list */ - for (i = 0; i < STM32_NENDPOINTS; i++) + for (i = 0; i < STM32L4_NENDPOINTS; i++) { /* Set endpoint operations, reference to driver structure (not * really necessary because there is only one controller), and @@ -5174,7 +5174,7 @@ static void stm32_swinitialize(FAR struct stm32_usbdev_s *priv) */ privep->epphy = i; - privep->ep.eplog = STM32_EPPHYIN2LOG(i); + privep->ep.eplog = STM32L4_EPPHYIN2LOG(i); /* Control until endpoint is activated */ @@ -5184,7 +5184,7 @@ static void stm32_swinitialize(FAR struct stm32_usbdev_s *priv) /* Initialize the OUT endpoint list */ - for (i = 0; i < STM32_NENDPOINTS; i++) + for (i = 0; i < STM32L4_NENDPOINTS; i++) { /* Set endpoint operations, reference to driver structure (not * really necessary because there is only one controller), and @@ -5201,7 +5201,7 @@ static void stm32_swinitialize(FAR struct stm32_usbdev_s *priv) */ privep->epphy = i; - privep->ep.eplog = STM32_EPPHYOUT2LOG(i); + privep->ep.eplog = STM32L4_EPPHYOUT2LOG(i); /* Control until endpoint is activated */ @@ -5211,14 +5211,14 @@ static void stm32_swinitialize(FAR struct stm32_usbdev_s *priv) } /**************************************************************************** - * Name: stm32_hwinitialize + * Name: stm32l4_hwinitialize * * Description: * Configure the OTG FS core for operation. * ****************************************************************************/ -static void stm32_hwinitialize(FAR struct stm32_usbdev_s *priv) +static void stm32l4_hwinitialize(FAR struct stm32l4_usbdev_s *priv) { uint32_t regval; uint32_t timeout; @@ -5236,17 +5236,17 @@ static void stm32_hwinitialize(FAR struct stm32_usbdev_s *priv) * interrupts will occur when the TxFIFO is truly empty (not just half full). */ - stm32_putreg(OTGFS_GAHBCFG_TXFELVL, STM32_OTGFS_GAHBCFG); + stm32l4_putreg(OTGFS_GAHBCFG_TXFELVL, STM32L4_OTGFS_GAHBCFG); /* Common USB OTG core initialization */ /* Reset after a PHY select and set Host mode. First, wait for AHB master * IDLE state. */ - for (timeout = 0; timeout < STM32_READY_DELAY; timeout++) + for (timeout = 0; timeout < STM32L4_READY_DELAY; timeout++) { up_udelay(3); - regval = stm32_getreg(STM32_OTGFS_GRSTCTL); + regval = stm32l4_getreg(STM32L4_OTGFS_GRSTCTL); if ((regval & OTGFS_GRSTCTL_AHBIDL) != 0) { break; @@ -5255,10 +5255,10 @@ static void stm32_hwinitialize(FAR struct stm32_usbdev_s *priv) /* Then perform the core soft reset. */ - stm32_putreg(OTGFS_GRSTCTL_CSRST, STM32_OTGFS_GRSTCTL); - for (timeout = 0; timeout < STM32_READY_DELAY; timeout++) + stm32l4_putreg(OTGFS_GRSTCTL_CSRST, STM32L4_OTGFS_GRSTCTL); + for (timeout = 0; timeout < STM32L4_READY_DELAY; timeout++) { - regval = stm32_getreg(STM32_OTGFS_GRSTCTL); + regval = stm32l4_getreg(STM32L4_OTGFS_GRSTCTL); if ((regval & OTGFS_GRSTCTL_CSRST) == 0) { break; @@ -5279,121 +5279,121 @@ static void stm32_hwinitialize(FAR struct stm32_usbdev_s *priv) regval |= OTGFS_GCCFG_VBDEN; # endif - stm32_putreg(regval, STM32_OTGFS_GCCFG); + stm32l4_putreg(regval, STM32L4_OTGFS_GCCFG); up_mdelay(20); /* When VBUS sensing is not used we need to force the B session valid */ # ifndef CONFIG_USBDEV_VBUSSENSING - regval = stm32_getreg(STM32_OTGFS_GOTGCTL); + regval = stm32l4_getreg(STM32L4_OTGFS_GOTGCTL); regval |= (OTGFS_GOTGCTL_BVALOEN | OTGFS_GOTGCTL_BVALOVAL); - stm32_putreg(regval, STM32_OTGFS_GOTGCTL); + stm32l4_putreg(regval, STM32L4_OTGFS_GOTGCTL); # endif /* Force Device Mode */ - regval = stm32_getreg(STM32_OTGFS_GUSBCFG); + regval = stm32l4_getreg(STM32L4_OTGFS_GUSBCFG); regval &= ~OTGFS_GUSBCFG_FHMOD; regval |= OTGFS_GUSBCFG_FDMOD; - stm32_putreg(regval, STM32_OTGFS_GUSBCFG); + stm32l4_putreg(regval, STM32L4_OTGFS_GUSBCFG); up_mdelay(50); /* Initialize device mode */ /* Restart the PHY Clock */ - stm32_putreg(0, STM32_OTGFS_PCGCCTL); + stm32l4_putreg(0, STM32L4_OTGFS_PCGCCTL); /* Device configuration register */ - regval = stm32_getreg(STM32_OTGFS_DCFG); + regval = stm32l4_getreg(STM32L4_OTGFS_DCFG); regval &= ~OTGFS_DCFG_PFIVL_MASK; regval |= OTGFS_DCFG_PFIVL_80PCT; - stm32_putreg(regval, STM32_OTGFS_DCFG); + stm32l4_putreg(regval, STM32L4_OTGFS_DCFG); /* Set full speed PHY */ - regval = stm32_getreg(STM32_OTGFS_DCFG); + regval = stm32l4_getreg(STM32L4_OTGFS_DCFG); regval &= ~OTGFS_DCFG_DSPD_MASK; regval |= OTGFS_DCFG_DSPD_FS; - stm32_putreg(regval, STM32_OTGFS_DCFG); + stm32l4_putreg(regval, STM32L4_OTGFS_DCFG); /* Set Rx FIFO size */ - stm32_putreg(STM32_RXFIFO_WORDS, STM32_OTGFS_GRXFSIZ); + stm32l4_putreg(STM32L4_RXFIFO_WORDS, STM32L4_OTGFS_GRXFSIZ); -#if STM32_NENDPOINTS > 0 +#if STM32L4_NENDPOINTS > 0 /* EP0 TX */ - address = STM32_RXFIFO_WORDS; + address = STM32L4_RXFIFO_WORDS; regval = (address << OTGFS_DIEPTXF0_TX0FD_SHIFT) | - (STM32_EP0_TXFIFO_WORDS << OTGFS_DIEPTXF0_TX0FSA_SHIFT); - stm32_putreg(regval, STM32_OTGFS_DIEPTXF0); + (STM32L4_EP0_TXFIFO_WORDS << OTGFS_DIEPTXF0_TX0FSA_SHIFT); + stm32l4_putreg(regval, STM32L4_OTGFS_DIEPTXF0); #endif -#if STM32_NENDPOINTS > 1 +#if STM32L4_NENDPOINTS > 1 /* EP1 TX */ - address += STM32_EP0_TXFIFO_WORDS; + address += STM32L4_EP0_TXFIFO_WORDS; regval = (address << OTGFS_DIEPTXF_INEPTXSA_SHIFT) | - (STM32_EP1_TXFIFO_WORDS << OTGFS_DIEPTXF_INEPTXFD_SHIFT); - stm32_putreg(regval, STM32_OTGFS_DIEPTXF1); + (STM32L4_EP1_TXFIFO_WORDS << OTGFS_DIEPTXF_INEPTXFD_SHIFT); + stm32l4_putreg(regval, STM32L4_OTGFS_DIEPTXF1); #endif -#if STM32_NENDPOINTS > 2 +#if STM32L4_NENDPOINTS > 2 /* EP2 TX */ - address += STM32_EP1_TXFIFO_WORDS; + address += STM32L4_EP1_TXFIFO_WORDS; regval = (address << OTGFS_DIEPTXF_INEPTXSA_SHIFT) | - (STM32_EP2_TXFIFO_WORDS << OTGFS_DIEPTXF_INEPTXFD_SHIFT); - stm32_putreg(regval, STM32_OTGFS_DIEPTXF2); + (STM32L4_EP2_TXFIFO_WORDS << OTGFS_DIEPTXF_INEPTXFD_SHIFT); + stm32l4_putreg(regval, STM32L4_OTGFS_DIEPTXF2); #endif -#if STM32_NENDPOINTS > 3 +#if STM32L4_NENDPOINTS > 3 /* EP3 TX */ - address += STM32_EP2_TXFIFO_WORDS; + address += STM32L4_EP2_TXFIFO_WORDS; regval = (address << OTGFS_DIEPTXF_INEPTXSA_SHIFT) | - (STM32_EP3_TXFIFO_WORDS << OTGFS_DIEPTXF_INEPTXFD_SHIFT); - stm32_putreg(regval, STM32_OTGFS_DIEPTXF3); + (STM32L4_EP3_TXFIFO_WORDS << OTGFS_DIEPTXF_INEPTXFD_SHIFT); + stm32l4_putreg(regval, STM32L4_OTGFS_DIEPTXF3); #endif -#if STM32_NENDPOINTS > 4 +#if STM32L4_NENDPOINTS > 4 /* EP4 TX */ - address += STM32_EP3_TXFIFO_WORDS; + address += STM32L4_EP3_TXFIFO_WORDS; regval = (address << OTGFS_DIEPTXF_INEPTXSA_SHIFT) | - (STM32_EP4_TXFIFO_WORDS << OTGFS_DIEPTXF_INEPTXFD_SHIFT); - stm32_putreg(regval, STM32_OTGFS_DIEPTXF4); + (STM32L4_EP4_TXFIFO_WORDS << OTGFS_DIEPTXF_INEPTXFD_SHIFT); + stm32l4_putreg(regval, STM32L4_OTGFS_DIEPTXF4); #endif -#if STM32_NENDPOINTS > 5 +#if STM32L4_NENDPOINTS > 5 /* EP5 TX */ - address += STM32_EP4_TXFIFO_WORDS; + address += STM32L4_EP4_TXFIFO_WORDS; regval = (address << OTGFS_DIEPTXF_INEPTXSA_SHIFT) | - (STM32_EP5_TXFIFO_WORDS << OTGFS_DIEPTXF_INEPTXFD_SHIFT); - stm32_putreg(regval, STM32_OTGFS_DIEPTXF5); + (STM32L4_EP5_TXFIFO_WORDS << OTGFS_DIEPTXF_INEPTXFD_SHIFT); + stm32l4_putreg(regval, STM32L4_OTGFS_DIEPTXF5); #endif /* Flush the FIFOs */ - stm32_txfifo_flush(OTGFS_GRSTCTL_TXFNUM_DALL); - stm32_rxfifo_flush(); + stm32l4_txfifo_flush(OTGFS_GRSTCTL_TXFNUM_DALL); + stm32l4_rxfifo_flush(); /* Clear all pending Device Interrupts */ - stm32_putreg(0, STM32_OTGFS_DIEPMSK); - stm32_putreg(0, STM32_OTGFS_DOEPMSK); - stm32_putreg(0, STM32_OTGFS_DIEPEMPMSK); - stm32_putreg(0xffffffff, STM32_OTGFS_DAINT); - stm32_putreg(0, STM32_OTGFS_DAINTMSK); + stm32l4_putreg(0, STM32L4_OTGFS_DIEPMSK); + stm32l4_putreg(0, STM32L4_OTGFS_DOEPMSK); + stm32l4_putreg(0, STM32L4_OTGFS_DIEPEMPMSK); + stm32l4_putreg(0xffffffff, STM32L4_OTGFS_DAINT); + stm32l4_putreg(0, STM32L4_OTGFS_DAINTMSK); /* Configure all IN endpoints */ - for (i = 0; i < STM32_NENDPOINTS; i++) + for (i = 0; i < STM32L4_NENDPOINTS; i++) { - regval = stm32_getreg(STM32_OTGFS_DIEPCTL(i)); + regval = stm32l4_getreg(STM32L4_OTGFS_DIEPCTL(i)); if ((regval & OTGFS_DIEPCTL_EPENA) != 0) { /* The endpoint is already enabled */ @@ -5405,16 +5405,16 @@ static void stm32_hwinitialize(FAR struct stm32_usbdev_s *priv) regval = 0; } - stm32_putreg(regval, STM32_OTGFS_DIEPCTL(i)); - stm32_putreg(0, STM32_OTGFS_DIEPTSIZ(i)); - stm32_putreg(0xff, STM32_OTGFS_DIEPINT(i)); + stm32l4_putreg(regval, STM32L4_OTGFS_DIEPCTL(i)); + stm32l4_putreg(0, STM32L4_OTGFS_DIEPTSIZ(i)); + stm32l4_putreg(0xff, STM32L4_OTGFS_DIEPINT(i)); } /* Configure all OUT endpoints */ - for (i = 0; i < STM32_NENDPOINTS; i++) + for (i = 0; i < STM32L4_NENDPOINTS; i++) { - regval = stm32_getreg(STM32_OTGFS_DOEPCTL(i)); + regval = stm32l4_getreg(STM32L4_OTGFS_DOEPCTL(i)); if ((regval & OTGFS_DOEPCTL_EPENA) != 0) { /* The endpoint is already enabled */ @@ -5426,22 +5426,22 @@ static void stm32_hwinitialize(FAR struct stm32_usbdev_s *priv) regval = 0; } - stm32_putreg(regval, STM32_OTGFS_DOEPCTL(i)); - stm32_putreg(0, STM32_OTGFS_DOEPTSIZ(i)); - stm32_putreg(0xff, STM32_OTGFS_DOEPINT(i)); + stm32l4_putreg(regval, STM32L4_OTGFS_DOEPCTL(i)); + stm32l4_putreg(0, STM32L4_OTGFS_DOEPTSIZ(i)); + stm32l4_putreg(0xff, STM32L4_OTGFS_DOEPINT(i)); } /* Disable all interrupts. */ - stm32_putreg(0, STM32_OTGFS_GINTMSK); + stm32l4_putreg(0, STM32L4_OTGFS_GINTMSK); /* Clear any pending USB_OTG Interrupts */ - stm32_putreg(0xffffffff, STM32_OTGFS_GOTGINT); + stm32l4_putreg(0xffffffff, STM32L4_OTGFS_GOTGINT); /* Clear any pending interrupts */ - stm32_putreg(0xbfffffff, STM32_OTGFS_GINTSTS); + stm32l4_putreg(0xbfffffff, STM32L4_OTGFS_GINTSTS); /* Enable the interrupts in the INTMSK */ @@ -5464,7 +5464,7 @@ static void stm32_hwinitialize(FAR struct stm32_usbdev_s *priv) regval |= OTGFS_GINT_MMIS; #endif - stm32_putreg(regval, STM32_OTGFS_GINTMSK); + stm32l4_putreg(regval, STM32L4_OTGFS_GINTMSK); /* Enable the USB global interrupt by setting GINTMSK in the global OTG * FS AHB configuration register; Set the TXFELVL bit in the GAHBCFG @@ -5472,8 +5472,8 @@ static void stm32_hwinitialize(FAR struct stm32_usbdev_s *priv) * empty (not just half full). */ - stm32_putreg(OTGFS_GAHBCFG_GINTMSK | OTGFS_GAHBCFG_TXFELVL, - STM32_OTGFS_GAHBCFG); + stm32l4_putreg(OTGFS_GAHBCFG_GINTMSK | OTGFS_GAHBCFG_TXFELVL, + STM32L4_OTGFS_GAHBCFG); } /**************************************************************************** @@ -5503,7 +5503,7 @@ void up_usbinitialize(void) * global data) in order to simplify any future support for multiple devices. */ - FAR struct stm32_usbdev_s *priv = &g_otgfsdev; + FAR struct stm32l4_usbdev_s *priv = &g_otgfsdev; int ret; usbtrace(TRACE_DEVINIT, 0); @@ -5537,7 +5537,7 @@ void up_usbinitialize(void) /* SOF output pin configuration is configurable. */ -#ifdef CONFIG_STM32_OTGFS_SOFOUTPUT +#ifdef CONFIG_STM32L4_OTGFS_SOFOUTPUT stm32l4_configgpio(GPIO_OTGFS_SOF); #endif @@ -5548,11 +5548,11 @@ void up_usbinitialize(void) /* Initialize the driver data structure */ - stm32_swinitialize(priv); + stm32l4_swinitialize(priv); /* Attach the OTG FS interrupt handler */ - ret = irq_attach(STM32L4_IRQ_OTGFS, stm32_usbinterrupt); + ret = irq_attach(STM32L4_IRQ_OTGFS, stm32l4_usbinterrupt); if (ret < 0) { uerr("irq_attach failed\n", ret); @@ -5561,15 +5561,15 @@ void up_usbinitialize(void) /* Initialize the USB OTG core */ - stm32_hwinitialize(priv); + stm32l4_hwinitialize(priv); /* Disconnect device */ - stm32_pullup(&priv->usbdev, false); + stm32l4_pullup(&priv->usbdev, false); /* Reset/Re-initialize the USB hardware */ - stm32_usbreset(priv); + stm32l4_usbreset(priv); /* Enable USB controller interrupts at the NVIC */ @@ -5598,7 +5598,7 @@ void up_usbuninitialize(void) * global data) in order to simplify any future support for multiple devices. */ - FAR struct stm32_usbdev_s *priv = &g_otgfsdev; + FAR struct stm32l4_usbdev_s *priv = &g_otgfsdev; irqstate_t flags; int i; @@ -5606,14 +5606,14 @@ void up_usbuninitialize(void) if (priv->driver) { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_DRIVERREGISTERED), 0); + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_DRIVERREGISTERED), 0); usbdev_unregister(priv->driver); } /* Disconnect device */ flags = enter_critical_section(); - stm32_pullup(&priv->usbdev, false); + stm32l4_pullup(&priv->usbdev, false); priv->usbdev.speed = USB_SPEED_UNKNOWN; /* Disable and detach IRQs */ @@ -5623,22 +5623,22 @@ void up_usbuninitialize(void) /* Disable all endpoint interrupts */ - for (i = 0; i < STM32_NENDPOINTS; i++) + for (i = 0; i < STM32L4_NENDPOINTS; i++) { - stm32_putreg(0xff, STM32_OTGFS_DIEPINT(i)); - stm32_putreg(0xff, STM32_OTGFS_DOEPINT(i)); + stm32l4_putreg(0xff, STM32L4_OTGFS_DIEPINT(i)); + stm32l4_putreg(0xff, STM32L4_OTGFS_DOEPINT(i)); } - stm32_putreg(0, STM32_OTGFS_DIEPMSK); - stm32_putreg(0, STM32_OTGFS_DOEPMSK); - stm32_putreg(0, STM32_OTGFS_DIEPEMPMSK); - stm32_putreg(0, STM32_OTGFS_DAINTMSK); - stm32_putreg(0xffffffff, STM32_OTGFS_DAINT); + stm32l4_putreg(0, STM32L4_OTGFS_DIEPMSK); + stm32l4_putreg(0, STM32L4_OTGFS_DOEPMSK); + stm32l4_putreg(0, STM32L4_OTGFS_DIEPEMPMSK); + stm32l4_putreg(0, STM32L4_OTGFS_DAINTMSK); + stm32l4_putreg(0xffffffff, STM32L4_OTGFS_DAINT); /* Flush the FIFOs */ - stm32_txfifo_flush(OTGFS_GRSTCTL_TXFNUM_DALL); - stm32_rxfifo_flush(); + stm32l4_txfifo_flush(OTGFS_GRSTCTL_TXFNUM_DALL); + stm32l4_rxfifo_flush(); /* TODO: Turn off USB power and clocking */ @@ -5663,7 +5663,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver) * global data) in order to simplify any future support for multiple devices. */ - FAR struct stm32_usbdev_s *priv = &g_otgfsdev; + FAR struct stm32l4_usbdev_s *priv = &g_otgfsdev; int ret; usbtrace(TRACE_DEVREGISTER, 0); @@ -5672,13 +5672,13 @@ int usbdev_register(struct usbdevclass_driver_s *driver) if (!driver || !driver->ops->bind || !driver->ops->unbind || !driver->ops->disconnect || !driver->ops->setup) { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0); + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_INVALIDPARMS), 0); return -EINVAL; } if (priv->driver) { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_DRIVER), 0); + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_DRIVER), 0); return -EBUSY; } #endif @@ -5692,7 +5692,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver) ret = CLASS_BIND(driver, &priv->usbdev); if (ret) { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_BINDFAILED), (uint16_t)-ret); + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_BINDFAILED), (uint16_t)-ret); priv->driver = NULL; } else @@ -5709,7 +5709,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver) * that logic to the class drivers but left this logic here. */ - stm32_pullup(&priv->usbdev, true); + stm32l4_pullup(&priv->usbdev, true); priv->usbdev.speed = USB_SPEED_FULL; } @@ -5734,7 +5734,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver) * global data) in order to simplify any future support for multiple devices. */ - FAR struct stm32_usbdev_s *priv = &g_otgfsdev; + FAR struct stm32l4_usbdev_s *priv = &g_otgfsdev; irqstate_t flags; usbtrace(TRACE_DEVUNREGISTER, 0); @@ -5742,7 +5742,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver) #ifdef CONFIG_DEBUG_USB if (driver != priv->driver) { - usbtrace(TRACE_DEVERROR(STM32_TRACEERR_INVALIDPARMS), 0); + usbtrace(TRACE_DEVERROR(STM32L4_TRACEERR_INVALIDPARMS), 0); return -EINVAL; } #endif @@ -5752,7 +5752,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver) */ flags = enter_critical_section(); - stm32_usbreset(priv); + stm32l4_usbreset(priv); leave_critical_section(flags); /* Unbind the class driver */ @@ -5766,7 +5766,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver) /* Disconnect device */ - stm32_pullup(&priv->usbdev, false); + stm32l4_pullup(&priv->usbdev, false); /* Unhook the driver */ @@ -5776,4 +5776,4 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver) return OK; } -#endif /* CONFIG_USBDEV && CONFIG_STM32_OTGFSDEV */ +#endif /* CONFIG_USBDEV && CONFIG_STM32L4_OTGFSDEV */ diff --git a/arch/arm/src/stm32l4/stm32l4_otgfshost.c b/arch/arm/src/stm32l4/stm32l4_otgfshost.c index ebb07b69435..348bdc17094 100644 --- a/arch/arm/src/stm32l4/stm32l4_otgfshost.c +++ b/arch/arm/src/stm32l4/stm32l4_otgfshost.c @@ -1,5 +1,5 @@ /**************************************************************************** - * arch/arm/src/stm32l4/stm32_otgfshost.c + * arch/arm/src/stm32l4/stm32l4_otgfshost.c * * Copyright (C) 2012-2016 Gregory Nutt. All rights reserved. * Authors: Gregory Nutt @@ -68,7 +68,7 @@ #include "stm32l4_usbhost.h" -#if defined(CONFIG_USBHOST) && defined(CONFIG_STM32_OTGFS) +#if defined(CONFIG_USBHOST) && defined(CONFIG_STM32L4_OTGFS) /**************************************************************************** * Pre-processor Definitions @@ -79,80 +79,80 @@ * Pre-requisites * * CONFIG_USBHOST - Enable general USB host support - * CONFIG_STM32_OTGFS - Enable the STM32 USB OTG FS block - * CONFIG_STM32_SYSCFG - Needed + * CONFIG_STM32L4_OTGFS - Enable the STM32 USB OTG FS block + * CONFIG_STM32L4_SYSCFG - Needed * * Options: * - * CONFIG_STM32_OTGFS_RXFIFO_SIZE - Size of the RX FIFO in 32-bit words. + * CONFIG_STM32L4_OTGFS_RXFIFO_SIZE - Size of the RX FIFO in 32-bit words. * Default 128 (512 bytes) - * CONFIG_STM32_OTGFS_NPTXFIFO_SIZE - Size of the non-periodic Tx FIFO + * CONFIG_STM32L4_OTGFS_NPTXFIFO_SIZE - Size of the non-periodic Tx FIFO * in 32-bit words. Default 96 (384 bytes) - * CONFIG_STM32_OTGFS_PTXFIFO_SIZE - Size of the periodic Tx FIFO in 32-bit + * CONFIG_STM32L4_OTGFS_PTXFIFO_SIZE - Size of the periodic Tx FIFO in 32-bit * words. Default 96 (384 bytes) - * CONFIG_STM32_OTGFS_DESCSIZE - Maximum size of a descriptor. Default: 128 - * CONFIG_STM32_OTGFS_SOFINTR - Enable SOF interrupts. Why would you ever + * CONFIG_STM32L4_OTGFS_DESCSIZE - Maximum size of a descriptor. Default: 128 + * CONFIG_STM32L4_OTGFS_SOFINTR - Enable SOF interrupts. Why would you ever * want to do that? - * CONFIG_STM32_USBHOST_REGDEBUG - Enable very low-level register access + * CONFIG_STM32L4_USBHOST_REGDEBUG - Enable very low-level register access * debug. Depends on CONFIG_DEBUG. - * CONFIG_STM32_USBHOST_PKTDUMP - Dump all incoming and outgoing USB + * CONFIG_STM32L4_USBHOST_PKTDUMP - Dump all incoming and outgoing USB * packets. Depends on CONFIG_DEBUG. */ /* Pre-requisites (partial) */ -#ifndef CONFIG_STM32_SYSCFG -# error "CONFIG_STM32_SYSCFG is required" +#ifndef CONFIG_STM32L4_SYSCFG +# error "CONFIG_STM32L4_SYSCFG is required" #endif /* Default RxFIFO size */ -#ifndef CONFIG_STM32_OTGFS_RXFIFO_SIZE -# define CONFIG_STM32_OTGFS_RXFIFO_SIZE 128 +#ifndef CONFIG_STM32L4_OTGFS_RXFIFO_SIZE +# define CONFIG_STM32L4_OTGFS_RXFIFO_SIZE 128 #endif /* Default host non-periodic Tx FIFO size */ -#ifndef CONFIG_STM32_OTGFS_NPTXFIFO_SIZE -# define CONFIG_STM32_OTGFS_NPTXFIFO_SIZE 96 +#ifndef CONFIG_STM32L4_OTGFS_NPTXFIFO_SIZE +# define CONFIG_STM32L4_OTGFS_NPTXFIFO_SIZE 96 #endif /* Default host periodic Tx fifo size register */ -#ifndef CONFIG_STM32_OTGFS_PTXFIFO_SIZE -# define CONFIG_STM32_OTGFS_PTXFIFO_SIZE 96 +#ifndef CONFIG_STM32L4_OTGFS_PTXFIFO_SIZE +# define CONFIG_STM32L4_OTGFS_PTXFIFO_SIZE 96 #endif /* Maximum size of a descriptor */ -#ifndef CONFIG_STM32_OTGFS_DESCSIZE -# define CONFIG_STM32_OTGFS_DESCSIZE 128 +#ifndef CONFIG_STM32L4_OTGFS_DESCSIZE +# define CONFIG_STM32L4_OTGFS_DESCSIZE 128 #endif /* Register/packet debug depends on CONFIG_DEBUG */ #ifndef CONFIG_DEBUG -# undef CONFIG_STM32_USBHOST_REGDEBUG -# undef CONFIG_STM32_USBHOST_PKTDUMP +# undef CONFIG_STM32L4_USBHOST_REGDEBUG +# undef CONFIG_STM32L4_USBHOST_PKTDUMP #endif /* HCD Setup *******************************************************************/ /* Hardware capabilities */ //XXX I think this needs to be 12 for the 'L4 -#define STM32_NHOST_CHANNELS 8 /* Number of host channels */ -#define STM32_MAX_PACKET_SIZE 64 /* Full speed max packet size */ -#define STM32_EP0_DEF_PACKET_SIZE 8 /* EP0 default packet size */ -#define STM32_EP0_MAX_PACKET_SIZE 64 /* EP0 FS max packet size */ -#define STM32_MAX_TX_FIFOS 15 /* Max number of TX FIFOs */ -#define STM32_MAX_PKTCOUNT 256 /* Max packet count */ -#define STM32_RETRY_COUNT 3 /* Number of ctrl transfer retries */ +#define STM32L4_NHOST_CHANNELS 8 /* Number of host channels */ +#define STM32L4_MAX_PACKET_SIZE 64 /* Full speed max packet size */ +#define STM32L4_EP0_DEF_PACKET_SIZE 8 /* EP0 default packet size */ +#define STM32L4_EP0_MAX_PACKET_SIZE 64 /* EP0 FS max packet size */ +#define STM32L4_MAX_TX_FIFOS 15 /* Max number of TX FIFOs */ +#define STM32L4_MAX_PKTCOUNT 256 /* Max packet count */ +#define STM32L4_RETRY_COUNT 3 /* Number of ctrl transfer retries */ /* Delays **********************************************************************/ -#define STM32_READY_DELAY 200000 /* In loop counts */ -#define STM32_FLUSH_DELAY 200000 /* In loop counts */ -#define STM32_SETUP_DELAY SEC2TICK(5) /* 5 seconds in system ticks */ -#define STM32_DATANAK_DELAY SEC2TICK(5) /* 5 seconds in system ticks */ +#define STM32L4_READY_DELAY 200000 /* In loop counts */ +#define STM32L4_FLUSH_DELAY 200000 /* In loop counts */ +#define STM32L4_SETUP_DELAY SEC2TICK(5) /* 5 seconds in system ticks */ +#define STM32L4_DATANAK_DELAY SEC2TICK(5) /* 5 seconds in system ticks */ /* Ever-present MIN/MAX macros */ @@ -172,7 +172,7 @@ * state machine (for debug purposes only) */ -enum stm32_smstate_e +enum stm32l4_smstate_e { SMSTATE_DETACHED = 0, /* Not attached to a device */ SMSTATE_ATTACHED, /* Attached to a device */ @@ -182,7 +182,7 @@ enum stm32_smstate_e /* This enumeration provides the reason for the channel halt. */ -enum stm32_chreason_e +enum stm32l4_chreason_e { CHREASON_IDLE = 0, /* Inactive (initial state) */ CHREASON_FREED, /* Channel is no longer in use */ @@ -198,15 +198,15 @@ enum stm32_chreason_e /* This structure retains the state of one host channel. NOTE: Since there * is only one channel operation active at a time, some of the fields in - * in the structure could be moved in struct stm32_ubhost_s to achieve + * in the structure could be moved in struct stm32l4_ubhost_s to achieve * some memory savings. */ -struct stm32_chan_s +struct stm32l4_chan_s { sem_t waitsem; /* Channel wait semaphore */ volatile uint8_t result; /* The result of the transfer */ - volatile uint8_t chreason; /* Channel halt reason. See enum stm32_chreason_e */ + volatile uint8_t chreason; /* Channel halt reason. See enum stm32l4_chreason_e */ uint8_t chidx; /* Channel index */ uint8_t epno; /* Device endpoint number (0-127) */ uint8_t eptype; /* See OTGFS_EPTYPE_* definitions */ @@ -235,7 +235,7 @@ struct stm32_chan_s * the endpoint. */ -struct stm32_ctrlinfo_s +struct stm32l4_ctrlinfo_s { uint8_t inndx; /* EP0 IN control channel index */ uint8_t outndx; /* EP0 OUT control channel index */ @@ -243,11 +243,11 @@ struct stm32_ctrlinfo_s /* This structure retains the state of the USB host controller */ -struct stm32_usbhost_s +struct stm32l4_usbhost_s { /* Common device fields. This must be the first thing defined in the * structure so that it is possible to simply cast from struct usbhost_s - * to structstm32_usbhost_s. + * to structstm32l4_usbhost_s. */ struct usbhost_driver_s drvr; @@ -265,7 +265,7 @@ struct stm32_usbhost_s volatile bool pscwait; /* True: Thread is waiting for a port event */ sem_t exclsem; /* Support mutually exclusive access */ sem_t pscsem; /* Semaphore to wait for a port event */ - struct stm32_ctrlinfo_s ep0; /* Root hub port EP0 description */ + struct stm32l4_ctrlinfo_s ep0; /* Root hub port EP0 description */ #ifdef CONFIG_USBHOST_HUB /* Used to pass external hub port events */ @@ -275,7 +275,7 @@ struct stm32_usbhost_s /* The state of each host channel */ - struct stm32_chan_s chan[STM32_MAX_TX_FIFOS]; + struct stm32l4_chan_s chan[STM32L4_MAX_TX_FIFOS]; }; /**************************************************************************** @@ -284,95 +284,95 @@ struct stm32_usbhost_s /* Register operations ********************************************************/ -#ifdef CONFIG_STM32_USBHOST_REGDEBUG -static void stm32_printreg(uint32_t addr, uint32_t val, bool iswrite); -static void stm32_checkreg(uint32_t addr, uint32_t val, bool iswrite); -static uint32_t stm32_getreg(uint32_t addr); -static void stm32_putreg(uint32_t addr, uint32_t value); +#ifdef CONFIG_STM32L4_USBHOST_REGDEBUG +static void stm32l4_printreg(uint32_t addr, uint32_t val, bool iswrite); +static void stm32l4_checkreg(uint32_t addr, uint32_t val, bool iswrite); +static uint32_t stm32l4_getreg(uint32_t addr); +static void stm32l4_putreg(uint32_t addr, uint32_t value); #else -# define stm32_getreg(addr) getreg32(addr) -# define stm32_putreg(addr,val) putreg32(val,addr) +# define stm32l4_getreg(addr) getreg32(addr) +# define stm32l4_putreg(addr,val) putreg32(val,addr) #endif -static inline void stm32_modifyreg(uint32_t addr, uint32_t clrbits, +static inline void stm32l4_modifyreg(uint32_t addr, uint32_t clrbits, uint32_t setbits); -#ifdef CONFIG_STM32_USBHOST_PKTDUMP -# define stm32_pktdump(m,b,n) lib_dumpbuffer(m,b,n) +#ifdef CONFIG_STM32L4_USBHOST_PKTDUMP +# define stm32l4_pktdump(m,b,n) lib_dumpbuffer(m,b,n) #else -# define stm32_pktdump(m,b,n) +# define stm32l4_pktdump(m,b,n) #endif /* Semaphores ******************************************************************/ -static void stm32_takesem(sem_t *sem); -#define stm32_givesem(s) sem_post(s); +static void stm32l4_takesem(sem_t *sem); +#define stm32l4_givesem(s) sem_post(s); /* Byte stream access helper functions *****************************************/ -static inline uint16_t stm32_getle16(const uint8_t *val); +static inline uint16_t stm32l4_getle16(const uint8_t *val); /* Channel management **********************************************************/ -static int stm32_chan_alloc(FAR struct stm32_usbhost_s *priv); -static inline void stm32_chan_free(FAR struct stm32_usbhost_s *priv, int chidx); -static inline void stm32_chan_freeall(FAR struct stm32_usbhost_s *priv); -static void stm32_chan_configure(FAR struct stm32_usbhost_s *priv, int chidx); -static void stm32_chan_halt(FAR struct stm32_usbhost_s *priv, int chidx, - enum stm32_chreason_e chreason); -static int stm32_chan_waitsetup(FAR struct stm32_usbhost_s *priv, - FAR struct stm32_chan_s *chan); +static int stm32l4_chan_alloc(FAR struct stm32l4_usbhost_s *priv); +static inline void stm32l4_chan_free(FAR struct stm32l4_usbhost_s *priv, int chidx); +static inline void stm32l4_chan_freeall(FAR struct stm32l4_usbhost_s *priv); +static void stm32l4_chan_configure(FAR struct stm32l4_usbhost_s *priv, int chidx); +static void stm32l4_chan_halt(FAR struct stm32l4_usbhost_s *priv, int chidx, + enum stm32l4_chreason_e chreason); +static int stm32l4_chan_waitsetup(FAR struct stm32l4_usbhost_s *priv, + FAR struct stm32l4_chan_s *chan); #ifdef CONFIG_USBHOST_ASYNCH -static int stm32_chan_asynchsetup(FAR struct stm32_usbhost_s *priv, - FAR struct stm32_chan_s *chan, +static int stm32l4_chan_asynchsetup(FAR struct stm32l4_usbhost_s *priv, + FAR struct stm32l4_chan_s *chan, usbhost_asynch_t callback, FAR void *arg); #endif -static int stm32_chan_wait(FAR struct stm32_usbhost_s *priv, - FAR struct stm32_chan_s *chan); -static void stm32_chan_wakeup(FAR struct stm32_usbhost_s *priv, - FAR struct stm32_chan_s *chan); -static int stm32_ctrlchan_alloc(FAR struct stm32_usbhost_s *priv, +static int stm32l4_chan_wait(FAR struct stm32l4_usbhost_s *priv, + FAR struct stm32l4_chan_s *chan); +static void stm32l4_chan_wakeup(FAR struct stm32l4_usbhost_s *priv, + FAR struct stm32l4_chan_s *chan); +static int stm32l4_ctrlchan_alloc(FAR struct stm32l4_usbhost_s *priv, uint8_t epno, uint8_t funcaddr, uint8_t speed, - FAR struct stm32_ctrlinfo_s *ctrlep); -static int stm32_ctrlep_alloc(FAR struct stm32_usbhost_s *priv, + FAR struct stm32l4_ctrlinfo_s *ctrlep); +static int stm32l4_ctrlep_alloc(FAR struct stm32l4_usbhost_s *priv, FAR const struct usbhost_epdesc_s *epdesc, FAR usbhost_ep_t *ep); -static int stm32_xfrep_alloc(FAR struct stm32_usbhost_s *priv, +static int stm32l4_xfrep_alloc(FAR struct stm32l4_usbhost_s *priv, FAR const struct usbhost_epdesc_s *epdesc, FAR usbhost_ep_t *ep); /* Control/data transfer logic *************************************************/ -static void stm32_transfer_start(FAR struct stm32_usbhost_s *priv, int chidx); +static void stm32l4_transfer_start(FAR struct stm32l4_usbhost_s *priv, int chidx); #if 0 /* Not used */ -static inline uint16_t stm32_getframe(void); +static inline uint16_t stm32l4_getframe(void); #endif -static int stm32_ctrl_sendsetup(FAR struct stm32_usbhost_s *priv, - FAR struct stm32_ctrlinfo_s *ep0, +static int stm32l4_ctrl_sendsetup(FAR struct stm32l4_usbhost_s *priv, + FAR struct stm32l4_ctrlinfo_s *ep0, FAR const struct usb_ctrlreq_s *req); -static int stm32_ctrl_senddata(FAR struct stm32_usbhost_s *priv, - FAR struct stm32_ctrlinfo_s *ep0, +static int stm32l4_ctrl_senddata(FAR struct stm32l4_usbhost_s *priv, + FAR struct stm32l4_ctrlinfo_s *ep0, FAR uint8_t *buffer, unsigned int buflen); -static int stm32_ctrl_recvdata(FAR struct stm32_usbhost_s *priv, - FAR struct stm32_ctrlinfo_s *ep0, +static int stm32l4_ctrl_recvdata(FAR struct stm32l4_usbhost_s *priv, + FAR struct stm32l4_ctrlinfo_s *ep0, FAR uint8_t *buffer, unsigned int buflen); -static int stm32_in_setup(FAR struct stm32_usbhost_s *priv, int chidx); -static ssize_t stm32_in_transfer(FAR struct stm32_usbhost_s *priv, int chidx, +static int stm32l4_in_setup(FAR struct stm32l4_usbhost_s *priv, int chidx); +static ssize_t stm32l4_in_transfer(FAR struct stm32l4_usbhost_s *priv, int chidx, FAR uint8_t *buffer, size_t buflen); #ifdef CONFIG_USBHOST_ASYNCH -static void stm32_in_next(FAR struct stm32_usbhost_s *priv, - FAR struct stm32_chan_s *chan); -static int stm32_in_asynch(FAR struct stm32_usbhost_s *priv, int chidx, +static void stm32l4_in_next(FAR struct stm32l4_usbhost_s *priv, + FAR struct stm32l4_chan_s *chan); +static int stm32l4_in_asynch(FAR struct stm32l4_usbhost_s *priv, int chidx, FAR uint8_t *buffer, size_t buflen, usbhost_asynch_t callback, FAR void *arg); #endif -static int stm32_out_setup(FAR struct stm32_usbhost_s *priv, int chidx); -static ssize_t stm32_out_transfer(FAR struct stm32_usbhost_s *priv, int chidx, +static int stm32l4_out_setup(FAR struct stm32l4_usbhost_s *priv, int chidx); +static ssize_t stm32l4_out_transfer(FAR struct stm32l4_usbhost_s *priv, int chidx, FAR uint8_t *buffer, size_t buflen); #ifdef CONFIG_USBHOST_ASYNCH -static void stm32_out_next(FAR struct stm32_usbhost_s *priv, - FAR struct stm32_chan_s *chan); -static int stm32_out_asynch(FAR struct stm32_usbhost_s *priv, int chidx, +static void stm32l4_out_next(FAR struct stm32l4_usbhost_s *priv, + FAR struct stm32l4_chan_s *chan); +static int stm32l4_out_asynch(FAR struct stm32l4_usbhost_s *priv, int chidx, FAR uint8_t *buffer, size_t buflen, usbhost_asynch_t callback, FAR void *arg); #endif @@ -380,94 +380,94 @@ static int stm32_out_asynch(FAR struct stm32_usbhost_s *priv, int chidx, /* Interrupt handling **********************************************************/ /* Lower level interrupt handlers */ -static void stm32_gint_wrpacket(FAR struct stm32_usbhost_s *priv, +static void stm32l4_gint_wrpacket(FAR struct stm32l4_usbhost_s *priv, FAR uint8_t *buffer, int chidx, int buflen); -static inline void stm32_gint_hcinisr(FAR struct stm32_usbhost_s *priv, +static inline void stm32l4_gint_hcinisr(FAR struct stm32l4_usbhost_s *priv, int chidx); -static inline void stm32_gint_hcoutisr(FAR struct stm32_usbhost_s *priv, +static inline void stm32l4_gint_hcoutisr(FAR struct stm32l4_usbhost_s *priv, int chidx); -static void stm32_gint_connected(FAR struct stm32_usbhost_s *priv); -static void stm32_gint_disconnected(FAR struct stm32_usbhost_s *priv); +static void stm32l4_gint_connected(FAR struct stm32l4_usbhost_s *priv); +static void stm32l4_gint_disconnected(FAR struct stm32l4_usbhost_s *priv); /* Second level interrupt handlers */ -#ifdef CONFIG_STM32_OTGFS_SOFINTR -static inline void stm32_gint_sofisr(FAR struct stm32_usbhost_s *priv); +#ifdef CONFIG_STM32L4_OTGFS_SOFINTR +static inline void stm32l4_gint_sofisr(FAR struct stm32l4_usbhost_s *priv); #endif -static inline void stm32_gint_rxflvlisr(FAR struct stm32_usbhost_s *priv); -static inline void stm32_gint_nptxfeisr(FAR struct stm32_usbhost_s *priv); -static inline void stm32_gint_ptxfeisr(FAR struct stm32_usbhost_s *priv); -static inline void stm32_gint_hcisr(FAR struct stm32_usbhost_s *priv); -static inline void stm32_gint_hprtisr(FAR struct stm32_usbhost_s *priv); -static inline void stm32_gint_discisr(FAR struct stm32_usbhost_s *priv); -static inline void stm32_gint_ipxfrisr(FAR struct stm32_usbhost_s *priv); +static inline void stm32l4_gint_rxflvlisr(FAR struct stm32l4_usbhost_s *priv); +static inline void stm32l4_gint_nptxfeisr(FAR struct stm32l4_usbhost_s *priv); +static inline void stm32l4_gint_ptxfeisr(FAR struct stm32l4_usbhost_s *priv); +static inline void stm32l4_gint_hcisr(FAR struct stm32l4_usbhost_s *priv); +static inline void stm32l4_gint_hprtisr(FAR struct stm32l4_usbhost_s *priv); +static inline void stm32l4_gint_discisr(FAR struct stm32l4_usbhost_s *priv); +static inline void stm32l4_gint_ipxfrisr(FAR struct stm32l4_usbhost_s *priv); /* First level, global interrupt handler */ -static int stm32_gint_isr(int irq, FAR void *context); +static int stm32l4_gint_isr(int irq, FAR void *context); /* Interrupt controls */ -static void stm32_gint_enable(void); -static void stm32_gint_disable(void); -static inline void stm32_hostinit_enable(void); -static void stm32_txfe_enable(FAR struct stm32_usbhost_s *priv, int chidx); +static void stm32l4_gint_enable(void); +static void stm32l4_gint_disable(void); +static inline void stm32l4_hostinit_enable(void); +static void stm32l4_txfe_enable(FAR struct stm32l4_usbhost_s *priv, int chidx); /* USB host controller operations **********************************************/ -static int stm32_wait(FAR struct usbhost_connection_s *conn, +static int stm32l4_wait(FAR struct usbhost_connection_s *conn, FAR struct usbhost_hubport_s **hport); -static int stm32_rh_enumerate(FAR struct stm32_usbhost_s *priv, +static int stm32l4_rh_enumerate(FAR struct stm32l4_usbhost_s *priv, FAR struct usbhost_connection_s *conn, FAR struct usbhost_hubport_s *hport); -static int stm32_enumerate(FAR struct usbhost_connection_s *conn, +static int stm32l4_enumerate(FAR struct usbhost_connection_s *conn, FAR struct usbhost_hubport_s *hport); -static int stm32_ep0configure(FAR struct usbhost_driver_s *drvr, +static int stm32l4_ep0configure(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0, uint8_t funcaddr, uint8_t speed, uint16_t maxpacketsize); -static int stm32_epalloc(FAR struct usbhost_driver_s *drvr, +static int stm32l4_epalloc(FAR struct usbhost_driver_s *drvr, FAR const FAR struct usbhost_epdesc_s *epdesc, FAR usbhost_ep_t *ep); -static int stm32_epfree(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep); -static int stm32_alloc(FAR struct usbhost_driver_s *drvr, +static int stm32l4_epfree(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep); +static int stm32l4_alloc(FAR struct usbhost_driver_s *drvr, FAR uint8_t **buffer, FAR size_t *maxlen); -static int stm32_free(FAR struct usbhost_driver_s *drvr, FAR uint8_t *buffer); -static int stm32_ioalloc(FAR struct usbhost_driver_s *drvr, +static int stm32l4_free(FAR struct usbhost_driver_s *drvr, FAR uint8_t *buffer); +static int stm32l4_ioalloc(FAR struct usbhost_driver_s *drvr, FAR uint8_t **buffer, size_t buflen); -static int stm32_iofree(FAR struct usbhost_driver_s *drvr, FAR uint8_t *buffer); -static int stm32_ctrlin(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0, +static int stm32l4_iofree(FAR struct usbhost_driver_s *drvr, FAR uint8_t *buffer); +static int stm32l4_ctrlin(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0, const struct usb_ctrlreq_s *req, FAR uint8_t *buffer); -static int stm32_ctrlout(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0, +static int stm32l4_ctrlout(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0, FAR const struct usb_ctrlreq_s *req, FAR const uint8_t *buffer); -static ssize_t stm32_transfer(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep, +static ssize_t stm32l4_transfer(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep, FAR uint8_t *buffer, size_t buflen); #ifdef CONFIG_USBHOST_ASYNCH -static int stm32_asynch(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep, +static int stm32l4_asynch(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep, FAR uint8_t *buffer, size_t buflen, usbhost_asynch_t callback, FAR void *arg); #endif -static int stm32_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep); +static int stm32l4_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep); #ifdef CONFIG_USBHOST_HUB -static int stm32_connect(FAR struct usbhost_driver_s *drvr, +static int stm32l4_connect(FAR struct usbhost_driver_s *drvr, FAR struct usbhost_hubport_s *hport, bool connected); #endif -static void stm32_disconnect(FAR struct usbhost_driver_s *drvr, +static void stm32l4_disconnect(FAR struct usbhost_driver_s *drvr, FAR struct usbhost_hubport_s *hport); /* Initialization **************************************************************/ -static void stm32_portreset(FAR struct stm32_usbhost_s *priv); -static void stm32_flush_txfifos(uint32_t txfnum); -static void stm32_flush_rxfifo(void); -static void stm32_vbusdrive(FAR struct stm32_usbhost_s *priv, bool state); -static void stm32_host_initialize(FAR struct stm32_usbhost_s *priv); +static void stm32l4_portreset(FAR struct stm32l4_usbhost_s *priv); +static void stm32l4_flush_txfifos(uint32_t txfnum); +static void stm32l4_flush_rxfifo(void); +static void stm32l4_vbusdrive(FAR struct stm32l4_usbhost_s *priv, bool state); +static void stm32l4_host_initialize(FAR struct stm32l4_usbhost_s *priv); -static inline void stm32_sw_initialize(FAR struct stm32_usbhost_s *priv); -static inline int stm32_hw_initialize(FAR struct stm32_usbhost_s *priv); +static inline void stm32l4_sw_initialize(FAR struct stm32l4_usbhost_s *priv); +static inline int stm32l4_hw_initialize(FAR struct stm32l4_usbhost_s *priv); /**************************************************************************** * Private Data @@ -478,14 +478,14 @@ static inline int stm32_hw_initialize(FAR struct stm32_usbhost_s *priv); * instance. */ -static struct stm32_usbhost_s g_usbhost; +static struct stm32l4_usbhost_s g_usbhost; /* This is the connection/enumeration interface */ static struct usbhost_connection_s g_usbconn = { - .wait = stm32_wait, - .enumerate = stm32_enumerate, + .wait = stm32l4_wait, + .enumerate = stm32l4_enumerate, }; /**************************************************************************** @@ -497,30 +497,30 @@ static struct usbhost_connection_s g_usbconn = ****************************************************************************/ /**************************************************************************** - * Name: stm32_printreg + * Name: stm32l4_printreg * * Description: * Print the contents of an STM32xx register operation * ****************************************************************************/ -#ifdef CONFIG_STM32_USBHOST_REGDEBUG -static void stm32_printreg(uint32_t addr, uint32_t val, bool iswrite) +#ifdef CONFIG_STM32L4_USBHOST_REGDEBUG +static void stm32l4_printreg(uint32_t addr, uint32_t val, bool iswrite) { lldbg("%08x%s%08x\n", addr, iswrite ? "<-" : "->", val); } #endif /**************************************************************************** - * Name: stm32_checkreg + * Name: stm32l4_checkreg * * Description: * Get the contents of an STM32 register * ****************************************************************************/ -#ifdef CONFIG_STM32_USBHOST_REGDEBUG -static void stm32_checkreg(uint32_t addr, uint32_t val, bool iswrite) +#ifdef CONFIG_STM32L4_USBHOST_REGDEBUG +static void stm32l4_checkreg(uint32_t addr, uint32_t val, bool iswrite) { static uint32_t prevaddr = 0; static uint32_t preval = 0; @@ -551,7 +551,7 @@ static void stm32_checkreg(uint32_t addr, uint32_t val, bool iswrite) { /* Yes.. Just one */ - stm32_printreg(prevaddr, preval, prevwrite); + stm32l4_printreg(prevaddr, preval, prevwrite); } else { @@ -570,21 +570,21 @@ static void stm32_checkreg(uint32_t addr, uint32_t val, bool iswrite) /* Show the new regisgter access */ - stm32_printreg(addr, val, iswrite); + stm32l4_printreg(addr, val, iswrite); } } #endif /**************************************************************************** - * Name: stm32_getreg + * Name: stm32l4_getreg * * Description: * Get the contents of an STM32 register * ****************************************************************************/ -#ifdef CONFIG_STM32_USBHOST_REGDEBUG -static uint32_t stm32_getreg(uint32_t addr) +#ifdef CONFIG_STM32L4_USBHOST_REGDEBUG +static uint32_t stm32l4_getreg(uint32_t addr) { /* Read the value from the register */ @@ -592,25 +592,25 @@ static uint32_t stm32_getreg(uint32_t addr) /* Check if we need to print this value */ - stm32_checkreg(addr, val, false); + stm32l4_checkreg(addr, val, false); return val; } #endif /**************************************************************************** - * Name: stm32_putreg + * Name: stm32l4_putreg * * Description: * Set the contents of an STM32 register to a value * ****************************************************************************/ -#ifdef CONFIG_STM32_USBHOST_REGDEBUG -static void stm32_putreg(uint32_t addr, uint32_t val) +#ifdef CONFIG_STM32L4_USBHOST_REGDEBUG +static void stm32l4_putreg(uint32_t addr, uint32_t val) { /* Check if we need to print this value */ - stm32_checkreg(addr, val, true); + stm32l4_checkreg(addr, val, true); /* Write the value */ @@ -619,20 +619,20 @@ static void stm32_putreg(uint32_t addr, uint32_t val) #endif /**************************************************************************** - * Name: stm32_modifyreg + * Name: stm32l4_modifyreg * * Description: * Modify selected bits of an STM32 register. * ****************************************************************************/ -static inline void stm32_modifyreg(uint32_t addr, uint32_t clrbits, uint32_t setbits) +static inline void stm32l4_modifyreg(uint32_t addr, uint32_t clrbits, uint32_t setbits) { - stm32_putreg(addr, (((stm32_getreg(addr)) & ~clrbits) | setbits)); + stm32l4_putreg(addr, (((stm32l4_getreg(addr)) & ~clrbits) | setbits)); } /**************************************************************************** - * Name: stm32_takesem + * Name: stm32l4_takesem * * Description: * This is just a wrapper to handle the annoying behavior of semaphore @@ -640,7 +640,7 @@ static inline void stm32_modifyreg(uint32_t addr, uint32_t clrbits, uint32_t set * ****************************************************************************/ -static void stm32_takesem(sem_t *sem) +static void stm32l4_takesem(sem_t *sem) { /* Take the semaphore (perhaps waiting) */ @@ -655,33 +655,33 @@ static void stm32_takesem(sem_t *sem) } /**************************************************************************** - * Name: stm32_getle16 + * Name: stm32l4_getle16 * * Description: * Get a (possibly unaligned) 16-bit little endian value. * ****************************************************************************/ -static inline uint16_t stm32_getle16(const uint8_t *val) +static inline uint16_t stm32l4_getle16(const uint8_t *val) { return (uint16_t)val[1] << 8 | (uint16_t)val[0]; } /**************************************************************************** - * Name: stm32_chan_alloc + * Name: stm32l4_chan_alloc * * Description: * Allocate a channel. * ****************************************************************************/ -static int stm32_chan_alloc(FAR struct stm32_usbhost_s *priv) +static int stm32l4_chan_alloc(FAR struct stm32l4_usbhost_s *priv) { int chidx; /* Search the table of channels */ - for (chidx = 0; chidx < STM32_NHOST_CHANNELS; chidx++) + for (chidx = 0; chidx < STM32L4_NHOST_CHANNELS; chidx++) { /* Is this channel available? */ @@ -700,20 +700,20 @@ static int stm32_chan_alloc(FAR struct stm32_usbhost_s *priv) } /**************************************************************************** - * Name: stm32_chan_free + * Name: stm32l4_chan_free * * Description: * Free a previoiusly allocated channel. * ****************************************************************************/ -static void stm32_chan_free(FAR struct stm32_usbhost_s *priv, int chidx) +static void stm32l4_chan_free(FAR struct stm32l4_usbhost_s *priv, int chidx) { - DEBUGASSERT((unsigned)chidx < STM32_NHOST_CHANNELS); + DEBUGASSERT((unsigned)chidx < STM32L4_NHOST_CHANNELS); /* Halt the channel */ - stm32_chan_halt(priv, chidx, CHREASON_FREED); + stm32l4_chan_halt(priv, chidx, CHREASON_FREED); /* Mark the channel available */ @@ -721,27 +721,27 @@ static void stm32_chan_free(FAR struct stm32_usbhost_s *priv, int chidx) } /**************************************************************************** - * Name: stm32_chan_freeall + * Name: stm32l4_chan_freeall * * Description: * Free all channels. * ****************************************************************************/ -static inline void stm32_chan_freeall(FAR struct stm32_usbhost_s *priv) +static inline void stm32l4_chan_freeall(FAR struct stm32l4_usbhost_s *priv) { uint8_t chidx; /* Free all host channels */ - for (chidx = 2; chidx < STM32_NHOST_CHANNELS; chidx ++) + for (chidx = 2; chidx < STM32L4_NHOST_CHANNELS; chidx ++) { - stm32_chan_free(priv, chidx); + stm32l4_chan_free(priv, chidx); } } /**************************************************************************** - * Name: stm32_chan_configure + * Name: stm32l4_chan_configure * * Description: * Configure or re-configure a host channel. Host channels are configured @@ -750,14 +750,14 @@ static inline void stm32_chan_freeall(FAR struct stm32_usbhost_s *priv) * ****************************************************************************/ -static void stm32_chan_configure(FAR struct stm32_usbhost_s *priv, int chidx) +static void stm32l4_chan_configure(FAR struct stm32l4_usbhost_s *priv, int chidx) { - FAR struct stm32_chan_s *chan = &priv->chan[chidx]; + FAR struct stm32l4_chan_s *chan = &priv->chan[chidx]; uint32_t regval; /* Clear any old pending interrupts for this host channel. */ - stm32_putreg(STM32_OTGFS_HCINT(chidx), 0xffffffff); + stm32l4_putreg(STM32L4_OTGFS_HCINT(chidx), 0xffffffff); /* Enable channel interrupts required for transfers on this channel. */ @@ -856,15 +856,15 @@ static void stm32_chan_configure(FAR struct stm32_usbhost_s *priv, int chidx) break; } - stm32_putreg(STM32_OTGFS_HCINTMSK(chidx), regval); + stm32l4_putreg(STM32L4_OTGFS_HCINTMSK(chidx), regval); /* Enable the top level host channel interrupt. */ - stm32_modifyreg(STM32_OTGFS_HAINTMSK, 0, OTGFS_HAINT(chidx)); + stm32l4_modifyreg(STM32L4_OTGFS_HAINTMSK, 0, OTGFS_HAINT(chidx)); /* Make sure host channel interrupts are enabled. */ - stm32_modifyreg(STM32_OTGFS_GINTMSK, 0, OTGFS_GINT_HC); + stm32l4_modifyreg(STM32L4_OTGFS_GINTMSK, 0, OTGFS_GINT_HC); /* Program the HCCHAR register */ @@ -896,11 +896,11 @@ static void stm32_chan_configure(FAR struct stm32_usbhost_s *priv, int chidx) /* Write the channel configuration */ - stm32_putreg(STM32_OTGFS_HCCHAR(chidx), regval); + stm32l4_putreg(STM32L4_OTGFS_HCCHAR(chidx), regval); } /**************************************************************************** - * Name: stm32_chan_halt + * Name: stm32l4_chan_halt * * Description: * Halt the channel associated with 'chidx' by setting the CHannel DISable @@ -908,8 +908,8 @@ static void stm32_chan_configure(FAR struct stm32_usbhost_s *priv, int chidx) * ****************************************************************************/ -static void stm32_chan_halt(FAR struct stm32_usbhost_s *priv, int chidx, - enum stm32_chreason_e chreason) +static void stm32l4_chan_halt(FAR struct stm32l4_usbhost_s *priv, int chidx, + enum stm32l4_chreason_e chreason) { uint32_t hcchar; uint32_t intmsk; @@ -933,7 +933,7 @@ static void stm32_chan_halt(FAR struct stm32_usbhost_s *priv, int chidx, * USB." */ - hcchar = stm32_getreg(STM32_OTGFS_HCCHAR(chidx)); + hcchar = stm32l4_getreg(STM32L4_OTGFS_HCCHAR(chidx)); hcchar |= (OTGFS_HCCHAR_CHDIS | OTGFS_HCCHAR_CHENA); /* Get the endpoint type from the HCCHAR register */ @@ -955,13 +955,13 @@ static void stm32_chan_halt(FAR struct stm32_usbhost_s *priv, int chidx, { /* Get the number of words available in the non-periodic Tx FIFO. */ - avail = stm32_getreg(STM32_OTGFS_HNPTXSTS) & OTGFS_HNPTXSTS_NPTXFSAV_MASK; + avail = stm32l4_getreg(STM32L4_OTGFS_HNPTXSTS) & OTGFS_HNPTXSTS_NPTXFSAV_MASK; } else /* if (eptype == OTGFS_HCCHAR_EPTYP_ISOC || eptype == OTGFS_HCCHAR_EPTYP_INTR) */ { /* Get the number of words available in the non-periodic Tx FIFO. */ - avail = stm32_getreg(STM32_OTGFS_HPTXSTS) & OTGFS_HPTXSTS_PTXFSAVL_MASK; + avail = stm32l4_getreg(STM32L4_OTGFS_HPTXSTS) & OTGFS_HPTXSTS_PTXFSAVL_MASK; } /* Check if there is any space available in the Tx FIFO. */ @@ -975,17 +975,17 @@ static void stm32_chan_halt(FAR struct stm32_usbhost_s *priv, int chidx, /* Unmask the CHannel Halted (CHH) interrupt */ - intmsk = stm32_getreg(STM32_OTGFS_HCINTMSK(chidx)); + intmsk = stm32l4_getreg(STM32L4_OTGFS_HCINTMSK(chidx)); intmsk |= OTGFS_HCINT_CHH; - stm32_putreg(STM32_OTGFS_HCINTMSK(chidx), intmsk); + stm32l4_putreg(STM32L4_OTGFS_HCINTMSK(chidx), intmsk); /* Halt the channel by setting CHDIS (and maybe CHENA) in the HCCHAR */ - stm32_putreg(STM32_OTGFS_HCCHAR(chidx), hcchar); + stm32l4_putreg(STM32L4_OTGFS_HCCHAR(chidx), hcchar); } /**************************************************************************** - * Name: stm32_chan_waitsetup + * Name: stm32l4_chan_waitsetup * * Description: * Set the request for the transfer complete event well BEFORE enabling the @@ -998,8 +998,8 @@ static void stm32_chan_halt(FAR struct stm32_usbhost_s *priv, int chidx, * ****************************************************************************/ -static int stm32_chan_waitsetup(FAR struct stm32_usbhost_s *priv, - FAR struct stm32_chan_s *chan) +static int stm32l4_chan_waitsetup(FAR struct stm32l4_usbhost_s *priv, + FAR struct stm32l4_chan_s *chan) { irqstate_t flags = enter_critical_section(); int ret = -ENODEV; @@ -1025,7 +1025,7 @@ static int stm32_chan_waitsetup(FAR struct stm32_usbhost_s *priv, } /**************************************************************************** - * Name: stm32_chan_asynchsetup + * Name: stm32l4_chan_asynchsetup * * Description: * Set the request for the transfer complete event well BEFORE enabling the @@ -1039,8 +1039,8 @@ static int stm32_chan_waitsetup(FAR struct stm32_usbhost_s *priv, ****************************************************************************/ #ifdef CONFIG_USBHOST_ASYNCH -static int stm32_chan_asynchsetup(FAR struct stm32_usbhost_s *priv, - FAR struct stm32_chan_s *chan, +static int stm32l4_chan_asynchsetup(FAR struct stm32l4_usbhost_s *priv, + FAR struct stm32l4_chan_s *chan, usbhost_asynch_t callback, FAR void *arg) { irqstate_t flags = enter_critical_section(); @@ -1066,7 +1066,7 @@ static int stm32_chan_asynchsetup(FAR struct stm32_usbhost_s *priv, #endif /**************************************************************************** - * Name: stm32_chan_wait + * Name: stm32l4_chan_wait * * Description: * Wait for a transfer on a channel to complete. @@ -1076,8 +1076,8 @@ static int stm32_chan_asynchsetup(FAR struct stm32_usbhost_s *priv, * ****************************************************************************/ -static int stm32_chan_wait(FAR struct stm32_usbhost_s *priv, - FAR struct stm32_chan_s *chan) +static int stm32l4_chan_wait(FAR struct stm32l4_usbhost_s *priv, + FAR struct stm32l4_chan_s *chan) { irqstate_t flags; int ret; @@ -1121,7 +1121,7 @@ static int stm32_chan_wait(FAR struct stm32_usbhost_s *priv, } /**************************************************************************** - * Name: stm32_chan_wakeup + * Name: stm32l4_chan_wakeup * * Description: * A channel transfer has completed... wakeup any threads waiting for the @@ -1133,8 +1133,8 @@ static int stm32_chan_wait(FAR struct stm32_usbhost_s *priv, * ****************************************************************************/ -static void stm32_chan_wakeup(FAR struct stm32_usbhost_s *priv, - FAR struct stm32_chan_s *chan) +static void stm32l4_chan_wakeup(FAR struct stm32l4_usbhost_s *priv, + FAR struct stm32l4_chan_s *chan) { /* Is the transfer complete? */ @@ -1155,7 +1155,7 @@ static void stm32_chan_wakeup(FAR struct stm32_usbhost_s *priv, OTGFS_VTRACE2_CHANWAKEUP_OUT, chan->epno, chan->result); - stm32_givesem(&chan->waitsem); + stm32l4_givesem(&chan->waitsem); chan->waiter = false; } @@ -1170,11 +1170,11 @@ static void stm32_chan_wakeup(FAR struct stm32_usbhost_s *priv, if (chan->in) { - stm32_in_next(priv, chan); + stm32l4_in_next(priv, chan); } else { - stm32_out_next(priv, chan); + stm32l4_out_next(priv, chan); } } #endif @@ -1182,22 +1182,22 @@ static void stm32_chan_wakeup(FAR struct stm32_usbhost_s *priv, } /**************************************************************************** - * Name: stm32_ctrlchan_alloc + * Name: stm32l4_ctrlchan_alloc * * Description: * Allocate and configured channels for a control pipe. * ****************************************************************************/ -static int stm32_ctrlchan_alloc(FAR struct stm32_usbhost_s *priv, +static int stm32l4_ctrlchan_alloc(FAR struct stm32l4_usbhost_s *priv, uint8_t epno, uint8_t funcaddr, uint8_t speed, - FAR struct stm32_ctrlinfo_s *ctrlep) + FAR struct stm32l4_ctrlinfo_s *ctrlep) { - FAR struct stm32_chan_s *chan; + FAR struct stm32l4_chan_s *chan; int inndx; int outndx; - outndx = stm32_chan_alloc(priv); + outndx = stm32l4_chan_alloc(priv); if (outndx < 0) { return -ENOMEM; @@ -1210,20 +1210,20 @@ static int stm32_ctrlchan_alloc(FAR struct stm32_usbhost_s *priv, chan->eptype = OTGFS_EPTYPE_CTRL; chan->funcaddr = funcaddr; chan->speed = speed; - chan->maxpacket = STM32_EP0_DEF_PACKET_SIZE; + chan->maxpacket = STM32L4_EP0_DEF_PACKET_SIZE; chan->indata1 = false; chan->outdata1 = false; /* Configure control OUT channels */ - stm32_chan_configure(priv, outndx); + stm32l4_chan_configure(priv, outndx); /* Allocate and initialize the control IN channel */ - inndx = stm32_chan_alloc(priv); + inndx = stm32l4_chan_alloc(priv); if (inndx < 0) { - stm32_chan_free(priv, outndx); + stm32l4_chan_free(priv, outndx); return -ENOMEM; } @@ -1234,18 +1234,18 @@ static int stm32_ctrlchan_alloc(FAR struct stm32_usbhost_s *priv, chan->eptype = OTGFS_EPTYPE_CTRL; chan->funcaddr = funcaddr; chan->speed = speed; - chan->maxpacket = STM32_EP0_DEF_PACKET_SIZE; + chan->maxpacket = STM32L4_EP0_DEF_PACKET_SIZE; chan->indata1 = false; chan->outdata1 = false; /* Configure control IN channels */ - stm32_chan_configure(priv, inndx); + stm32l4_chan_configure(priv, inndx); return OK; } /**************************************************************************** - * Name: stm32_ctrlep_alloc + * Name: stm32l4_ctrlep_alloc * * Description: * Allocate a container and channels for control pipe. @@ -1265,12 +1265,12 @@ static int stm32_ctrlchan_alloc(FAR struct stm32_usbhost_s *priv, * ****************************************************************************/ -static int stm32_ctrlep_alloc(FAR struct stm32_usbhost_s *priv, +static int stm32l4_ctrlep_alloc(FAR struct stm32l4_usbhost_s *priv, FAR const struct usbhost_epdesc_s *epdesc, FAR usbhost_ep_t *ep) { FAR struct usbhost_hubport_s *hport; - FAR struct stm32_ctrlinfo_s *ctrlep; + FAR struct stm32l4_ctrlinfo_s *ctrlep; int ret; /* Sanity check. NOTE that this method should only be called if a device is @@ -1282,7 +1282,7 @@ static int stm32_ctrlep_alloc(FAR struct stm32_usbhost_s *priv, /* Allocate a container for the control endpoint */ - ctrlep = (FAR struct stm32_ctrlinfo_s *)kmm_malloc(sizeof(struct stm32_ctrlinfo_s)); + ctrlep = (FAR struct stm32l4_ctrlinfo_s *)kmm_malloc(sizeof(struct stm32l4_ctrlinfo_s)); if (ctrlep == NULL) { uerr("ERROR: Failed to allocate control endpoint container\n"); @@ -1291,11 +1291,11 @@ static int stm32_ctrlep_alloc(FAR struct stm32_usbhost_s *priv, /* Then allocate and configure the IN/OUT channnels */ - ret = stm32_ctrlchan_alloc(priv, epdesc->addr & USB_EPNO_MASK, + ret = stm32l4_ctrlchan_alloc(priv, epdesc->addr & USB_EPNO_MASK, hport->funcaddr, hport->speed, ctrlep); if (ret < 0) { - uerr("ERROR: stm32_ctrlchan_alloc failed: %d\n", ret); + uerr("ERROR: stm32l4_ctrlchan_alloc failed: %d\n", ret); kmm_free(ctrlep); return ret; } @@ -1307,7 +1307,7 @@ static int stm32_ctrlep_alloc(FAR struct stm32_usbhost_s *priv, } /************************************************************************************ - * Name: stm32_xfrep_alloc + * Name: stm32l4_xfrep_alloc * * Description: * Allocate and configure one unidirectional endpoint. @@ -1327,12 +1327,12 @@ static int stm32_ctrlep_alloc(FAR struct stm32_usbhost_s *priv, * ************************************************************************************/ -static int stm32_xfrep_alloc(FAR struct stm32_usbhost_s *priv, +static int stm32l4_xfrep_alloc(FAR struct stm32l4_usbhost_s *priv, FAR const struct usbhost_epdesc_s *epdesc, FAR usbhost_ep_t *ep) { struct usbhost_hubport_s *hport; - FAR struct stm32_chan_s *chan; + FAR struct stm32l4_chan_s *chan; int chidx; /* Sanity check. NOTE that this method should only be called if a device is @@ -1344,7 +1344,7 @@ static int stm32_xfrep_alloc(FAR struct stm32_usbhost_s *priv, /* Allocate a host channel for the endpoint */ - chidx = stm32_chan_alloc(priv); + chidx = stm32l4_chan_alloc(priv); if (chidx < 0) { uerr("ERROR: Failed to allocate a host channel\n"); @@ -1369,7 +1369,7 @@ static int stm32_xfrep_alloc(FAR struct stm32_usbhost_s *priv, /* Then configure the endpoint */ - stm32_chan_configure(priv, chidx); + stm32l4_chan_configure(priv, chidx); /* Return the index to the allocated channel as the endpoint "handle" */ @@ -1378,16 +1378,16 @@ static int stm32_xfrep_alloc(FAR struct stm32_usbhost_s *priv, } /**************************************************************************** - * Name: stm32_transfer_start + * Name: stm32l4_transfer_start * * Description: * Start at transfer on the select IN or OUT channel. * ****************************************************************************/ -static void stm32_transfer_start(FAR struct stm32_usbhost_s *priv, int chidx) +static void stm32l4_transfer_start(FAR struct stm32l4_usbhost_s *priv, int chidx) { - FAR struct stm32_chan_s *chan; + FAR struct stm32l4_chan_s *chan; uint32_t regval; unsigned int npackets; unsigned int maxpacket; @@ -1426,10 +1426,10 @@ static void stm32_transfer_start(FAR struct stm32_usbhost_s *priv, int chidx) * packets that can be transferred (this should not happen). */ - if (npackets > STM32_MAX_PKTCOUNT) + if (npackets > STM32L4_MAX_PKTCOUNT) { - npackets = STM32_MAX_PKTCOUNT; - chan->buflen = STM32_MAX_PKTCOUNT * maxpacket; + npackets = STM32L4_MAX_PKTCOUNT; + chan->buflen = STM32L4_MAX_PKTCOUNT * maxpacket; usbhost_trace2(OTGFS_TRACE2_CLIP, chidx, chan->buflen); } } @@ -1466,18 +1466,18 @@ static void stm32_transfer_start(FAR struct stm32_usbhost_s *priv, int chidx) regval = ((uint32_t)chan->buflen << OTGFS_HCTSIZ_XFRSIZ_SHIFT) | ((uint32_t)npackets << OTGFS_HCTSIZ_PKTCNT_SHIFT) | ((uint32_t)chan->pid << OTGFS_HCTSIZ_DPID_SHIFT); - stm32_putreg(STM32_OTGFS_HCTSIZ(chidx), regval); + stm32l4_putreg(STM32L4_OTGFS_HCTSIZ(chidx), regval); /* Setup the HCCHAR register: Frame oddness and host channel enable */ - regval = stm32_getreg(STM32_OTGFS_HCCHAR(chidx)); + regval = stm32l4_getreg(STM32L4_OTGFS_HCCHAR(chidx)); /* Set/clear the Odd Frame bit. Check for an even frame; if so set Odd * Frame. This field is applicable for only periodic (isochronous and * interrupt) channels. */ - if ((stm32_getreg(STM32_OTGFS_HFNUM) & 1) == 0) + if ((stm32l4_getreg(STM32L4_OTGFS_HFNUM) & 1) == 0) { regval |= OTGFS_HCCHAR_ODDFRM; } @@ -1488,7 +1488,7 @@ static void stm32_transfer_start(FAR struct stm32_usbhost_s *priv, int chidx) regval &= ~OTGFS_HCCHAR_CHDIS; regval |= OTGFS_HCCHAR_CHENA; - stm32_putreg(STM32_OTGFS_HCCHAR(chidx), regval); + stm32l4_putreg(STM32L4_OTGFS_HCCHAR(chidx), regval); /* If this is an out transfer, then we need to do more.. we need to copy * the outgoing data into the correct TxFIFO. @@ -1509,7 +1509,7 @@ static void stm32_transfer_start(FAR struct stm32_usbhost_s *priv, int chidx) { /* Read the Non-periodic Tx FIFO status register */ - regval = stm32_getreg(STM32_OTGFS_HNPTXSTS); + regval = stm32l4_getreg(STM32L4_OTGFS_HNPTXSTS); avail = ((regval & OTGFS_HNPTXSTS_NPTXFSAV_MASK) >> OTGFS_HNPTXSTS_NPTXFSAV_SHIFT) << 2; } break; @@ -1521,7 +1521,7 @@ static void stm32_transfer_start(FAR struct stm32_usbhost_s *priv, int chidx) { /* Read the Non-periodic Tx FIFO status register */ - regval = stm32_getreg(STM32_OTGFS_HPTXSTS); + regval = stm32l4_getreg(STM32L4_OTGFS_HPTXSTS); avail = ((regval & OTGFS_HPTXSTS_PTXFSAVL_MASK) >> OTGFS_HPTXSTS_PTXFSAVL_SHIFT) << 2; } break; @@ -1550,7 +1550,7 @@ static void stm32_transfer_start(FAR struct stm32_usbhost_s *priv, int chidx) /* Write packet into the Tx FIFO. */ - stm32_gint_wrpacket(priv, chan->buffer, chidx, wrsize); + stm32l4_gint_wrpacket(priv, chan->buffer, chidx, wrsize); } /* Did we put the entire buffer into the Tx FIFO? */ @@ -1562,13 +1562,13 @@ static void stm32_transfer_start(FAR struct stm32_usbhost_s *priv, int chidx) * FIFO becomes empty. */ - stm32_txfe_enable(priv, chidx); + stm32l4_txfe_enable(priv, chidx); } } } /**************************************************************************** - * Name: stm32_getframe + * Name: stm32l4_getframe * * Description: * Get the current frame number. The frame number (FRNUM) field increments @@ -1578,25 +1578,25 @@ static void stm32_transfer_start(FAR struct stm32_usbhost_s *priv, int chidx) ****************************************************************************/ #if 0 /* Not used */ -static inline uint16_t stm32_getframe(void) +static inline uint16_t stm32l4_getframe(void) { - return (uint16_t)(stm32_getreg(STM32_OTGFS_HFNUM) & OTGFS_HFNUM_FRNUM_MASK); + return (uint16_t)(stm32l4_getreg(STM32L4_OTGFS_HFNUM) & OTGFS_HFNUM_FRNUM_MASK); } #endif /**************************************************************************** - * Name: stm32_ctrl_sendsetup + * Name: stm32l4_ctrl_sendsetup * * Description: * Send an IN/OUT SETUP packet. * ****************************************************************************/ -static int stm32_ctrl_sendsetup(FAR struct stm32_usbhost_s *priv, - FAR struct stm32_ctrlinfo_s *ep0, +static int stm32l4_ctrl_sendsetup(FAR struct stm32l4_usbhost_s *priv, + FAR struct stm32l4_ctrlinfo_s *ep0, FAR const struct usb_ctrlreq_s *req) { - FAR struct stm32_chan_s *chan; + FAR struct stm32l4_chan_s *chan; systime_t start; systime_t elapsed; int ret; @@ -1617,7 +1617,7 @@ static int stm32_ctrl_sendsetup(FAR struct stm32_usbhost_s *priv, /* Set up for the wait BEFORE starting the transfer */ - ret = stm32_chan_waitsetup(priv, chan); + ret = stm32l4_chan_waitsetup(priv, chan); if (ret < 0) { usbhost_trace1(OTGFS_TRACE1_DEVDISCONN, 0); @@ -1626,11 +1626,11 @@ static int stm32_ctrl_sendsetup(FAR struct stm32_usbhost_s *priv, /* Start the transfer */ - stm32_transfer_start(priv, ep0->outndx); + stm32l4_transfer_start(priv, ep0->outndx); /* Wait for the transfer to complete */ - ret = stm32_chan_wait(priv, chan); + ret = stm32l4_chan_wait(priv, chan); /* Return on success and for all failures other than EAGAIN. EAGAIN * means that the device NAKed the SETUP command and that we should @@ -1655,13 +1655,13 @@ static int stm32_ctrl_sendsetup(FAR struct stm32_usbhost_s *priv, elapsed = clock_systimer() - start; } - while (elapsed < STM32_SETUP_DELAY); + while (elapsed < STM32L4_SETUP_DELAY); return -ETIMEDOUT; } /**************************************************************************** - * Name: stm32_ctrl_senddata + * Name: stm32l4_ctrl_senddata * * Description: * Send data in the data phase of an OUT control transfer. Or send status @@ -1669,11 +1669,11 @@ static int stm32_ctrl_sendsetup(FAR struct stm32_usbhost_s *priv, * ****************************************************************************/ -static int stm32_ctrl_senddata(FAR struct stm32_usbhost_s *priv, - FAR struct stm32_ctrlinfo_s *ep0, +static int stm32l4_ctrl_senddata(FAR struct stm32l4_usbhost_s *priv, + FAR struct stm32l4_ctrlinfo_s *ep0, FAR uint8_t *buffer, unsigned int buflen) { - FAR struct stm32_chan_s *chan = &priv->chan[ep0->outndx]; + FAR struct stm32l4_chan_s *chan = &priv->chan[ep0->outndx]; int ret; /* Save buffer information */ @@ -1697,7 +1697,7 @@ static int stm32_ctrl_senddata(FAR struct stm32_usbhost_s *priv, /* Set up for the wait BEFORE starting the transfer */ - ret = stm32_chan_waitsetup(priv, chan); + ret = stm32l4_chan_waitsetup(priv, chan); if (ret < 0) { usbhost_trace1(OTGFS_TRACE1_DEVDISCONN, 0); @@ -1706,15 +1706,15 @@ static int stm32_ctrl_senddata(FAR struct stm32_usbhost_s *priv, /* Start the transfer */ - stm32_transfer_start(priv, ep0->outndx); + stm32l4_transfer_start(priv, ep0->outndx); /* Wait for the transfer to complete and return the result */ - return stm32_chan_wait(priv, chan); + return stm32l4_chan_wait(priv, chan); } /**************************************************************************** - * Name: stm32_ctrl_recvdata + * Name: stm32l4_ctrl_recvdata * * Description: * Receive data in the data phase of an IN control transfer. Or receive status @@ -1722,11 +1722,11 @@ static int stm32_ctrl_senddata(FAR struct stm32_usbhost_s *priv, * ****************************************************************************/ -static int stm32_ctrl_recvdata(FAR struct stm32_usbhost_s *priv, - FAR struct stm32_ctrlinfo_s *ep0, +static int stm32l4_ctrl_recvdata(FAR struct stm32l4_usbhost_s *priv, + FAR struct stm32l4_ctrlinfo_s *ep0, FAR uint8_t *buffer, unsigned int buflen) { - FAR struct stm32_chan_s *chan = &priv->chan[ep0->inndx]; + FAR struct stm32l4_chan_s *chan = &priv->chan[ep0->inndx]; int ret; /* Save buffer information */ @@ -1738,7 +1738,7 @@ static int stm32_ctrl_recvdata(FAR struct stm32_usbhost_s *priv, /* Set up for the wait BEFORE starting the transfer */ - ret = stm32_chan_waitsetup(priv, chan); + ret = stm32l4_chan_waitsetup(priv, chan); if (ret < 0) { usbhost_trace1(OTGFS_TRACE1_DEVDISCONN, 0); @@ -1747,24 +1747,24 @@ static int stm32_ctrl_recvdata(FAR struct stm32_usbhost_s *priv, /* Start the transfer */ - stm32_transfer_start(priv, ep0->inndx); + stm32l4_transfer_start(priv, ep0->inndx); /* Wait for the transfer to complete and return the result */ - return stm32_chan_wait(priv, chan); + return stm32l4_chan_wait(priv, chan); } /**************************************************************************** - * Name: stm32_in_setup + * Name: stm32l4_in_setup * * Description: * Initiate an IN transfer on an bulk, interrupt, or isochronous pipe. * ****************************************************************************/ -static int stm32_in_setup(FAR struct stm32_usbhost_s *priv, int chidx) +static int stm32l4_in_setup(FAR struct stm32l4_usbhost_s *priv, int chidx) { - FAR struct stm32_chan_s *chan; + FAR struct stm32l4_chan_s *chan; /* Set up for the transfer based on the direction and the endpoint type */ @@ -1811,22 +1811,22 @@ static int stm32_in_setup(FAR struct stm32_usbhost_s *priv, int chidx) /* Start the transfer */ - stm32_transfer_start(priv, chidx); + stm32l4_transfer_start(priv, chidx); return OK; } /**************************************************************************** - * Name: stm32_in_transfer + * Name: stm32l4_in_transfer * * Description: * Transfer 'buflen' bytes into 'buffer' from an IN channel. * ****************************************************************************/ -static ssize_t stm32_in_transfer(FAR struct stm32_usbhost_s *priv, int chidx, +static ssize_t stm32l4_in_transfer(FAR struct stm32l4_usbhost_s *priv, int chidx, FAR uint8_t *buffer, size_t buflen) { - FAR struct stm32_chan_s *chan; + FAR struct stm32l4_chan_s *chan; systime_t start; systime_t elapsed; int ret; @@ -1845,7 +1845,7 @@ static ssize_t stm32_in_transfer(FAR struct stm32_usbhost_s *priv, int chidx, { /* Set up for the wait BEFORE starting the transfer */ - ret = stm32_chan_waitsetup(priv, chan); + ret = stm32l4_chan_waitsetup(priv, chan); if (ret < 0) { usbhost_trace1(OTGFS_TRACE1_DEVDISCONN, 0); @@ -1854,16 +1854,16 @@ static ssize_t stm32_in_transfer(FAR struct stm32_usbhost_s *priv, int chidx, /* Set up for the transfer based on the direction and the endpoint type */ - ret = stm32_in_setup(priv, chidx); + ret = stm32l4_in_setup(priv, chidx); if (ret < 0) { - uerr("ERROR: stm32_in_setup failed: %d\n", ret); + uerr("ERROR: stm32l4_in_setup failed: %d\n", ret); return (ssize_t)ret; } /* Wait for the transfer to complete and get the result */ - ret = stm32_chan_wait(priv, chan); + ret = stm32l4_chan_wait(priv, chan); /* EAGAIN indicates that the device NAKed the transfer and we need * do try again. Anything else (success or other errors) will @@ -1883,12 +1883,12 @@ static ssize_t stm32_in_transfer(FAR struct stm32_usbhost_s *priv, int chidx, elapsed = clock_systimer() - start; if (ret != -EAGAIN || /* Not a NAK condition OR */ - elapsed >= STM32_DATANAK_DELAY || /* Timeout has elapsed OR */ + elapsed >= STM32L4_DATANAK_DELAY || /* Timeout has elapsed OR */ chan->xfrd > 0) /* Data has been partially transferred */ { /* Break out and return the error */ - uerr("ERROR: stm32_chan_wait failed: %d\n", ret); + uerr("ERROR: stm32l4_chan_wait failed: %d\n", ret); return (ssize_t)ret; } } @@ -1898,7 +1898,7 @@ static ssize_t stm32_in_transfer(FAR struct stm32_usbhost_s *priv, int chidx, } /**************************************************************************** - * Name: stm32_in_next + * Name: stm32l4_in_next * * Description: * Initiate the next of a sequence of asynchronous transfers. @@ -1909,8 +1909,8 @@ static ssize_t stm32_in_transfer(FAR struct stm32_usbhost_s *priv, int chidx, ****************************************************************************/ #ifdef CONFIG_USBHOST_ASYNCH -static void stm32_in_next(FAR struct stm32_usbhost_s *priv, - FAR struct stm32_chan_s *chan) +static void stm32l4_in_next(FAR struct stm32l4_usbhost_s *priv, + FAR struct stm32l4_chan_s *chan) { usbhost_asynch_t callback; FAR void *arg; @@ -1927,13 +1927,13 @@ static void stm32_in_next(FAR struct stm32_usbhost_s *priv, * endpoint type */ - ret = stm32_in_setup(priv, chan->chidx); + ret = stm32l4_in_setup(priv, chan->chidx); if (ret >= 0) { return; } - uerr("ERROR: stm32_in_setup failed: %d\n", ret); + uerr("ERROR: stm32l4_in_setup failed: %d\n", ret); result = ret; } @@ -1963,7 +1963,7 @@ static void stm32_in_next(FAR struct stm32_usbhost_s *priv, #endif /**************************************************************************** - * Name: stm32_in_asynch + * Name: stm32l4_in_asynch * * Description: * Initiate the first of a sequence of asynchronous transfers. @@ -1974,11 +1974,11 @@ static void stm32_in_next(FAR struct stm32_usbhost_s *priv, ****************************************************************************/ #ifdef CONFIG_USBHOST_ASYNCH -static int stm32_in_asynch(FAR struct stm32_usbhost_s *priv, int chidx, +static int stm32l4_in_asynch(FAR struct stm32l4_usbhost_s *priv, int chidx, FAR uint8_t *buffer, size_t buflen, usbhost_asynch_t callback, FAR void *arg) { - FAR struct stm32_chan_s *chan; + FAR struct stm32l4_chan_s *chan; int ret; /* Set up for the transfer data and callback BEFORE starting the first transfer */ @@ -1988,19 +1988,19 @@ static int stm32_in_asynch(FAR struct stm32_usbhost_s *priv, int chidx, chan->buflen = buflen; chan->xfrd = 0; - ret = stm32_chan_asynchsetup(priv, chan, callback, arg); + ret = stm32l4_chan_asynchsetup(priv, chan, callback, arg); if (ret < 0) { - uerr("ERROR: stm32_chan_asynchsetup failed: %d\n", ret); + uerr("ERROR: stm32l4_chan_asynchsetup failed: %d\n", ret); return ret; } /* Set up for the transfer based on the direction and the endpoint type */ - ret = stm32_in_setup(priv, chidx); + ret = stm32l4_in_setup(priv, chidx); if (ret < 0) { - uerr("ERROR: stm32_in_setup failed: %d\n", ret); + uerr("ERROR: stm32l4_in_setup failed: %d\n", ret); } /* And return with the transfer pending */ @@ -2010,16 +2010,16 @@ static int stm32_in_asynch(FAR struct stm32_usbhost_s *priv, int chidx, #endif /**************************************************************************** - * Name: stm32_out_setup + * Name: stm32l4_out_setup * * Description: * Initiate an OUT transfer on an bulk, interrupt, or isochronous pipe. * ****************************************************************************/ -static int stm32_out_setup(FAR struct stm32_usbhost_s *priv, int chidx) +static int stm32l4_out_setup(FAR struct stm32l4_usbhost_s *priv, int chidx) { - FAR struct stm32_chan_s *chan; + FAR struct stm32l4_chan_s *chan; /* Set up for the transfer based on the direction and the endpoint type */ @@ -2070,22 +2070,22 @@ static int stm32_out_setup(FAR struct stm32_usbhost_s *priv, int chidx) /* Start the transfer */ - stm32_transfer_start(priv, chidx); + stm32l4_transfer_start(priv, chidx); return OK; } /**************************************************************************** - * Name: stm32_out_transfer + * Name: stm32l4_out_transfer * * Description: * Transfer the 'buflen' bytes in 'buffer' through an OUT channel. * ****************************************************************************/ -static ssize_t stm32_out_transfer(FAR struct stm32_usbhost_s *priv, int chidx, +static ssize_t stm32l4_out_transfer(FAR struct stm32l4_usbhost_s *priv, int chidx, FAR uint8_t *buffer, size_t buflen) { - FAR struct stm32_chan_s *chan; + FAR struct stm32l4_chan_s *chan; systime_t start; systime_t elapsed; size_t xfrlen; @@ -2114,7 +2114,7 @@ static ssize_t stm32_out_transfer(FAR struct stm32_usbhost_s *priv, int chidx, /* Set up for the wait BEFORE starting the transfer */ - ret = stm32_chan_waitsetup(priv, chan); + ret = stm32l4_chan_waitsetup(priv, chan); if (ret < 0) { usbhost_trace1(OTGFS_TRACE1_DEVDISCONN, 0); @@ -2123,16 +2123,16 @@ static ssize_t stm32_out_transfer(FAR struct stm32_usbhost_s *priv, int chidx, /* Set up for the transfer based on the direction and the endpoint type */ - ret = stm32_out_setup(priv, chidx); + ret = stm32l4_out_setup(priv, chidx); if (ret < 0) { - uerr("ERROR: stm32_out_setup failed: %d\n", ret); + uerr("ERROR: stm32l4_out_setup failed: %d\n", ret); return (ssize_t)ret; } /* Wait for the transfer to complete and get the result */ - ret = stm32_chan_wait(priv, chan); + ret = stm32l4_chan_wait(priv, chan); /* Handle transfer failures */ @@ -2149,12 +2149,12 @@ static ssize_t stm32_out_transfer(FAR struct stm32_usbhost_s *priv, int chidx, elapsed = clock_systimer() - start; if (ret != -EAGAIN || /* Not a NAK condition OR */ - elapsed >= STM32_DATANAK_DELAY || /* Timeout has elapsed OR */ + elapsed >= STM32L4_DATANAK_DELAY || /* Timeout has elapsed OR */ chan->xfrd > 0) /* Data has been partially transferred */ { /* Break out and return the error */ - uerr("ERROR: stm32_chan_wait failed: %d\n", ret); + uerr("ERROR: stm32l4_chan_wait failed: %d\n", ret); return (ssize_t)ret; } @@ -2162,7 +2162,7 @@ static ssize_t stm32_out_transfer(FAR struct stm32_usbhost_s *priv, int chidx, * data in the FIFO when the NAK occurs? Does it discard it? */ - stm32_flush_txfifos(OTGFS_GRSTCTL_TXFNUM_HALL); + stm32l4_flush_txfifos(OTGFS_GRSTCTL_TXFNUM_HALL); /* Get the device a little time to catch up. Then retry the transfer * using the same buffer pointer and length. @@ -2184,7 +2184,7 @@ static ssize_t stm32_out_transfer(FAR struct stm32_usbhost_s *priv, int chidx, } /**************************************************************************** - * Name: stm32_out_next + * Name: stm32l4_out_next * * Description: * Initiate the next of a sequence of asynchronous transfers. @@ -2195,8 +2195,8 @@ static ssize_t stm32_out_transfer(FAR struct stm32_usbhost_s *priv, int chidx, ****************************************************************************/ #ifdef CONFIG_USBHOST_ASYNCH -static void stm32_out_next(FAR struct stm32_usbhost_s *priv, - FAR struct stm32_chan_s *chan) +static void stm32l4_out_next(FAR struct stm32l4_usbhost_s *priv, + FAR struct stm32l4_chan_s *chan) { usbhost_asynch_t callback; FAR void *arg; @@ -2213,13 +2213,13 @@ static void stm32_out_next(FAR struct stm32_usbhost_s *priv, * endpoint type */ - ret = stm32_out_setup(priv, chan->chidx); + ret = stm32l4_out_setup(priv, chan->chidx); if (ret >= 0) { return; } - uerr("ERROR: stm32_out_setup failed: %d\n", ret); + uerr("ERROR: stm32l4_out_setup failed: %d\n", ret); result = ret; } @@ -2249,7 +2249,7 @@ static void stm32_out_next(FAR struct stm32_usbhost_s *priv, #endif /**************************************************************************** - * Name: stm32_out_asynch + * Name: stm32l4_out_asynch * * Description: * Initiate the first of a sequence of asynchronous transfers. @@ -2260,11 +2260,11 @@ static void stm32_out_next(FAR struct stm32_usbhost_s *priv, ****************************************************************************/ #ifdef CONFIG_USBHOST_ASYNCH -static int stm32_out_asynch(FAR struct stm32_usbhost_s *priv, int chidx, +static int stm32l4_out_asynch(FAR struct stm32l4_usbhost_s *priv, int chidx, FAR uint8_t *buffer, size_t buflen, usbhost_asynch_t callback, FAR void *arg) { - FAR struct stm32_chan_s *chan; + FAR struct stm32l4_chan_s *chan; int ret; /* Set up for the transfer data and callback BEFORE starting the first transfer */ @@ -2274,19 +2274,19 @@ static int stm32_out_asynch(FAR struct stm32_usbhost_s *priv, int chidx, chan->buflen = buflen; chan->xfrd = 0; - ret = stm32_chan_asynchsetup(priv, chan, callback, arg); + ret = stm32l4_chan_asynchsetup(priv, chan, callback, arg); if (ret < 0) { - uerr("ERROR: stm32_chan_asynchsetup failed: %d\n", ret); + uerr("ERROR: stm32l4_chan_asynchsetup failed: %d\n", ret); return ret; } /* Set up for the transfer based on the direction and the endpoint type */ - ret = stm32_out_setup(priv, chidx); + ret = stm32l4_out_setup(priv, chidx); if (ret < 0) { - uerr("ERROR: stm32_out_setup failed: %d\n", ret); + uerr("ERROR: stm32l4_out_setup failed: %d\n", ret); } /* And return with the transfer pending */ @@ -2296,7 +2296,7 @@ static int stm32_out_asynch(FAR struct stm32_usbhost_s *priv, int chidx, #endif /**************************************************************************** - * Name: stm32_gint_wrpacket + * Name: stm32l4_gint_wrpacket * * Description: * Transfer the 'buflen' bytes in 'buffer' to the Tx FIFO associated with @@ -2304,14 +2304,14 @@ static int stm32_out_asynch(FAR struct stm32_usbhost_s *priv, int chidx, * ****************************************************************************/ -static void stm32_gint_wrpacket(FAR struct stm32_usbhost_s *priv, +static void stm32l4_gint_wrpacket(FAR struct stm32l4_usbhost_s *priv, FAR uint8_t *buffer, int chidx, int buflen) { FAR uint32_t *src; uint32_t fifo; int buflen32; - stm32_pktdump("Sending", buffer, buflen); + stm32l4_pktdump("Sending", buffer, buflen); /* Get the number of 32-byte words associated with this byte size */ @@ -2319,7 +2319,7 @@ static void stm32_gint_wrpacket(FAR struct stm32_usbhost_s *priv, /* Get the address of the Tx FIFO associated with this channel */ - fifo = STM32_OTGFS_DFIFO_HCH(chidx); + fifo = STM32L4_OTGFS_DFIFO_HCH(chidx); /* Transfer all of the data into the Tx FIFO */ @@ -2327,7 +2327,7 @@ static void stm32_gint_wrpacket(FAR struct stm32_usbhost_s *priv, for (; buflen32 > 0; buflen32--) { uint32_t data = *src++; - stm32_putreg(fifo, data); + stm32l4_putreg(fifo, data); } /* Increment the count of bytes "in-flight" in the Tx FIFO */ @@ -2336,7 +2336,7 @@ static void stm32_gint_wrpacket(FAR struct stm32_usbhost_s *priv, } /**************************************************************************** - * Name: stm32_gint_hcinisr + * Name: stm32l4_gint_hcinisr * * Description: * USB OTG FS host IN channels interrupt handler @@ -2354,10 +2354,10 @@ static void stm32_gint_wrpacket(FAR struct stm32_usbhost_s *priv, * ****************************************************************************/ -static inline void stm32_gint_hcinisr(FAR struct stm32_usbhost_s *priv, +static inline void stm32l4_gint_hcinisr(FAR struct stm32l4_usbhost_s *priv, int chidx) { - FAR struct stm32_chan_s *chan = &priv->chan[chidx]; + FAR struct stm32l4_chan_s *chan = &priv->chan[chidx]; uint32_t regval; uint32_t pending; @@ -2365,8 +2365,8 @@ static inline void stm32_gint_hcinisr(FAR struct stm32_usbhost_s *priv, * HCINTMSK register to get the set of enabled HC interrupts. */ - pending = stm32_getreg(STM32_OTGFS_HCINT(chidx)); - regval = stm32_getreg(STM32_OTGFS_HCINTMSK(chidx)); + pending = stm32l4_getreg(STM32L4_OTGFS_HCINT(chidx)); + regval = stm32l4_getreg(STM32L4_OTGFS_HCINTMSK(chidx)); /* AND the two to get the set of enabled, pending HC interrupts */ @@ -2379,7 +2379,7 @@ static inline void stm32_gint_hcinisr(FAR struct stm32_usbhost_s *priv, { /* Clear the pending the ACK response received/transmitted (ACK) interrupt */ - stm32_putreg(STM32_OTGFS_HCINT(chidx), OTGFS_HCINT_ACK); + stm32l4_putreg(STM32L4_OTGFS_HCINT(chidx), OTGFS_HCINT_ACK); } /* Check for a pending STALL response receive (STALL) interrupt */ @@ -2388,13 +2388,13 @@ static inline void stm32_gint_hcinisr(FAR struct stm32_usbhost_s *priv, { /* Clear the NAK and STALL Conditions. */ - stm32_putreg(STM32_OTGFS_HCINT(chidx), (OTGFS_HCINT_NAK | OTGFS_HCINT_STALL)); + stm32l4_putreg(STM32L4_OTGFS_HCINT(chidx), (OTGFS_HCINT_NAK | OTGFS_HCINT_STALL)); /* Halt the channel when a STALL, TXERR, BBERR or DTERR interrupt is * received on the channel. */ - stm32_chan_halt(priv, chidx, CHREASON_STALL); + stm32l4_chan_halt(priv, chidx, CHREASON_STALL); /* When there is a STALL, clear any pending NAK so that it is not * processed below. @@ -2411,11 +2411,11 @@ static inline void stm32_gint_hcinisr(FAR struct stm32_usbhost_s *priv, * received on the channel. */ - stm32_chan_halt(priv, chidx, CHREASON_DTERR); + stm32l4_chan_halt(priv, chidx, CHREASON_DTERR); /* Clear the NAK and data toggle error conditions */ - stm32_putreg(STM32_OTGFS_HCINT(chidx), (OTGFS_HCINT_NAK | OTGFS_HCINT_DTERR)); + stm32l4_putreg(STM32L4_OTGFS_HCINT(chidx), (OTGFS_HCINT_NAK | OTGFS_HCINT_DTERR)); } /* Check for a pending FRaMe OverRun (FRMOR) interrupt */ @@ -2424,11 +2424,11 @@ static inline void stm32_gint_hcinisr(FAR struct stm32_usbhost_s *priv, { /* Halt the channel -- the CHH interrupt is expected next */ - stm32_chan_halt(priv, chidx, CHREASON_FRMOR); + stm32l4_chan_halt(priv, chidx, CHREASON_FRMOR); /* Clear the FRaMe OverRun (FRMOR) condition */ - stm32_putreg(STM32_OTGFS_HCINT(chidx), OTGFS_HCINT_FRMOR); + stm32l4_putreg(STM32L4_OTGFS_HCINT(chidx), OTGFS_HCINT_FRMOR); } /* Check for a pending TransFeR Completed (XFRC) interrupt */ @@ -2437,7 +2437,7 @@ static inline void stm32_gint_hcinisr(FAR struct stm32_usbhost_s *priv, { /* Clear the TransFeR Completed (XFRC) condition */ - stm32_putreg(STM32_OTGFS_HCINT(chidx), OTGFS_HCINT_XFRC); + stm32l4_putreg(STM32L4_OTGFS_HCINT(chidx), OTGFS_HCINT_XFRC); /* Then handle the transfer completion event based on the endpoint type */ @@ -2445,22 +2445,22 @@ static inline void stm32_gint_hcinisr(FAR struct stm32_usbhost_s *priv, { /* Halt the channel -- the CHH interrupt is expected next */ - stm32_chan_halt(priv, chidx, CHREASON_XFRC); + stm32l4_chan_halt(priv, chidx, CHREASON_XFRC); /* Clear any pending NAK condition. The 'indata1' data toggle * should have been appropriately updated by the RxFIFO * logic as each packet was received. */ - stm32_putreg(STM32_OTGFS_HCINT(chidx), OTGFS_HCINT_NAK); + stm32l4_putreg(STM32L4_OTGFS_HCINT(chidx), OTGFS_HCINT_NAK); } else if (chan->eptype == OTGFS_EPTYPE_INTR) { /* Force the next transfer on an ODD frame */ - regval = stm32_getreg(STM32_OTGFS_HCCHAR(chidx)); + regval = stm32l4_getreg(STM32L4_OTGFS_HCCHAR(chidx)); regval |= OTGFS_HCCHAR_ODDFRM; - stm32_putreg(STM32_OTGFS_HCCHAR(chidx), regval); + stm32l4_putreg(STM32L4_OTGFS_HCCHAR(chidx), regval); /* Set the request done state */ @@ -2474,9 +2474,9 @@ static inline void stm32_gint_hcinisr(FAR struct stm32_usbhost_s *priv, { /* Mask the CHannel Halted (CHH) interrupt */ - regval = stm32_getreg(STM32_OTGFS_HCINTMSK(chidx)); + regval = stm32l4_getreg(STM32L4_OTGFS_HCINTMSK(chidx)); regval &= ~OTGFS_HCINT_CHH; - stm32_putreg(STM32_OTGFS_HCINTMSK(chidx), regval); + stm32l4_putreg(STM32L4_OTGFS_HCINTMSK(chidx), regval); /* Update the request state based on the host state machine state */ @@ -2505,7 +2505,7 @@ static inline void stm32_gint_hcinisr(FAR struct stm32_usbhost_s *priv, * and check for an interrupt endpoint. */ - regval = stm32_getreg(STM32_OTGFS_HCCHAR(chidx)); + regval = stm32l4_getreg(STM32L4_OTGFS_HCCHAR(chidx)); if ((regval & OTGFS_HCCHAR_EPTYP_MASK) == OTGFS_HCCHAR_EPTYP_INTR) { /* Toggle the IN data toggle (Used by Bulk and INTR only) */ @@ -2526,7 +2526,7 @@ static inline void stm32_gint_hcinisr(FAR struct stm32_usbhost_s *priv, /* Clear the CHannel Halted (CHH) condition */ - stm32_putreg(STM32_OTGFS_HCINT(chidx), OTGFS_HCINT_CHH); + stm32l4_putreg(STM32L4_OTGFS_HCINT(chidx), OTGFS_HCINT_CHH); } /* Check for a pending Transaction ERror (TXERR) interrupt */ @@ -2537,11 +2537,11 @@ static inline void stm32_gint_hcinisr(FAR struct stm32_usbhost_s *priv, * received on the channel. */ - stm32_chan_halt(priv, chidx, CHREASON_TXERR); + stm32l4_chan_halt(priv, chidx, CHREASON_TXERR); /* Clear the Transaction ERror (TXERR) condition */ - stm32_putreg(STM32_OTGFS_HCINT(chidx), OTGFS_HCINT_TXERR); + stm32l4_putreg(STM32L4_OTGFS_HCINT(chidx), OTGFS_HCINT_TXERR); } /* Check for a pending NAK response received (NAK) interrupt */ @@ -2561,7 +2561,7 @@ static inline void stm32_gint_hcinisr(FAR struct stm32_usbhost_s *priv, { /* Halt the channel -- the CHH interrupt is expected next */ - stm32_chan_halt(priv, chidx, CHREASON_NAK); + stm32l4_chan_halt(priv, chidx, CHREASON_NAK); } /* Re-activate CTRL and BULK channels. @@ -2575,29 +2575,29 @@ static inline void stm32_gint_hcinisr(FAR struct stm32_usbhost_s *priv, * CHENA is set */ - regval = stm32_getreg(STM32_OTGFS_HCCHAR(chidx)); + regval = stm32l4_getreg(STM32L4_OTGFS_HCCHAR(chidx)); regval |= OTGFS_HCCHAR_CHENA; regval &= ~OTGFS_HCCHAR_CHDIS; - stm32_putreg(STM32_OTGFS_HCCHAR(chidx), regval); + stm32l4_putreg(STM32L4_OTGFS_HCCHAR(chidx), regval); } #else /* Halt all transfers on the NAK -- the CHH interrupt is expected next */ - stm32_chan_halt(priv, chidx, CHREASON_NAK); + stm32l4_chan_halt(priv, chidx, CHREASON_NAK); #endif /* Clear the NAK condition */ - stm32_putreg(STM32_OTGFS_HCINT(chidx), OTGFS_HCINT_NAK); + stm32l4_putreg(STM32L4_OTGFS_HCINT(chidx), OTGFS_HCINT_NAK); } /* Check for a transfer complete event */ - stm32_chan_wakeup(priv, chan); + stm32l4_chan_wakeup(priv, chan); } /**************************************************************************** - * Name: stm32_gint_hcoutisr + * Name: stm32l4_gint_hcoutisr * * Description: * USB OTG FS host OUT channels interrupt handler @@ -2615,10 +2615,10 @@ static inline void stm32_gint_hcinisr(FAR struct stm32_usbhost_s *priv, * ****************************************************************************/ -static inline void stm32_gint_hcoutisr(FAR struct stm32_usbhost_s *priv, +static inline void stm32l4_gint_hcoutisr(FAR struct stm32l4_usbhost_s *priv, int chidx) { - FAR struct stm32_chan_s *chan = &priv->chan[chidx]; + FAR struct stm32l4_chan_s *chan = &priv->chan[chidx]; uint32_t regval; uint32_t pending; @@ -2626,8 +2626,8 @@ static inline void stm32_gint_hcoutisr(FAR struct stm32_usbhost_s *priv, * HCINTMSK register to get the set of enabled HC interrupts. */ - pending = stm32_getreg(STM32_OTGFS_HCINT(chidx)); - regval = stm32_getreg(STM32_OTGFS_HCINTMSK(chidx)); + pending = stm32l4_getreg(STM32L4_OTGFS_HCINT(chidx)); + regval = stm32l4_getreg(STM32L4_OTGFS_HCINTMSK(chidx)); /* AND the two to get the set of enabled, pending HC interrupts */ @@ -2640,7 +2640,7 @@ static inline void stm32_gint_hcoutisr(FAR struct stm32_usbhost_s *priv, { /* Clear the pending the ACK response received/transmitted (ACK) interrupt */ - stm32_putreg(STM32_OTGFS_HCINT(chidx), OTGFS_HCINT_ACK); + stm32l4_putreg(STM32L4_OTGFS_HCINT(chidx), OTGFS_HCINT_ACK); } /* Check for a pending FRaMe OverRun (FRMOR) interrupt */ @@ -2649,11 +2649,11 @@ static inline void stm32_gint_hcoutisr(FAR struct stm32_usbhost_s *priv, { /* Halt the channel (probably not necessary for FRMOR) */ - stm32_chan_halt(priv, chidx, CHREASON_FRMOR); + stm32l4_chan_halt(priv, chidx, CHREASON_FRMOR); /* Clear the pending the FRaMe OverRun (FRMOR) interrupt */ - stm32_putreg(STM32_OTGFS_HCINT(chidx), OTGFS_HCINT_FRMOR); + stm32l4_putreg(STM32L4_OTGFS_HCINT(chidx), OTGFS_HCINT_FRMOR); } /* Check for a pending TransFeR Completed (XFRC) interrupt */ @@ -2670,11 +2670,11 @@ static inline void stm32_gint_hcoutisr(FAR struct stm32_usbhost_s *priv, /* Halt the channel -- the CHH interrupt is expected next */ - stm32_chan_halt(priv, chidx, CHREASON_XFRC); + stm32l4_chan_halt(priv, chidx, CHREASON_XFRC); /* Clear the pending the TransFeR Completed (XFRC) interrupt */ - stm32_putreg(STM32_OTGFS_HCINT(chidx), OTGFS_HCINT_XFRC); + stm32l4_putreg(STM32L4_OTGFS_HCINT(chidx), OTGFS_HCINT_XFRC); } /* Check for a pending STALL response receive (STALL) interrupt */ @@ -2683,13 +2683,13 @@ static inline void stm32_gint_hcoutisr(FAR struct stm32_usbhost_s *priv, { /* Clear the pending the STALL response receiv (STALL) interrupt */ - stm32_putreg(STM32_OTGFS_HCINT(chidx), OTGFS_HCINT_STALL); + stm32l4_putreg(STM32L4_OTGFS_HCINT(chidx), OTGFS_HCINT_STALL); /* Halt the channel when a STALL, TXERR, BBERR or DTERR interrupt is * received on the channel. */ - stm32_chan_halt(priv, chidx, CHREASON_STALL); + stm32l4_chan_halt(priv, chidx, CHREASON_STALL); } /* Check for a pending NAK response received (NAK) interrupt */ @@ -2698,11 +2698,11 @@ static inline void stm32_gint_hcoutisr(FAR struct stm32_usbhost_s *priv, { /* Halt the channel -- the CHH interrupt is expected next */ - stm32_chan_halt(priv, chidx, CHREASON_NAK); + stm32l4_chan_halt(priv, chidx, CHREASON_NAK); /* Clear the pending the NAK response received (NAK) interrupt */ - stm32_putreg(STM32_OTGFS_HCINT(chidx), OTGFS_HCINT_NAK); + stm32l4_putreg(STM32L4_OTGFS_HCINT(chidx), OTGFS_HCINT_NAK); } /* Check for a pending Transaction ERror (TXERR) interrupt */ @@ -2713,11 +2713,11 @@ static inline void stm32_gint_hcoutisr(FAR struct stm32_usbhost_s *priv, * received on the channel. */ - stm32_chan_halt(priv, chidx, CHREASON_TXERR); + stm32l4_chan_halt(priv, chidx, CHREASON_TXERR); /* Clear the pending the Transaction ERror (TXERR) interrupt */ - stm32_putreg(STM32_OTGFS_HCINT(chidx), OTGFS_HCINT_TXERR); + stm32l4_putreg(STM32L4_OTGFS_HCINT(chidx), OTGFS_HCINT_TXERR); } /* Check for a NYET interrupt */ @@ -2727,11 +2727,11 @@ static inline void stm32_gint_hcoutisr(FAR struct stm32_usbhost_s *priv, { /* Halt the channel */ - stm32_chan_halt(priv, chidx, CHREASON_NYET); + stm32l4_chan_halt(priv, chidx, CHREASON_NYET); /* Clear the pending the NYET interrupt */ - stm32_putreg(STM32_OTGFS_HCINT(chidx), OTGFS_HCINT_NYET); + stm32l4_putreg(STM32L4_OTGFS_HCINT(chidx), OTGFS_HCINT_NYET); } #endif @@ -2743,11 +2743,11 @@ static inline void stm32_gint_hcoutisr(FAR struct stm32_usbhost_s *priv, * received on the channel. */ - stm32_chan_halt(priv, chidx, CHREASON_DTERR); + stm32l4_chan_halt(priv, chidx, CHREASON_DTERR); /* Clear the pending the Data Toggle ERRor (DTERR) and NAK interrupts */ - stm32_putreg(STM32_OTGFS_HCINT(chidx), (OTGFS_HCINT_DTERR | OTGFS_HCINT_NAK)); + stm32l4_putreg(STM32L4_OTGFS_HCINT(chidx), (OTGFS_HCINT_DTERR | OTGFS_HCINT_NAK)); } /* Check for a pending CHannel Halted (CHH) interrupt */ @@ -2756,9 +2756,9 @@ static inline void stm32_gint_hcoutisr(FAR struct stm32_usbhost_s *priv, { /* Mask the CHannel Halted (CHH) interrupt */ - regval = stm32_getreg(STM32_OTGFS_HCINTMSK(chidx)); + regval = stm32l4_getreg(STM32L4_OTGFS_HCINTMSK(chidx)); regval &= ~OTGFS_HCINT_CHH; - stm32_putreg(STM32_OTGFS_HCINTMSK(chidx), regval); + stm32l4_putreg(STM32L4_OTGFS_HCINTMSK(chidx), regval); if (chan->chreason == CHREASON_XFRC) { @@ -2770,7 +2770,7 @@ static inline void stm32_gint_hcoutisr(FAR struct stm32_usbhost_s *priv, * the endpoint type. */ - regval = stm32_getreg(STM32_OTGFS_HCCHAR(chidx)); + regval = stm32l4_getreg(STM32L4_OTGFS_HCCHAR(chidx)); /* Is it a bulk endpoint? Were an odd number of packets * transferred? @@ -2813,23 +2813,23 @@ static inline void stm32_gint_hcoutisr(FAR struct stm32_usbhost_s *priv, /* Clear the pending the CHannel Halted (CHH) interrupt */ - stm32_putreg(STM32_OTGFS_HCINT(chidx), OTGFS_HCINT_CHH); + stm32l4_putreg(STM32L4_OTGFS_HCINT(chidx), OTGFS_HCINT_CHH); } /* Check for a transfer complete event */ - stm32_chan_wakeup(priv, chan); + stm32l4_chan_wakeup(priv, chan); } /**************************************************************************** - * Name: stm32_gint_connected + * Name: stm32l4_gint_connected * * Description: * Handle a connection event. * ****************************************************************************/ -static void stm32_gint_connected(FAR struct stm32_usbhost_s *priv) +static void stm32l4_gint_connected(FAR struct stm32l4_usbhost_s *priv) { /* We we previously disconnected? */ @@ -2847,21 +2847,21 @@ static void stm32_gint_connected(FAR struct stm32_usbhost_s *priv) priv->smstate = SMSTATE_ATTACHED; if (priv->pscwait) { - stm32_givesem(&priv->pscsem); + stm32l4_givesem(&priv->pscsem); priv->pscwait = false; } } } /**************************************************************************** - * Name: stm32_gint_disconnected + * Name: stm32l4_gint_disconnected * * Description: * Handle a disconnection event. * ****************************************************************************/ -static void stm32_gint_disconnected(FAR struct stm32_usbhost_s *priv) +static void stm32l4_gint_disconnected(FAR struct stm32l4_usbhost_s *priv) { /* Were we previously connected? */ @@ -2886,7 +2886,7 @@ static void stm32_gint_disconnected(FAR struct stm32_usbhost_s *priv) priv->smstate = SMSTATE_DETACHED; priv->connected = false; priv->change = true; - stm32_chan_freeall(priv); + stm32l4_chan_freeall(priv); priv->rhport.hport.speed = USB_SPEED_FULL; @@ -2894,41 +2894,41 @@ static void stm32_gint_disconnected(FAR struct stm32_usbhost_s *priv) if (priv->pscwait) { - stm32_givesem(&priv->pscsem); + stm32l4_givesem(&priv->pscsem); priv->pscwait = false; } } } /**************************************************************************** - * Name: stm32_gint_sofisr + * Name: stm32l4_gint_sofisr * * Description: * USB OTG FS start-of-frame interrupt handler * ****************************************************************************/ -#ifdef CONFIG_STM32_OTGFS_SOFINTR -static inline void stm32_gint_sofisr(FAR struct stm32_usbhost_s *priv) +#ifdef CONFIG_STM32L4_OTGFS_SOFINTR +static inline void stm32l4_gint_sofisr(FAR struct stm32l4_usbhost_s *priv) { /* Handle SOF interrupt */ #warning "Do what?" /* Clear pending SOF interrupt */ - stm32_putreg(STM32_OTGFS_GINTSTS, OTGFS_GINT_SOF); + stm32l4_putreg(STM32L4_OTGFS_GINTSTS, OTGFS_GINT_SOF); } #endif /**************************************************************************** - * Name: stm32_gint_rxflvlisr + * Name: stm32l4_gint_rxflvlisr * * Description: * USB OTG FS RxFIFO non-empty interrupt handler * ****************************************************************************/ -static inline void stm32_gint_rxflvlisr(FAR struct stm32_usbhost_s *priv) +static inline void stm32l4_gint_rxflvlisr(FAR struct stm32l4_usbhost_s *priv) { FAR uint32_t *dest; uint32_t grxsts; @@ -2943,13 +2943,13 @@ static inline void stm32_gint_rxflvlisr(FAR struct stm32_usbhost_s *priv) /* Disable the RxFIFO non-empty interrupt */ - intmsk = stm32_getreg(STM32_OTGFS_GINTMSK); + intmsk = stm32l4_getreg(STM32L4_OTGFS_GINTMSK); intmsk &= ~OTGFS_GINT_RXFLVL; - stm32_putreg(STM32_OTGFS_GINTMSK, intmsk); + stm32l4_putreg(STM32L4_OTGFS_GINTMSK, intmsk); /* Read and pop the next status from the Rx FIFO */ - grxsts = stm32_getreg(STM32_OTGFS_GRXSTSP); + grxsts = stm32l4_getreg(STM32L4_OTGFS_GRXSTSP); uinfo("GRXSTS: %08x\n", grxsts); /* Isolate the channel number/index in the status word */ @@ -2958,7 +2958,7 @@ static inline void stm32_gint_rxflvlisr(FAR struct stm32_usbhost_s *priv) /* Get the host channel characteristics register (HCCHAR) for this channel */ - hcchar = stm32_getreg(STM32_OTGFS_HCCHAR(chidx)); + hcchar = stm32l4_getreg(STM32L4_OTGFS_HCCHAR(chidx)); /* Then process the interrupt according to the packet status */ @@ -2974,15 +2974,15 @@ static inline void stm32_gint_rxflvlisr(FAR struct stm32_usbhost_s *priv) /* Transfer the packet from the Rx FIFO into the user buffer */ dest = (FAR uint32_t *)priv->chan[chidx].buffer; - fifo = STM32_OTGFS_DFIFO_HCH(0); + fifo = STM32L4_OTGFS_DFIFO_HCH(0); bcnt32 = (bcnt + 3) >> 2; for (i = 0; i < bcnt32; i++) { - *dest++ = stm32_getreg(fifo); + *dest++ = stm32l4_getreg(fifo); } - stm32_pktdump("Received", priv->chan[chidx].buffer, bcnt); + stm32l4_pktdump("Received", priv->chan[chidx].buffer, bcnt); /* Toggle the IN data pid (Used by Bulk and INTR only) */ @@ -2995,14 +2995,14 @@ static inline void stm32_gint_rxflvlisr(FAR struct stm32_usbhost_s *priv) /* Check if more packets are expected */ - hctsiz = stm32_getreg(STM32_OTGFS_HCTSIZ(chidx)); + hctsiz = stm32l4_getreg(STM32L4_OTGFS_HCTSIZ(chidx)); if ((hctsiz & OTGFS_HCTSIZ_PKTCNT_MASK) != 0) { /* Re-activate the channel when more packets are expected */ hcchar |= OTGFS_HCCHAR_CHENA; hcchar &= ~OTGFS_HCCHAR_CHDIS; - stm32_putreg(STM32_OTGFS_HCCHAR(chidx), hcchar); + stm32l4_putreg(STM32L4_OTGFS_HCCHAR(chidx), hcchar); } } } @@ -3018,20 +3018,20 @@ static inline void stm32_gint_rxflvlisr(FAR struct stm32_usbhost_s *priv) /* Re-enable the RxFIFO non-empty interrupt */ intmsk |= OTGFS_GINT_RXFLVL; - stm32_putreg(STM32_OTGFS_GINTMSK, intmsk); + stm32l4_putreg(STM32L4_OTGFS_GINTMSK, intmsk); } /**************************************************************************** - * Name: stm32_gint_nptxfeisr + * Name: stm32l4_gint_nptxfeisr * * Description: * USB OTG FS non-periodic TxFIFO empty interrupt handler * ****************************************************************************/ -static inline void stm32_gint_nptxfeisr(FAR struct stm32_usbhost_s *priv) +static inline void stm32l4_gint_nptxfeisr(FAR struct stm32l4_usbhost_s *priv) { - FAR struct stm32_chan_s *chan; + FAR struct stm32l4_chan_s *chan; uint32_t regval; unsigned int wrsize; unsigned int avail; @@ -3061,13 +3061,13 @@ static inline void stm32_gint_nptxfeisr(FAR struct stm32_usbhost_s *priv) { /* Disable further Tx FIFO empty interrupts and bail. */ - stm32_modifyreg(STM32_OTGFS_GINTMSK, OTGFS_GINT_NPTXFE, 0); + stm32l4_modifyreg(STM32L4_OTGFS_GINTMSK, OTGFS_GINT_NPTXFE, 0); return; } /* Read the status from the top of the non-periodic TxFIFO */ - regval = stm32_getreg(STM32_OTGFS_HNPTXSTS); + regval = stm32l4_getreg(STM32L4_OTGFS_HNPTXSTS); /* Extract the number of bytes available in the non-periodic Tx FIFO. */ @@ -3098,7 +3098,7 @@ static inline void stm32_gint_nptxfeisr(FAR struct stm32_usbhost_s *priv) else { - stm32_modifyreg(STM32_OTGFS_GINTMSK, OTGFS_GINT_NPTXFE, 0); + stm32l4_modifyreg(STM32L4_OTGFS_GINTMSK, OTGFS_GINT_NPTXFE, 0); } /* Write the next group of packets into the Tx FIFO */ @@ -3106,20 +3106,20 @@ static inline void stm32_gint_nptxfeisr(FAR struct stm32_usbhost_s *priv) uinfo("HNPTXSTS: %08x chidx: %d avail: %d buflen: %d xfrd: %d wrsize: %d\n", regval, chidx, avail, chan->buflen, chan->xfrd, wrsize); - stm32_gint_wrpacket(priv, chan->buffer, chidx, wrsize); + stm32l4_gint_wrpacket(priv, chan->buffer, chidx, wrsize); } /**************************************************************************** - * Name: stm32_gint_ptxfeisr + * Name: stm32l4_gint_ptxfeisr * * Description: * USB OTG FS periodic TxFIFO empty interrupt handler * ****************************************************************************/ -static inline void stm32_gint_ptxfeisr(FAR struct stm32_usbhost_s *priv) +static inline void stm32l4_gint_ptxfeisr(FAR struct stm32l4_usbhost_s *priv) { - FAR struct stm32_chan_s *chan; + FAR struct stm32l4_chan_s *chan; uint32_t regval; unsigned int wrsize; unsigned int avail; @@ -3149,13 +3149,13 @@ static inline void stm32_gint_ptxfeisr(FAR struct stm32_usbhost_s *priv) { /* Disable further Tx FIFO empty interrupts and bail. */ - stm32_modifyreg(STM32_OTGFS_GINTMSK, OTGFS_GINT_PTXFE, 0); + stm32l4_modifyreg(STM32L4_OTGFS_GINTMSK, OTGFS_GINT_PTXFE, 0); return; } /* Read the status from the top of the periodic TxFIFO */ - regval = stm32_getreg(STM32_OTGFS_HPTXSTS); + regval = stm32l4_getreg(STM32L4_OTGFS_HPTXSTS); /* Extract the number of bytes available in the periodic Tx FIFO. */ @@ -3186,7 +3186,7 @@ static inline void stm32_gint_ptxfeisr(FAR struct stm32_usbhost_s *priv) else { - stm32_modifyreg(STM32_OTGFS_GINTMSK, OTGFS_GINT_PTXFE, 0); + stm32l4_modifyreg(STM32L4_OTGFS_GINTMSK, OTGFS_GINT_PTXFE, 0); } /* Write the next group of packets into the Tx FIFO */ @@ -3194,30 +3194,30 @@ static inline void stm32_gint_ptxfeisr(FAR struct stm32_usbhost_s *priv) uinfo("HPTXSTS: %08x chidx: %d avail: %d buflen: %d xfrd: %d wrsize: %d\n", regval, chidx, avail, chan->buflen, chan->xfrd, wrsize); - stm32_gint_wrpacket(priv, chan->buffer, chidx, wrsize); + stm32l4_gint_wrpacket(priv, chan->buffer, chidx, wrsize); } /**************************************************************************** - * Name: stm32_gint_hcisr + * Name: stm32l4_gint_hcisr * * Description: * USB OTG FS host channels interrupt handler * ****************************************************************************/ -static inline void stm32_gint_hcisr(FAR struct stm32_usbhost_s *priv) +static inline void stm32l4_gint_hcisr(FAR struct stm32l4_usbhost_s *priv) { uint32_t haint; uint32_t hcchar; int i = 0; /* Read the Host all channels interrupt register and test each bit in the - * register. Each bit i, i=0...(STM32_NHOST_CHANNELS-1), corresponds to + * register. Each bit i, i=0...(STM32L4_NHOST_CHANNELS-1), corresponds to * a pending interrupt on channel i. */ - haint = stm32_getreg(STM32_OTGFS_HAINT); - for (i = 0; i < STM32_NHOST_CHANNELS; i++) + haint = stm32l4_getreg(STM32L4_OTGFS_HAINT); + for (i = 0; i < STM32L4_NHOST_CHANNELS; i++) { /* Is an interrupt pending on this channel? */ @@ -3225,7 +3225,7 @@ static inline void stm32_gint_hcisr(FAR struct stm32_usbhost_s *priv) { /* Yes... read the HCCHAR register to get the direction bit */ - hcchar = stm32_getreg(STM32_OTGFS_HCCHAR(i)); + hcchar = stm32l4_getreg(STM32L4_OTGFS_HCCHAR(i)); /* Was this an interrupt on an IN or an OUT channel? */ @@ -3233,27 +3233,27 @@ static inline void stm32_gint_hcisr(FAR struct stm32_usbhost_s *priv) { /* Handle the HC IN channel interrupt */ - stm32_gint_hcinisr(priv, i); + stm32l4_gint_hcinisr(priv, i); } else { /* Handle the HC OUT channel interrupt */ - stm32_gint_hcoutisr(priv, i); + stm32l4_gint_hcoutisr(priv, i); } } } } /**************************************************************************** - * Name: stm32_gint_hprtisr + * Name: stm32l4_gint_hprtisr * * Description: * USB OTG FS host port interrupt handler * ****************************************************************************/ -static inline void stm32_gint_hprtisr(FAR struct stm32_usbhost_s *priv) +static inline void stm32l4_gint_hprtisr(FAR struct stm32l4_usbhost_s *priv) { uint32_t hprt; uint32_t newhprt; @@ -3262,7 +3262,7 @@ static inline void stm32_gint_hprtisr(FAR struct stm32_usbhost_s *priv) usbhost_vtrace1(OTGFS_VTRACE1_GINT_HPRT, 0); /* Read the port status and control register (HPRT) */ - hprt = stm32_getreg(STM32_OTGFS_HPRT); + hprt = stm32l4_getreg(STM32L4_OTGFS_HPRT); /* Setup to clear the interrupt bits in GINTSTS by setting the corresponding * bits in the HPRT. The HCINT interrupt bit is cleared when the appropriate @@ -3294,8 +3294,8 @@ static inline void stm32_gint_hprtisr(FAR struct stm32_usbhost_s *priv) usbhost_vtrace1(OTGFS_VTRACE1_GINT_HPRT_PCDET, 0); newhprt |= OTGFS_HPRT_PCDET; - stm32_portreset(priv); - stm32_gint_connected(priv); + stm32l4_portreset(priv); + stm32l4_gint_connected(priv); } /* Check for Port Enable CHaNGed (PENCHNG) */ @@ -3313,11 +3313,11 @@ static inline void stm32_gint_hprtisr(FAR struct stm32_usbhost_s *priv) { /* Yes.. handle the new connection event */ - stm32_gint_connected(priv); + stm32l4_gint_connected(priv); /* Check the Host ConFiGuration register (HCFG) */ - hcfg = stm32_getreg(STM32_OTGFS_HCFG); + hcfg = stm32l4_getreg(STM32L4_OTGFS_HCFG); /* Is this a low speed or full speed connection (OTG FS does not * support high speed) @@ -3328,7 +3328,7 @@ static inline void stm32_gint_hprtisr(FAR struct stm32_usbhost_s *priv) /* Set the Host Frame Interval Register for the 6KHz speed */ usbhost_vtrace1(OTGFS_VTRACE1_GINT_HPRT_LSDEV, 0); - stm32_putreg(STM32_OTGFS_HFIR, 6000); + stm32l4_putreg(STM32L4_OTGFS_HFIR, 6000); /* Are we switching from FS to LS? */ @@ -3340,18 +3340,18 @@ static inline void stm32_gint_hprtisr(FAR struct stm32_usbhost_s *priv) hcfg &= ~OTGFS_HCFG_FSLSPCS_MASK; hcfg |= OTGFS_HCFG_FSLSPCS_LS6MHz; - stm32_putreg(STM32_OTGFS_HCFG, hcfg); + stm32l4_putreg(STM32L4_OTGFS_HCFG, hcfg); /* And reset the port */ - stm32_portreset(priv); + stm32l4_portreset(priv); } } else /* if ((hprt & OTGFS_HPRT_PSPD_MASK) == OTGFS_HPRT_PSPD_FS) */ { usbhost_vtrace1(OTGFS_VTRACE1_GINT_HPRT_FSDEV, 0); - stm32_putreg(STM32_OTGFS_HFIR, 48000); + stm32l4_putreg(STM32L4_OTGFS_HFIR, 48000); /* Are we switching from LS to FS? */ @@ -3363,11 +3363,11 @@ static inline void stm32_gint_hprtisr(FAR struct stm32_usbhost_s *priv) hcfg &= ~OTGFS_HCFG_FSLSPCS_MASK; hcfg |= OTGFS_HCFG_FSLSPCS_FS48MHz; - stm32_putreg(STM32_OTGFS_HCFG, hcfg); + stm32l4_putreg(STM32L4_OTGFS_HCFG, hcfg); /* And reset the port */ - stm32_portreset(priv); + stm32l4_portreset(priv); } } } @@ -3375,37 +3375,37 @@ static inline void stm32_gint_hprtisr(FAR struct stm32_usbhost_s *priv) /* Clear port interrupts by setting bits in the HPRT */ - stm32_putreg(STM32_OTGFS_HPRT, newhprt); + stm32l4_putreg(STM32L4_OTGFS_HPRT, newhprt); } /**************************************************************************** - * Name: stm32_gint_discisr + * Name: stm32l4_gint_discisr * * Description: * USB OTG FS disconnect detected interrupt handler * ****************************************************************************/ -static inline void stm32_gint_discisr(FAR struct stm32_usbhost_s *priv) +static inline void stm32l4_gint_discisr(FAR struct stm32l4_usbhost_s *priv) { /* Handle the disconnection event */ - stm32_gint_disconnected(priv); + stm32l4_gint_disconnected(priv); /* Clear the dicsonnect interrupt */ - stm32_putreg(STM32_OTGFS_GINTSTS, OTGFS_GINT_DISC); + stm32l4_putreg(STM32L4_OTGFS_GINTSTS, OTGFS_GINT_DISC); } /**************************************************************************** - * Name: stm32_gint_ipxfrisr + * Name: stm32l4_gint_ipxfrisr * * Description: * USB OTG FS incomplete periodic interrupt handler * ****************************************************************************/ -static inline void stm32_gint_ipxfrisr(FAR struct stm32_usbhost_s *priv) +static inline void stm32l4_gint_ipxfrisr(FAR struct stm32l4_usbhost_s *priv) { uint32_t regval; @@ -3413,24 +3413,24 @@ static inline void stm32_gint_ipxfrisr(FAR struct stm32_usbhost_s *priv) * CHDIS : Set to stop transmitting/receiving data on a channel */ - regval = stm32_getreg(STM32_OTGFS_HCCHAR(0)); + regval = stm32l4_getreg(STM32L4_OTGFS_HCCHAR(0)); regval |= (OTGFS_HCCHAR_CHDIS | OTGFS_HCCHAR_CHENA); - stm32_putreg(STM32_OTGFS_HCCHAR(0), regval); + stm32l4_putreg(STM32L4_OTGFS_HCCHAR(0), regval); /* Clear the incomplete isochronous OUT interrupt */ - stm32_putreg(STM32_OTGFS_GINTSTS, OTGFS_GINT_IPXFR); + stm32l4_putreg(STM32L4_OTGFS_GINTSTS, OTGFS_GINT_IPXFR); } /**************************************************************************** - * Name: stm32_gint_isr + * Name: stm32l4_gint_isr * * Description: * USB OTG FS global interrupt handler * ****************************************************************************/ -static int stm32_gint_isr(int irq, FAR void *context) +static int stm32l4_gint_isr(int irq, FAR void *context) { /* At present, there is only support for a single OTG FS host. Hence it is * pre-allocated as g_usbhost. However, in most code, the private data @@ -3438,7 +3438,7 @@ static int stm32_gint_isr(int irq, FAR void *context) * global data) in order to simplify any future support for multiple devices. */ - FAR struct stm32_usbhost_s *priv = &g_usbhost; + FAR struct stm32l4_usbhost_s *priv = &g_usbhost; uint32_t pending; /* If OTG were supported, we would need to check if we are in host or @@ -3454,8 +3454,8 @@ static int stm32_gint_isr(int irq, FAR void *context) { /* Get the unmasked bits in the GINT status */ - pending = stm32_getreg(STM32_OTGFS_GINTSTS); - pending &= stm32_getreg(STM32_OTGFS_GINTMSK); + pending = stm32l4_getreg(STM32L4_OTGFS_GINTSTS); + pending &= stm32l4_getreg(STM32L4_OTGFS_GINTMSK); /* Return from the interrupt when there are no further pending * interrupts. @@ -3470,11 +3470,11 @@ static int stm32_gint_isr(int irq, FAR void *context) /* Handle the start of frame interrupt */ -#ifdef CONFIG_STM32_OTGFS_SOFINTR +#ifdef CONFIG_STM32L4_OTGFS_SOFINTR if ((pending & OTGFS_GINT_SOF) != 0) { usbhost_vtrace1(OTGFS_VTRACE1_GINT_SOF, 0); - stm32_gint_sofisr(priv); + stm32l4_gint_sofisr(priv); } #endif @@ -3483,7 +3483,7 @@ static int stm32_gint_isr(int irq, FAR void *context) if ((pending & OTGFS_GINT_RXFLVL) != 0) { usbhost_vtrace1(OTGFS_VTRACE1_GINT_RXFLVL, 0); - stm32_gint_rxflvlisr(priv); + stm32l4_gint_rxflvlisr(priv); } /* Handle the non-periodic TxFIFO empty interrupt */ @@ -3491,7 +3491,7 @@ static int stm32_gint_isr(int irq, FAR void *context) if ((pending & OTGFS_GINT_NPTXFE) != 0) { usbhost_vtrace1(OTGFS_VTRACE1_GINT_NPTXFE, 0); - stm32_gint_nptxfeisr(priv); + stm32l4_gint_nptxfeisr(priv); } /* Handle the periodic TxFIFO empty interrupt */ @@ -3499,7 +3499,7 @@ static int stm32_gint_isr(int irq, FAR void *context) if ((pending & OTGFS_GINT_PTXFE) != 0) { usbhost_vtrace1(OTGFS_VTRACE1_GINT_PTXFE, 0); - stm32_gint_ptxfeisr(priv); + stm32l4_gint_ptxfeisr(priv); } /* Handle the host channels interrupt */ @@ -3507,14 +3507,14 @@ static int stm32_gint_isr(int irq, FAR void *context) if ((pending & OTGFS_GINT_HC) != 0) { usbhost_vtrace1(OTGFS_VTRACE1_GINT_HC, 0); - stm32_gint_hcisr(priv); + stm32l4_gint_hcisr(priv); } /* Handle the host port interrupt */ if ((pending & OTGFS_GINT_HPRT) != 0) { - stm32_gint_hprtisr(priv); + stm32l4_gint_hprtisr(priv); } /* Handle the disconnect detected interrupt */ @@ -3522,7 +3522,7 @@ static int stm32_gint_isr(int irq, FAR void *context) if ((pending & OTGFS_GINT_DISC) != 0) { usbhost_vtrace1(OTGFS_VTRACE1_GINT_DISC, 0); - stm32_gint_discisr(priv); + stm32l4_gint_discisr(priv); } /* Handle the incomplete periodic transfer */ @@ -3530,7 +3530,7 @@ static int stm32_gint_isr(int irq, FAR void *context) if ((pending & OTGFS_GINT_IPXFR) != 0) { usbhost_vtrace1(OTGFS_VTRACE1_GINT_IPXFR, 0); - stm32_gint_ipxfrisr(priv); + stm32l4_gint_ipxfrisr(priv); } } @@ -3540,7 +3540,7 @@ static int stm32_gint_isr(int irq, FAR void *context) } /**************************************************************************** - * Name: stm32_gint_enable and stm32_gint_disable + * Name: stm32l4_gint_enable and stm32l4_gint_disable * * Description: * Respectively enable or disable the global OTG FS interrupt. @@ -3553,30 +3553,30 @@ static int stm32_gint_isr(int irq, FAR void *context) * ****************************************************************************/ -static void stm32_gint_enable(void) +static void stm32l4_gint_enable(void) { uint32_t regval; /* Set the GINTMSK bit to unmask the interrupt */ - regval = stm32_getreg(STM32_OTGFS_GAHBCFG); + regval = stm32l4_getreg(STM32L4_OTGFS_GAHBCFG); regval |= OTGFS_GAHBCFG_GINTMSK; - stm32_putreg(STM32_OTGFS_GAHBCFG, regval); + stm32l4_putreg(STM32L4_OTGFS_GAHBCFG, regval); } -static void stm32_gint_disable(void) +static void stm32l4_gint_disable(void) { uint32_t regval; /* Clear the GINTMSK bit to mask the interrupt */ - regval = stm32_getreg(STM32_OTGFS_GAHBCFG); + regval = stm32l4_getreg(STM32L4_OTGFS_GAHBCFG); regval &= ~OTGFS_GAHBCFG_GINTMSK; - stm32_putreg(STM32_OTGFS_GAHBCFG, regval); + stm32l4_putreg(STM32L4_OTGFS_GAHBCFG, regval); } /**************************************************************************** - * Name: stm32_hostinit_enable + * Name: stm32l4_hostinit_enable * * Description: * Enable host interrupts. @@ -3589,25 +3589,25 @@ static void stm32_gint_disable(void) * ****************************************************************************/ -static inline void stm32_hostinit_enable(void) +static inline void stm32l4_hostinit_enable(void) { uint32_t regval; /* Disable all interrupts. */ - stm32_putreg(STM32_OTGFS_GINTMSK, 0); + stm32l4_putreg(STM32L4_OTGFS_GINTMSK, 0); /* Clear any pending interrupts. */ - stm32_putreg(STM32_OTGFS_GINTSTS, 0xffffffff); + stm32l4_putreg(STM32L4_OTGFS_GINTSTS, 0xffffffff); /* Clear any pending USB OTG Interrupts (should be done elsewhere if OTG is supported) */ - stm32_putreg(STM32_OTGFS_GOTGINT, 0xffffffff); + stm32l4_putreg(STM32L4_OTGFS_GOTGINT, 0xffffffff); /* Clear any pending USB OTG interrupts */ - stm32_putreg(STM32_OTGFS_GINTSTS, 0xbfffffff); + stm32l4_putreg(STM32L4_OTGFS_GINTSTS, 0xbfffffff); /* Enable the host interrupts */ /* Common interrupts: @@ -3635,18 +3635,18 @@ static inline void stm32_hostinit_enable(void) * OTGFS_GINT_DISC : Disconnect detected interrupt */ -#ifdef CONFIG_STM32_OTGFS_SOFINTR +#ifdef CONFIG_STM32L4_OTGFS_SOFINTR regval |= (OTGFS_GINT_SOF | OTGFS_GINT_RXFLVL | OTGFS_GINT_IISOOXFR | OTGFS_GINT_HPRT | OTGFS_GINT_HC | OTGFS_GINT_DISC); #else regval |= (OTGFS_GINT_RXFLVL | OTGFS_GINT_IPXFR | OTGFS_GINT_HPRT | OTGFS_GINT_HC | OTGFS_GINT_DISC); #endif - stm32_putreg(STM32_OTGFS_GINTMSK, regval); + stm32l4_putreg(STM32L4_OTGFS_GINTMSK, regval); } /**************************************************************************** - * Name: stm32_txfe_enable + * Name: stm32l4_txfe_enable * * Description: * Enable Tx FIFO empty interrupts. This is necessary when the entire @@ -3667,9 +3667,9 @@ static inline void stm32_hostinit_enable(void) * ****************************************************************************/ -static void stm32_txfe_enable(FAR struct stm32_usbhost_s *priv, int chidx) +static void stm32l4_txfe_enable(FAR struct stm32l4_usbhost_s *priv, int chidx) { - FAR struct stm32_chan_s *chan = &priv->chan[chidx]; + FAR struct stm32l4_chan_s *chan = &priv->chan[chidx]; irqstate_t flags; uint32_t regval; @@ -3681,7 +3681,7 @@ static void stm32_txfe_enable(FAR struct stm32_usbhost_s *priv, int chidx) /* Should we enable the periodic or non-peridic Tx FIFO empty interrupts */ - regval = stm32_getreg(STM32_OTGFS_GINTMSK); + regval = stm32l4_getreg(STM32L4_OTGFS_GINTMSK); switch (chan->eptype) { default: @@ -3698,7 +3698,7 @@ static void stm32_txfe_enable(FAR struct stm32_usbhost_s *priv, int chidx) /* Enable interrupts */ - stm32_putreg(STM32_OTGFS_GINTMSK, regval); + stm32l4_putreg(STM32L4_OTGFS_GINTMSK, regval); leave_critical_section(flags); } @@ -3707,7 +3707,7 @@ static void stm32_txfe_enable(FAR struct stm32_usbhost_s *priv, int chidx) ****************************************************************************/ /**************************************************************************** - * Name: stm32_wait + * Name: stm32l4_wait * * Description: * Wait for a device to be connected or disconnected to/from a hub port. @@ -3731,10 +3731,10 @@ static void stm32_txfe_enable(FAR struct stm32_usbhost_s *priv, int chidx) * ****************************************************************************/ -static int stm32_wait(FAR struct usbhost_connection_s *conn, +static int stm32l4_wait(FAR struct usbhost_connection_s *conn, FAR struct usbhost_hubport_s **hport) { - FAR struct stm32_usbhost_s *priv = &g_usbhost; + FAR struct stm32l4_usbhost_s *priv = &g_usbhost; struct usbhost_hubport_s *connport; irqstate_t flags; @@ -3786,12 +3786,12 @@ static int stm32_wait(FAR struct usbhost_connection_s *conn, /* Wait for the next connection event */ priv->pscwait = true; - stm32_takesem(&priv->pscsem); + stm32l4_takesem(&priv->pscsem); } } /**************************************************************************** - * Name: stm32_enumerate + * Name: stm32l4_enumerate * * Description: * Enumerate the connected device. As part of this enumeration process, @@ -3818,7 +3818,7 @@ static int stm32_wait(FAR struct usbhost_connection_s *conn, * ****************************************************************************/ -static int stm32_rh_enumerate(FAR struct stm32_usbhost_s *priv, +static int stm32l4_rh_enumerate(FAR struct stm32l4_usbhost_s *priv, FAR struct usbhost_connection_s *conn, FAR struct usbhost_hubport_s *hport) { @@ -3847,11 +3847,11 @@ static int stm32_rh_enumerate(FAR struct stm32_usbhost_s *priv, /* Reset the host port */ - stm32_portreset(priv); + stm32l4_portreset(priv); /* Get the current device speed */ - regval = stm32_getreg(STM32_OTGFS_HPRT); + regval = stm32l4_getreg(STM32L4_OTGFS_HPRT); if ((regval & OTGFS_HPRT_PSPD_MASK) == OTGFS_HPRT_PSPD_LS) { priv->rhport.hport.speed = USB_SPEED_LOW; @@ -3863,7 +3863,7 @@ static int stm32_rh_enumerate(FAR struct stm32_usbhost_s *priv, /* Allocate and initialize the root hub port EP0 channels */ - ret = stm32_ctrlchan_alloc(priv, 0, 0, priv->rhport.hport.speed, &priv->ep0); + ret = stm32l4_ctrlchan_alloc(priv, 0, 0, priv->rhport.hport.speed, &priv->ep0); if (ret < 0) { uerr("ERROR: Failed to allocate a control endpoint: %d\n", ret); @@ -3872,10 +3872,10 @@ static int stm32_rh_enumerate(FAR struct stm32_usbhost_s *priv, return ret; } -static int stm32_enumerate(FAR struct usbhost_connection_s *conn, +static int stm32l4_enumerate(FAR struct usbhost_connection_s *conn, FAR struct usbhost_hubport_s *hport) { - FAR struct stm32_usbhost_s *priv = &g_usbhost; + FAR struct stm32l4_usbhost_s *priv = &g_usbhost; int ret; DEBUGASSERT(hport); @@ -3889,7 +3889,7 @@ static int stm32_enumerate(FAR struct usbhost_connection_s *conn, if (ROOTHUB(hport)) #endif { - ret = stm32_rh_enumerate(priv, conn, hport); + ret = stm32l4_rh_enumerate(priv, conn, hport); if (ret < 0) { return ret; @@ -3913,14 +3913,14 @@ static int stm32_enumerate(FAR struct usbhost_connection_s *conn, /* Return to the disconnected state */ uerr("ERROR: Enumeration failed: %d\n", ret); - stm32_gint_disconnected(priv); + stm32l4_gint_disconnected(priv); } return ret; } /************************************************************************************ - * Name: stm32_ep0configure + * Name: stm32l4_ep0configure * * Description: * Configure endpoint 0. This method is normally used internally by the @@ -3946,20 +3946,20 @@ static int stm32_enumerate(FAR struct usbhost_connection_s *conn, * ************************************************************************************/ -static int stm32_ep0configure(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0, +static int stm32l4_ep0configure(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0, uint8_t funcaddr, uint8_t speed, uint16_t maxpacketsize) { - FAR struct stm32_usbhost_s *priv = (FAR struct stm32_usbhost_s *)drvr; - FAR struct stm32_ctrlinfo_s *ep0info = (FAR struct stm32_ctrlinfo_s *)ep0; - FAR struct stm32_chan_s *chan; + FAR struct stm32l4_usbhost_s *priv = (FAR struct stm32l4_usbhost_s *)drvr; + FAR struct stm32l4_ctrlinfo_s *ep0info = (FAR struct stm32l4_ctrlinfo_s *)ep0; + FAR struct stm32l4_chan_s *chan; DEBUGASSERT(drvr != NULL && ep0info != NULL && funcaddr < 128 && maxpacketsize <= 64); /* We must have exclusive access to the USB host hardware and state structures */ - stm32_takesem(&priv->exclsem); + stm32l4_takesem(&priv->exclsem); /* Configure the EP0 OUT channel */ @@ -3968,7 +3968,7 @@ static int stm32_ep0configure(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep chan->speed = speed; chan->maxpacket = maxpacketsize; - stm32_chan_configure(priv, ep0info->outndx); + stm32l4_chan_configure(priv, ep0info->outndx); /* Configure the EP0 IN channel */ @@ -3977,14 +3977,14 @@ static int stm32_ep0configure(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep chan->speed = speed; chan->maxpacket = maxpacketsize; - stm32_chan_configure(priv, ep0info->inndx); + stm32l4_chan_configure(priv, ep0info->inndx); - stm32_givesem(&priv->exclsem); + stm32l4_givesem(&priv->exclsem); return OK; } /************************************************************************************ - * Name: stm32_epalloc + * Name: stm32l4_epalloc * * Description: * Allocate and configure one endpoint. @@ -4005,11 +4005,11 @@ static int stm32_ep0configure(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep * ************************************************************************************/ -static int stm32_epalloc(FAR struct usbhost_driver_s *drvr, +static int stm32l4_epalloc(FAR struct usbhost_driver_s *drvr, FAR const struct usbhost_epdesc_s *epdesc, FAR usbhost_ep_t *ep) { - FAR struct stm32_usbhost_s *priv = (FAR struct stm32_usbhost_s *)drvr; + FAR struct stm32l4_usbhost_s *priv = (FAR struct stm32l4_usbhost_s *)drvr; int ret; /* Sanity check. NOTE that this method should only be called if a device is @@ -4020,7 +4020,7 @@ static int stm32_epalloc(FAR struct usbhost_driver_s *drvr, /* We must have exclusive access to the USB host hardware and state structures */ - stm32_takesem(&priv->exclsem); + stm32l4_takesem(&priv->exclsem); /* Handler control pipes differently from other endpoint types. This is * because the normal, "transfer" endpoints are unidirectional an require @@ -4030,19 +4030,19 @@ static int stm32_epalloc(FAR struct usbhost_driver_s *drvr, if (epdesc->xfrtype == OTGFS_EPTYPE_CTRL) { - ret = stm32_ctrlep_alloc(priv, epdesc, ep); + ret = stm32l4_ctrlep_alloc(priv, epdesc, ep); } else { - ret = stm32_xfrep_alloc(priv, epdesc, ep); + ret = stm32l4_xfrep_alloc(priv, epdesc, ep); } - stm32_givesem(&priv->exclsem); + stm32l4_givesem(&priv->exclsem); return ret; } /************************************************************************************ - * Name: stm32_epfree + * Name: stm32l4_epfree * * Description: * Free and endpoint previously allocated by DRVR_EPALLOC. @@ -4061,45 +4061,45 @@ static int stm32_epalloc(FAR struct usbhost_driver_s *drvr, * ************************************************************************************/ -static int stm32_epfree(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep) +static int stm32l4_epfree(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep) { - FAR struct stm32_usbhost_s *priv = (FAR struct stm32_usbhost_s *)drvr; + FAR struct stm32l4_usbhost_s *priv = (FAR struct stm32l4_usbhost_s *)drvr; DEBUGASSERT(priv); /* We must have exclusive access to the USB host hardware and state structures */ - stm32_takesem(&priv->exclsem); + stm32l4_takesem(&priv->exclsem); - /* A single channel is represent by an index in the range of 0 to STM32_MAX_TX_FIFOS. + /* A single channel is represent by an index in the range of 0 to STM32L4_MAX_TX_FIFOS. * Otherwise, the ep must be a pointer to an allocated control endpoint structure. */ - if ((uintptr_t)ep < STM32_MAX_TX_FIFOS) + if ((uintptr_t)ep < STM32L4_MAX_TX_FIFOS) { /* Halt the channel and mark the channel available */ - stm32_chan_free(priv, (int)ep); + stm32l4_chan_free(priv, (int)ep); } else { /* Halt both control channel and mark the channels available */ - FAR struct stm32_ctrlinfo_s *ctrlep = (FAR struct stm32_ctrlinfo_s *)ep; - stm32_chan_free(priv, ctrlep->inndx); - stm32_chan_free(priv, ctrlep->outndx); + FAR struct stm32l4_ctrlinfo_s *ctrlep = (FAR struct stm32l4_ctrlinfo_s *)ep; + stm32l4_chan_free(priv, ctrlep->inndx); + stm32l4_chan_free(priv, ctrlep->outndx); /* And free the control endpoint container */ kmm_free(ctrlep); } - stm32_givesem(&priv->exclsem); + stm32l4_givesem(&priv->exclsem); return OK; } /**************************************************************************** - * Name: stm32_alloc + * Name: stm32l4_alloc * * Description: * Some hardware supports special memory in which request and descriptor data can @@ -4130,7 +4130,7 @@ static int stm32_epfree(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep) * ****************************************************************************/ -static int stm32_alloc(FAR struct usbhost_driver_s *drvr, +static int stm32l4_alloc(FAR struct usbhost_driver_s *drvr, FAR uint8_t **buffer, FAR size_t *maxlen) { FAR uint8_t *alloc; @@ -4139,7 +4139,7 @@ static int stm32_alloc(FAR struct usbhost_driver_s *drvr, /* There is no special memory requirement for the STM32. */ - alloc = (FAR uint8_t *)kmm_malloc(CONFIG_STM32_OTGFS_DESCSIZE); + alloc = (FAR uint8_t *)kmm_malloc(CONFIG_STM32L4_OTGFS_DESCSIZE); if (!alloc) { return -ENOMEM; @@ -4148,12 +4148,12 @@ static int stm32_alloc(FAR struct usbhost_driver_s *drvr, /* Return the allocated address and size of the descriptor buffer */ *buffer = alloc; - *maxlen = CONFIG_STM32_OTGFS_DESCSIZE; + *maxlen = CONFIG_STM32L4_OTGFS_DESCSIZE; return OK; } /**************************************************************************** - * Name: stm32_free + * Name: stm32l4_free * * Description: * Some hardware supports special memory in which request and descriptor data can @@ -4175,7 +4175,7 @@ static int stm32_alloc(FAR struct usbhost_driver_s *drvr, * ****************************************************************************/ -static int stm32_free(FAR struct usbhost_driver_s *drvr, FAR uint8_t *buffer) +static int stm32l4_free(FAR struct usbhost_driver_s *drvr, FAR uint8_t *buffer) { /* There is no special memory requirement */ @@ -4185,7 +4185,7 @@ static int stm32_free(FAR struct usbhost_driver_s *drvr, FAR uint8_t *buffer) } /************************************************************************************ - * Name: stm32_ioalloc + * Name: stm32l4_ioalloc * * Description: * Some hardware supports special memory in which larger IO buffers can @@ -4211,7 +4211,7 @@ static int stm32_free(FAR struct usbhost_driver_s *drvr, FAR uint8_t *buffer) * ************************************************************************************/ -static int stm32_ioalloc(FAR struct usbhost_driver_s *drvr, +static int stm32l4_ioalloc(FAR struct usbhost_driver_s *drvr, FAR uint8_t **buffer, size_t buflen) { FAR uint8_t *alloc; @@ -4233,7 +4233,7 @@ static int stm32_ioalloc(FAR struct usbhost_driver_s *drvr, } /************************************************************************************ - * Name: stm32_iofree + * Name: stm32l4_iofree * * Description: * Some hardware supports special memory in which IO data can be accessed more @@ -4255,7 +4255,7 @@ static int stm32_ioalloc(FAR struct usbhost_driver_s *drvr, * ************************************************************************************/ -static int stm32_iofree(FAR struct usbhost_driver_s *drvr, FAR uint8_t *buffer) +static int stm32l4_iofree(FAR struct usbhost_driver_s *drvr, FAR uint8_t *buffer) { /* There is no special memory requirement */ @@ -4265,7 +4265,7 @@ static int stm32_iofree(FAR struct usbhost_driver_s *drvr, FAR uint8_t *buffer) } /**************************************************************************** - * Name: stm32_ctrlin and stm32_ctrlout + * Name: stm32l4_ctrlin and stm32l4_ctrlout * * Description: * Process a IN or OUT request on the control endpoint. These methods @@ -4299,12 +4299,12 @@ static int stm32_iofree(FAR struct usbhost_driver_s *drvr, FAR uint8_t *buffer) * ****************************************************************************/ -static int stm32_ctrlin(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0, +static int stm32l4_ctrlin(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0, FAR const struct usb_ctrlreq_s *req, FAR uint8_t *buffer) { - FAR struct stm32_usbhost_s *priv = (FAR struct stm32_usbhost_s *)drvr; - FAR struct stm32_ctrlinfo_s *ep0info = (FAR struct stm32_ctrlinfo_s *)ep0; + FAR struct stm32l4_usbhost_s *priv = (FAR struct stm32l4_usbhost_s *)drvr; + FAR struct stm32l4_ctrlinfo_s *ep0info = (FAR struct stm32l4_ctrlinfo_s *)ep0; uint16_t buflen; systime_t start; systime_t elapsed; @@ -4319,19 +4319,19 @@ static int stm32_ctrlin(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0, /* Extract values from the request */ - buflen = stm32_getle16(req->len); + buflen = stm32l4_getle16(req->len); /* We must have exclusive access to the USB host hardware and state structures */ - stm32_takesem(&priv->exclsem); + stm32l4_takesem(&priv->exclsem); /* Loop, retrying until the retry time expires */ - for (retries = 0; retries < STM32_RETRY_COUNT; retries++) + for (retries = 0; retries < STM32L4_RETRY_COUNT; retries++) { /* Send the SETUP request */ - ret = stm32_ctrl_sendsetup(priv, ep0info, req); + ret = stm32l4_ctrl_sendsetup(priv, ep0info, req); if (ret < 0) { usbhost_trace1(OTGFS_TRACE1_SENDSETUP, -ret); @@ -4347,7 +4347,7 @@ static int stm32_ctrlin(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0, if (buflen > 0) { - ret = stm32_ctrl_recvdata(priv, ep0info, buffer, buflen); + ret = stm32l4_ctrl_recvdata(priv, ep0info, buffer, buflen); if (ret < 0) { usbhost_trace1(OTGFS_TRACE1_RECVDATA, -ret); @@ -4359,12 +4359,12 @@ static int stm32_ctrlin(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0, if (ret == OK) { priv->chan[ep0info->outndx].outdata1 ^= true; - ret = stm32_ctrl_senddata(priv, ep0info, NULL, 0); + ret = stm32l4_ctrl_senddata(priv, ep0info, NULL, 0); if (ret == OK) { /* All success transactions exit here */ - stm32_givesem(&priv->exclsem); + stm32l4_givesem(&priv->exclsem); return OK; } @@ -4375,21 +4375,21 @@ static int stm32_ctrlin(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0, elapsed = clock_systimer() - start; } - while (elapsed < STM32_DATANAK_DELAY); + while (elapsed < STM32L4_DATANAK_DELAY); } /* All failures exit here after all retries and timeouts have been exhausted */ - stm32_givesem(&priv->exclsem); + stm32l4_givesem(&priv->exclsem); return -ETIMEDOUT; } -static int stm32_ctrlout(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0, +static int stm32l4_ctrlout(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0, FAR const struct usb_ctrlreq_s *req, FAR const uint8_t *buffer) { - FAR struct stm32_usbhost_s *priv = (FAR struct stm32_usbhost_s *)drvr; - FAR struct stm32_ctrlinfo_s *ep0info = (FAR struct stm32_ctrlinfo_s *)ep0; + FAR struct stm32l4_usbhost_s *priv = (FAR struct stm32l4_usbhost_s *)drvr; + FAR struct stm32l4_ctrlinfo_s *ep0info = (FAR struct stm32l4_ctrlinfo_s *)ep0; uint16_t buflen; systime_t start; systime_t elapsed; @@ -4404,19 +4404,19 @@ static int stm32_ctrlout(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0, /* Extract values from the request */ - buflen = stm32_getle16(req->len); + buflen = stm32l4_getle16(req->len); /* We must have exclusive access to the USB host hardware and state structures */ - stm32_takesem(&priv->exclsem); + stm32l4_takesem(&priv->exclsem); /* Loop, retrying until the retry time expires */ - for (retries = 0; retries < STM32_RETRY_COUNT; retries++) + for (retries = 0; retries < STM32L4_RETRY_COUNT; retries++) { /* Send the SETUP request */ - ret = stm32_ctrl_sendsetup(priv, ep0info, req); + ret = stm32l4_ctrl_sendsetup(priv, ep0info, req); if (ret < 0) { usbhost_trace1(OTGFS_TRACE1_SENDSETUP, -ret); @@ -4435,7 +4435,7 @@ static int stm32_ctrlout(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0, /* Start DATA out transfer (only one DATA packet) */ priv->chan[ep0info->outndx].outdata1 = true; - ret = stm32_ctrl_senddata(priv, ep0info, NULL, 0); + ret = stm32l4_ctrl_senddata(priv, ep0info, NULL, 0); if (ret < 0) { usbhost_trace1(OTGFS_TRACE1_SENDDATA, -ret); @@ -4446,12 +4446,12 @@ static int stm32_ctrlout(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0, if (ret == OK) { - ret = stm32_ctrl_recvdata(priv, ep0info, NULL, 0); + ret = stm32l4_ctrl_recvdata(priv, ep0info, NULL, 0); if (ret == OK) { /* All success transactins exit here */ - stm32_givesem(&priv->exclsem); + stm32l4_givesem(&priv->exclsem); return OK; } @@ -4462,17 +4462,17 @@ static int stm32_ctrlout(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0, elapsed = clock_systimer() - start; } - while (elapsed < STM32_DATANAK_DELAY); + while (elapsed < STM32L4_DATANAK_DELAY); } /* All failures exit here after all retries and timeouts have been exhausted */ - stm32_givesem(&priv->exclsem); + stm32l4_givesem(&priv->exclsem); return -ETIMEDOUT; } /**************************************************************************** - * Name: stm32_transfer + * Name: stm32l4_transfer * * Description: * Process a request to handle a transfer descriptor. This method will @@ -4509,38 +4509,38 @@ static int stm32_ctrlout(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0, * ****************************************************************************/ -static ssize_t stm32_transfer(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep, +static ssize_t stm32l4_transfer(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep, FAR uint8_t *buffer, size_t buflen) { - FAR struct stm32_usbhost_s *priv = (FAR struct stm32_usbhost_s *)drvr; + FAR struct stm32l4_usbhost_s *priv = (FAR struct stm32l4_usbhost_s *)drvr; unsigned int chidx = (unsigned int)ep; ssize_t nbytes; uvdbg("chidx: %d buflen: %d\n", (unsigned int)ep, buflen); - DEBUGASSERT(priv && buffer && chidx < STM32_MAX_TX_FIFOS && buflen > 0); + DEBUGASSERT(priv && buffer && chidx < STM32L4_MAX_TX_FIFOS && buflen > 0); /* We must have exclusive access to the USB host hardware and state structures */ - stm32_takesem(&priv->exclsem); + stm32l4_takesem(&priv->exclsem); /* Handle IN and OUT transfer slightly differently */ if (priv->chan[chidx].in) { - nbytes = stm32_in_transfer(priv, chidx, buffer, buflen); + nbytes = stm32l4_in_transfer(priv, chidx, buffer, buflen); } else { - nbytes = stm32_out_transfer(priv, chidx, buffer, buflen); + nbytes = stm32l4_out_transfer(priv, chidx, buffer, buflen); } - stm32_givesem(&priv->exclsem); + stm32l4_givesem(&priv->exclsem); return nbytes; } /**************************************************************************** - * Name: stm32_asynch + * Name: stm32l4_asynch * * Description: * Process a request to handle a transfer descriptor. This method will @@ -4575,40 +4575,40 @@ static ssize_t stm32_transfer(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep ****************************************************************************/ #ifdef CONFIG_USBHOST_ASYNCH -static int stm32_asynch(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep, +static int stm32l4_asynch(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep, FAR uint8_t *buffer, size_t buflen, usbhost_asynch_t callback, FAR void *arg) { - FAR struct stm32_usbhost_s *priv = (FAR struct stm32_usbhost_s *)drvr; + FAR struct stm32l4_usbhost_s *priv = (FAR struct stm32l4_usbhost_s *)drvr; unsigned int chidx = (unsigned int)ep; int ret; uvdbg("chidx: %d buflen: %d\n", (unsigned int)ep, buflen); - DEBUGASSERT(priv && buffer && chidx < STM32_MAX_TX_FIFOS && buflen > 0); + DEBUGASSERT(priv && buffer && chidx < STM32L4_MAX_TX_FIFOS && buflen > 0); /* We must have exclusive access to the USB host hardware and state structures */ - stm32_takesem(&priv->exclsem); + stm32l4_takesem(&priv->exclsem); /* Handle IN and OUT transfer slightly differently */ if (priv->chan[chidx].in) { - ret = stm32_in_asynch(priv, chidx, buffer, buflen, callback, arg); + ret = stm32l4_in_asynch(priv, chidx, buffer, buflen, callback, arg); } else { - ret = stm32_out_asynch(priv, chidx, buffer, buflen, callback, arg); + ret = stm32l4_out_asynch(priv, chidx, buffer, buflen, callback, arg); } - stm32_givesem(&priv->exclsem); + stm32l4_givesem(&priv->exclsem); return ret; } #endif /* CONFIG_USBHOST_ASYNCH */ /************************************************************************************ - * Name: stm32_cancel + * Name: stm32l4_cancel * * Description: * Cancel a pending transfer on an endpoint. Cancelled synchronous or @@ -4626,16 +4626,16 @@ static int stm32_asynch(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep, * ************************************************************************************/ -static int stm32_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep) +static int stm32l4_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep) { - FAR struct stm32_usbhost_s *priv = (FAR struct stm32_usbhost_s *)drvr; - FAR struct stm32_chan_s *chan; + FAR struct stm32l4_usbhost_s *priv = (FAR struct stm32l4_usbhost_s *)drvr; + FAR struct stm32l4_chan_s *chan; unsigned int chidx = (unsigned int)ep; irqstate_t flags; uvdbg("chidx: %u: %d\n", chidx); - DEBUGASSERT(priv && chidx < STM32_MAX_TX_FIFOS); + DEBUGASSERT(priv && chidx < STM32L4_MAX_TX_FIFOS); chan = &priv->chan[chidx]; /* We need to disable interrupts to avoid race conditions with the asynchronous @@ -4646,7 +4646,7 @@ static int stm32_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep) /* Halt the channel */ - stm32_chan_halt(priv, chidx, CHREASON_CANCELLED); + stm32l4_chan_halt(priv, chidx, CHREASON_CANCELLED); chan->result = -ESHUTDOWN; /* Is there a thread waiting for this transfer to complete? */ @@ -4661,7 +4661,7 @@ static int stm32_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep) /* Wake'em up! */ - stm32_givesem(&chan->waitsem); + stm32l4_givesem(&chan->waitsem); chan->waiter = false; } @@ -4695,7 +4695,7 @@ static int stm32_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep) } /************************************************************************************ - * Name: stm32_connect + * Name: stm32l4_connect * * Description: * New connections may be detected by an attached hub. This method is the @@ -4716,11 +4716,11 @@ static int stm32_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep) ************************************************************************************/ #ifdef CONFIG_USBHOST_HUB -static int stm32_connect(FAR struct usbhost_driver_s *drvr, +static int stm32l4_connect(FAR struct usbhost_driver_s *drvr, FAR struct usbhost_hubport_s *hport, bool connected) { - FAR struct stm32_usbhost_s *priv = (FAR struct stm32_usbhost_s *)drvr; + FAR struct stm32l4_usbhost_s *priv = (FAR struct stm32l4_usbhost_s *)drvr; irqstate_t flags; DEBUGASSERT(priv != NULL && hport != NULL); @@ -4737,7 +4737,7 @@ static int stm32_connect(FAR struct usbhost_driver_s *drvr, if (priv->pscwait) { priv->pscwait = false; - stm32_givesem(&priv->pscsem); + stm32l4_givesem(&priv->pscsem); } leave_critical_section(flags); @@ -4746,7 +4746,7 @@ static int stm32_connect(FAR struct usbhost_driver_s *drvr, #endif /**************************************************************************** - * Name: stm32_disconnect + * Name: stm32l4_disconnect * * Description: * Called by the class when an error occurs and driver has been disconnected. @@ -4770,7 +4770,7 @@ static int stm32_connect(FAR struct usbhost_driver_s *drvr, * ****************************************************************************/ -static void stm32_disconnect(FAR struct usbhost_driver_s *drvr, +static void stm32l4_disconnect(FAR struct usbhost_driver_s *drvr, FAR struct usbhost_hubport_s *hport) { DEBUGASSERT(hport != NULL); @@ -4781,7 +4781,7 @@ static void stm32_disconnect(FAR struct usbhost_driver_s *drvr, * Initialization ****************************************************************************/ /**************************************************************************** - * Name: stm32_portreset + * Name: stm32l4_portreset * * Description: * Reset the USB host port. @@ -4800,26 +4800,26 @@ static void stm32_disconnect(FAR struct usbhost_driver_s *drvr, * ****************************************************************************/ -static void stm32_portreset(FAR struct stm32_usbhost_s *priv) +static void stm32l4_portreset(FAR struct stm32l4_usbhost_s *priv) { uint32_t regval; - regval = stm32_getreg(STM32_OTGFS_HPRT); + regval = stm32l4_getreg(STM32L4_OTGFS_HPRT); regval &= ~(OTGFS_HPRT_PENA | OTGFS_HPRT_PCDET | OTGFS_HPRT_PENCHNG | OTGFS_HPRT_POCCHNG); regval |= OTGFS_HPRT_PRST; - stm32_putreg(STM32_OTGFS_HPRT, regval); + stm32l4_putreg(STM32L4_OTGFS_HPRT, regval); up_mdelay(20); regval &= ~OTGFS_HPRT_PRST; - stm32_putreg(STM32_OTGFS_HPRT, regval); + stm32l4_putreg(STM32L4_OTGFS_HPRT, regval); up_mdelay(20); } /**************************************************************************** - * Name: stm32_flush_txfifos + * Name: stm32l4_flush_txfifos * * Description: * Flush the selected Tx FIFO. @@ -4832,7 +4832,7 @@ static void stm32_portreset(FAR struct stm32_usbhost_s *priv) * ****************************************************************************/ -static void stm32_flush_txfifos(uint32_t txfnum) +static void stm32l4_flush_txfifos(uint32_t txfnum) { uint32_t regval; uint32_t timeout; @@ -4840,13 +4840,13 @@ static void stm32_flush_txfifos(uint32_t txfnum) /* Initiate the TX FIFO flush operation */ regval = OTGFS_GRSTCTL_TXFFLSH | txfnum; - stm32_putreg(STM32_OTGFS_GRSTCTL, regval); + stm32l4_putreg(STM32L4_OTGFS_GRSTCTL, regval); /* Wait for the FLUSH to complete */ - for (timeout = 0; timeout < STM32_FLUSH_DELAY; timeout++) + for (timeout = 0; timeout < STM32L4_FLUSH_DELAY; timeout++) { - regval = stm32_getreg(STM32_OTGFS_GRSTCTL); + regval = stm32l4_getreg(STM32L4_OTGFS_GRSTCTL); if ((regval & OTGFS_GRSTCTL_TXFFLSH) == 0) { break; @@ -4859,7 +4859,7 @@ static void stm32_flush_txfifos(uint32_t txfnum) } /**************************************************************************** - * Name: stm32_flush_rxfifo + * Name: stm32l4_flush_rxfifo * * Description: * Flush the Rx FIFO. @@ -4872,20 +4872,20 @@ static void stm32_flush_txfifos(uint32_t txfnum) * ****************************************************************************/ -static void stm32_flush_rxfifo(void) +static void stm32l4_flush_rxfifo(void) { uint32_t regval; uint32_t timeout; /* Initiate the RX FIFO flush operation */ - stm32_putreg(STM32_OTGFS_GRSTCTL, OTGFS_GRSTCTL_RXFFLSH); + stm32l4_putreg(STM32L4_OTGFS_GRSTCTL, OTGFS_GRSTCTL_RXFFLSH); /* Wait for the FLUSH to complete */ - for (timeout = 0; timeout < STM32_FLUSH_DELAY; timeout++) + for (timeout = 0; timeout < STM32L4_FLUSH_DELAY; timeout++) { - regval = stm32_getreg(STM32_OTGFS_GRSTCTL); + regval = stm32l4_getreg(STM32L4_OTGFS_GRSTCTL); if ((regval & OTGFS_GRSTCTL_RXFFLSH) == 0) { break; @@ -4898,7 +4898,7 @@ static void stm32_flush_rxfifo(void) } /**************************************************************************** - * Name: stm32_vbusdrive + * Name: stm32l4_vbusdrive * * Description: * Drive the Vbus +5V. @@ -4912,41 +4912,41 @@ static void stm32_flush_rxfifo(void) * ****************************************************************************/ -static void stm32_vbusdrive(FAR struct stm32_usbhost_s *priv, bool state) +static void stm32l4_vbusdrive(FAR struct stm32l4_usbhost_s *priv, bool state) { uint32_t regval; /* Enable/disable the external charge pump */ - stm32_usbhost_vbusdrive(0, state); + stm32l4_usbhost_vbusdrive(0, state); /* Turn on the Host port power. */ - regval = stm32_getreg(STM32_OTGFS_HPRT); + regval = stm32l4_getreg(STM32L4_OTGFS_HPRT); regval &= ~(OTGFS_HPRT_PENA | OTGFS_HPRT_PCDET | OTGFS_HPRT_PENCHNG | OTGFS_HPRT_POCCHNG); if (((regval & OTGFS_HPRT_PPWR) == 0) && state) { regval |= OTGFS_HPRT_PPWR; - stm32_putreg(STM32_OTGFS_HPRT, regval); + stm32l4_putreg(STM32L4_OTGFS_HPRT, regval); } if (((regval & OTGFS_HPRT_PPWR) != 0) && !state) { regval &= ~OTGFS_HPRT_PPWR; - stm32_putreg(STM32_OTGFS_HPRT, regval); + stm32l4_putreg(STM32L4_OTGFS_HPRT, regval); } up_mdelay(200); } /**************************************************************************** - * Name: stm32_host_initialize + * Name: stm32l4_host_initialize * * Description: * Initialize/re-initialize hardware for host mode operation. At present, - * this function is called only from stm32_hw_initialize(). But if OTG mode + * this function is called only from stm32l4_hw_initialize(). But if OTG mode * were supported, this function would also be called to swtich between * host and device modes on a connector ID change interrupt. * @@ -4958,7 +4958,7 @@ static void stm32_vbusdrive(FAR struct stm32_usbhost_s *priv, bool state) * ****************************************************************************/ -static void stm32_host_initialize(FAR struct stm32_usbhost_s *priv) +static void stm32l4_host_initialize(FAR struct stm32l4_usbhost_s *priv) { uint32_t regval; uint32_t offset; @@ -4966,41 +4966,41 @@ static void stm32_host_initialize(FAR struct stm32_usbhost_s *priv) /* Restart the PHY Clock */ - stm32_putreg(STM32_OTGFS_PCGCCTL, 0); + stm32l4_putreg(STM32L4_OTGFS_PCGCCTL, 0); /* Initialize Host Configuration (HCFG) register */ - regval = stm32_getreg(STM32_OTGFS_HCFG); + regval = stm32l4_getreg(STM32L4_OTGFS_HCFG); regval &= ~OTGFS_HCFG_FSLSPCS_MASK; regval |= OTGFS_HCFG_FSLSPCS_FS48MHz; - stm32_putreg(STM32_OTGFS_HCFG, regval); + stm32l4_putreg(STM32L4_OTGFS_HCFG, regval); /* Reset the host port */ - stm32_portreset(priv); + stm32l4_portreset(priv); /* Clear the FS-/LS-only support bit in the HCFG register */ - regval = stm32_getreg(STM32_OTGFS_HCFG); + regval = stm32l4_getreg(STM32L4_OTGFS_HCFG); regval &= ~OTGFS_HCFG_FSLSS; - stm32_putreg(STM32_OTGFS_HCFG, regval); + stm32l4_putreg(STM32L4_OTGFS_HCFG, regval); /* Carve up FIFO memory for the Rx FIFO and the periodic and non-periodic Tx FIFOs */ /* Configure Rx FIFO size (GRXFSIZ) */ - stm32_putreg(STM32_OTGFS_GRXFSIZ, CONFIG_STM32_OTGFS_RXFIFO_SIZE); - offset = CONFIG_STM32_OTGFS_RXFIFO_SIZE; + stm32l4_putreg(STM32L4_OTGFS_GRXFSIZ, CONFIG_STM32L4_OTGFS_RXFIFO_SIZE); + offset = CONFIG_STM32L4_OTGFS_RXFIFO_SIZE; /* Setup the host non-periodic Tx FIFO size (HNPTXFSIZ) */ - regval = (offset | (CONFIG_STM32_OTGFS_NPTXFIFO_SIZE << OTGFS_HNPTXFSIZ_NPTXFD_SHIFT)); - stm32_putreg(STM32_OTGFS_HNPTXFSIZ, regval); - offset += CONFIG_STM32_OTGFS_NPTXFIFO_SIZE; + regval = (offset | (CONFIG_STM32L4_OTGFS_NPTXFIFO_SIZE << OTGFS_HNPTXFSIZ_NPTXFD_SHIFT)); + stm32l4_putreg(STM32L4_OTGFS_HNPTXFSIZ, regval); + offset += CONFIG_STM32L4_OTGFS_NPTXFIFO_SIZE; /* Set up the host periodic Tx fifo size register (HPTXFSIZ) */ - regval = (offset | (CONFIG_STM32_OTGFS_PTXFIFO_SIZE << OTGFS_HPTXFSIZ_PTXFD_SHIFT)); - stm32_putreg(STM32_OTGFS_HPTXFSIZ, regval); + regval = (offset | (CONFIG_STM32L4_OTGFS_PTXFIFO_SIZE << OTGFS_HPTXFSIZ_PTXFD_SHIFT)); + stm32l4_putreg(STM32L4_OTGFS_HPTXFSIZ, regval); /* If OTG were supported, we sould need to clear HNP enable bit in the * USB_OTG control register about here. @@ -5008,30 +5008,30 @@ static void stm32_host_initialize(FAR struct stm32_usbhost_s *priv) /* Flush all FIFOs */ - stm32_flush_txfifos(OTGFS_GRSTCTL_TXFNUM_HALL); - stm32_flush_rxfifo(); + stm32l4_flush_txfifos(OTGFS_GRSTCTL_TXFNUM_HALL); + stm32l4_flush_rxfifo(); /* Clear all pending HC Interrupts */ - for (i = 0; i < STM32_NHOST_CHANNELS; i++) + for (i = 0; i < STM32L4_NHOST_CHANNELS; i++) { - stm32_putreg(STM32_OTGFS_HCINT(i), 0xffffffff); - stm32_putreg(STM32_OTGFS_HCINTMSK(i), 0); + stm32l4_putreg(STM32L4_OTGFS_HCINT(i), 0xffffffff); + stm32l4_putreg(STM32L4_OTGFS_HCINTMSK(i), 0); } /* Driver Vbus +5V (the smoke test). Should be done elsewhere in OTG * mode. */ - stm32_vbusdrive(priv, true); + stm32l4_vbusdrive(priv, true); /* Enable host interrupts */ - stm32_hostinit_enable(); + stm32l4_hostinit_enable(); } /**************************************************************************** - * Name: stm32_sw_initialize + * Name: stm32l4_sw_initialize * * Description: * One-time setup of the host driver state structure. @@ -5044,7 +5044,7 @@ static void stm32_host_initialize(FAR struct stm32_usbhost_s *priv) * ****************************************************************************/ -static inline void stm32_sw_initialize(FAR struct stm32_usbhost_s *priv) +static inline void stm32l4_sw_initialize(FAR struct stm32l4_usbhost_s *priv) { FAR struct usbhost_driver_s *drvr; FAR struct usbhost_hubport_s *hport; @@ -5053,24 +5053,24 @@ static inline void stm32_sw_initialize(FAR struct stm32_usbhost_s *priv) /* Initialize the device operations */ drvr = &priv->drvr; - drvr->ep0configure = stm32_ep0configure; - drvr->epalloc = stm32_epalloc; - drvr->epfree = stm32_epfree; - drvr->alloc = stm32_alloc; - drvr->free = stm32_free; - drvr->ioalloc = stm32_ioalloc; - drvr->iofree = stm32_iofree; - drvr->ctrlin = stm32_ctrlin; - drvr->ctrlout = stm32_ctrlout; - drvr->transfer = stm32_transfer; + drvr->ep0configure = stm32l4_ep0configure; + drvr->epalloc = stm32l4_epalloc; + drvr->epfree = stm32l4_epfree; + drvr->alloc = stm32l4_alloc; + drvr->free = stm32l4_free; + drvr->ioalloc = stm32l4_ioalloc; + drvr->iofree = stm32l4_iofree; + drvr->ctrlin = stm32l4_ctrlin; + drvr->ctrlout = stm32l4_ctrlout; + drvr->transfer = stm32l4_transfer; #ifdef CONFIG_USBHOST_ASYNCH - drvr->asynch = stm32_asynch; + drvr->asynch = stm32l4_asynch; #endif - drvr->cancel = stm32_cancel; + drvr->cancel = stm32l4_cancel; #ifdef CONFIG_USBHOST_HUB - drvr->connect = stm32_connect; + drvr->connect = stm32l4_connect; #endif - drvr->disconnect = stm32_disconnect; + drvr->disconnect = stm32l4_disconnect; /* Initialize the public port representation */ @@ -5099,20 +5099,20 @@ static inline void stm32_sw_initialize(FAR struct stm32_usbhost_s *priv) /* Put all of the channels back in their initial, allocated state */ - memset(priv->chan, 0, STM32_MAX_TX_FIFOS * sizeof(struct stm32_chan_s)); + memset(priv->chan, 0, STM32L4_MAX_TX_FIFOS * sizeof(struct stm32l4_chan_s)); /* Initialize each channel */ - for (i = 0; i < STM32_MAX_TX_FIFOS; i++) + for (i = 0; i < STM32L4_MAX_TX_FIFOS; i++) { - FAR struct stm32_chan_s *chan = &priv->chan[i]; + FAR struct stm32l4_chan_s *chan = &priv->chan[i]; chan->chidx = i; sem_init(&chan->waitsem, 0, 0); } } /**************************************************************************** - * Name: stm32_hw_initialize + * Name: stm32l4_hw_initialize * * Description: * One-time setup of the host controller harware for normal operations. @@ -5125,7 +5125,7 @@ static inline void stm32_sw_initialize(FAR struct stm32_usbhost_s *priv) * ****************************************************************************/ -static inline int stm32_hw_initialize(FAR struct stm32_usbhost_s *priv) +static inline int stm32l4_hw_initialize(FAR struct stm32l4_usbhost_s *priv) { uint32_t regval; unsigned long timeout; @@ -5134,18 +5134,18 @@ static inline int stm32_hw_initialize(FAR struct stm32_usbhost_s *priv) * transceiver: "This bit is always 1 with write-only access" */ - regval = stm32_getreg(STM32_OTGFS_GUSBCFG); + regval = stm32l4_getreg(STM32L4_OTGFS_GUSBCFG); regval |= OTGFS_GUSBCFG_PHYSEL; - stm32_putreg(STM32_OTGFS_GUSBCFG, regval); + stm32l4_putreg(STM32L4_OTGFS_GUSBCFG, regval); /* Reset after a PHY select and set Host mode. First, wait for AHB master * IDLE state. */ - for (timeout = 0; timeout < STM32_READY_DELAY; timeout++) + for (timeout = 0; timeout < STM32L4_READY_DELAY; timeout++) { up_udelay(3); - regval = stm32_getreg(STM32_OTGFS_GRSTCTL); + regval = stm32l4_getreg(STM32L4_OTGFS_GRSTCTL); if ((regval & OTGFS_GRSTCTL_AHBIDL) != 0) { break; @@ -5154,10 +5154,10 @@ static inline int stm32_hw_initialize(FAR struct stm32_usbhost_s *priv) /* Then perform the core soft reset. */ - stm32_putreg(STM32_OTGFS_GRSTCTL, OTGFS_GRSTCTL_CSRST); - for (timeout = 0; timeout < STM32_READY_DELAY; timeout++) + stm32l4_putreg(STM32L4_OTGFS_GRSTCTL, OTGFS_GRSTCTL_CSRST); + for (timeout = 0; timeout < STM32L4_READY_DELAY; timeout++) { - regval = stm32_getreg(STM32_OTGFS_GRSTCTL); + regval = stm32l4_getreg(STM32L4_OTGFS_GRSTCTL); if ((regval & OTGFS_GRSTCTL_CSRST) == 0) { break; @@ -5174,10 +5174,10 @@ static inline int stm32_hw_initialize(FAR struct stm32_usbhost_s *priv) #ifndef CONFIG_USBDEV_VBUSSENSING regval |= OTGFS_GCCFG_NOVBUSSENS; #endif -#ifdef CONFIG_STM32_OTGFS_SOFOUTPUT +#ifdef CONFIG_STM32L4_OTGFS_SOFOUTPUT regval |= OTGFS_GCCFG_SOFOUTEN; #endif - stm32_putreg(STM32_OTGFS_GCCFG, regval); + stm32l4_putreg(STM32L4_OTGFS_GCCFG, regval); up_mdelay(20); /* Initialize OTG features: In order to support OTP, the HNPCAP and SRPCAP @@ -5186,15 +5186,15 @@ static inline int stm32_hw_initialize(FAR struct stm32_usbhost_s *priv) /* Force Host Mode */ - regval = stm32_getreg(STM32_OTGFS_GUSBCFG); + regval = stm32l4_getreg(STM32L4_OTGFS_GUSBCFG); regval &= ~OTGFS_GUSBCFG_FDMOD; regval |= OTGFS_GUSBCFG_FHMOD; - stm32_putreg(STM32_OTGFS_GUSBCFG, regval); + stm32l4_putreg(STM32L4_OTGFS_GUSBCFG, regval); up_mdelay(50); /* Initialize host mode and return success */ - stm32_host_initialize(priv); + stm32l4_host_initialize(priv); return OK; } @@ -5203,7 +5203,7 @@ static inline int stm32_hw_initialize(FAR struct stm32_usbhost_s *priv) ****************************************************************************/ /**************************************************************************** - * Name: stm32_otgfshost_initialize + * Name: stm32l4_otgfshost_initialize * * Description: * Initialize USB host device controller hardware. @@ -5227,7 +5227,7 @@ static inline int stm32_hw_initialize(FAR struct stm32_usbhost_s *priv) * ****************************************************************************/ -FAR struct usbhost_connection_s *stm32_otgfshost_initialize(int controller) +FAR struct usbhost_connection_s *stm32l4_otgfshost_initialize(int controller) { /* At present, there is only support for a single OTG FS host. Hence it is * pre-allocated as g_usbhost. However, in most code, the private data @@ -5235,7 +5235,7 @@ FAR struct usbhost_connection_s *stm32_otgfshost_initialize(int controller) * global data) in order to simplify any future support for multiple devices. */ - FAR struct stm32_usbhost_s *priv = &g_usbhost; + FAR struct stm32l4_usbhost_s *priv = &g_usbhost; /* Sanity checks */ @@ -5243,11 +5243,11 @@ FAR struct usbhost_connection_s *stm32_otgfshost_initialize(int controller) /* Make sure that interrupts from the OTG FS core are disabled */ - stm32_gint_disable(); + stm32l4_gint_disable(); /* Reset the state of the host driver */ - stm32_sw_initialize(priv); + stm32l4_sw_initialize(priv); /* Alternate function pin configuration. Here we assume that: * @@ -5272,23 +5272,23 @@ FAR struct usbhost_connection_s *stm32_otgfshost_initialize(int controller) * *Pins may vary from device-to-device. */ - stm32_configgpio(GPIO_OTGFS_DM); - stm32_configgpio(GPIO_OTGFS_DP); - stm32_configgpio(GPIO_OTGFS_ID); /* Only needed for OTG */ + stm32l4_configgpio(GPIO_OTGFS_DM); + stm32l4_configgpio(GPIO_OTGFS_DP); + stm32l4_configgpio(GPIO_OTGFS_ID); /* Only needed for OTG */ /* SOF output pin configuration is configurable */ -#ifdef CONFIG_STM32_OTGFS_SOFOUTPUT - stm32_configgpio(GPIO_OTGFS_SOF); +#ifdef CONFIG_STM32L4_OTGFS_SOFOUTPUT + stm32l4_configgpio(GPIO_OTGFS_SOF); #endif /* Initialize the USB OTG FS core */ - stm32_hw_initialize(priv); + stm32l4_hw_initialize(priv); /* Attach USB host controller interrupt handler */ - if (irq_attach(STM32_IRQ_OTGFS, stm32_gint_isr) != 0) + if (irq_attach(STM32L4_IRQ_OTGFS, stm32l4_gint_isr) != 0) { usbhost_trace1(OTGFS_TRACE1_IRQATTACH, 0); return NULL; @@ -5296,12 +5296,12 @@ FAR struct usbhost_connection_s *stm32_otgfshost_initialize(int controller) /* Enable USB OTG FS global interrupts */ - stm32_gint_enable(); + stm32l4_gint_enable(); /* Enable interrupts at the interrupt controller */ - up_enable_irq(STM32_IRQ_OTGFS); + up_enable_irq(STM32L4_IRQ_OTGFS); return &g_usbconn; } -#endif /* CONFIG_USBHOST && CONFIG_STM32_OTGFS */ +#endif /* CONFIG_USBHOST && CONFIG_STM32L4_OTGFS */ From 4f5d22c940c10edf8caf2ddf91e49046af2fa857 Mon Sep 17 00:00:00 2001 From: Sebastien Lorquet Date: Tue, 12 Jul 2016 00:03:38 +0200 Subject: [PATCH 16/31] fix a typo --- arch/arm/src/stm32l4/stm32l4_freerun.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/src/stm32l4/stm32l4_freerun.c b/arch/arm/src/stm32l4/stm32l4_freerun.c index a11df0ba0ee..6ffda5ac21f 100644 --- a/arch/arm/src/stm32l4/stm32l4_freerun.c +++ b/arch/arm/src/stm32l4/stm32l4_freerun.c @@ -1,4 +1,4 @@ -s/**************************************************************************** +/**************************************************************************** * arch/arm/src/stm32l4/stm32l4_freerun.c * * Copyright (C) 2016 Gregory Nutt. All rights reserved. From d37c5718aa371c301f798cfd75e88256b4ad6dbf Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Mon, 11 Jul 2016 16:04:07 -0600 Subject: [PATCH 17/31] Update README.txt --- configs/freedom-k64f/README.txt | 35 +++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/configs/freedom-k64f/README.txt b/configs/freedom-k64f/README.txt index 9ef9660763c..87519c37fae 100644 --- a/configs/freedom-k64f/README.txt +++ b/configs/freedom-k64f/README.txt @@ -10,6 +10,7 @@ Contents o Freedom K64F Features o Serial Console o LEDs and Buttons + o Ethernet o Development Environment o GNU Toolchain Options @@ -125,6 +126,40 @@ LEDs and Buttons SW2 PTC6/SPI0_SOUT/PD0_EXTRG/I2S0_RX_BCLK/FB_AD9/I2S0_MCLK/LLWU_P10 SW3 PTA4/FTM0_CH1/NMI_b/LLWU_P3 +Ethernet +======== + + ------------ ----------------- -------------------------------------------- + KSZ8081 Board Signal(s) K64F Pin + Pin Signal Function + --- -------- ----------------- -------------------------------------------- + 1 VDD_1V2 VDDPLL_1.2V --- + 2 VDDA_3V3 VDDA_ENET --- + 3 RXM ENET1_RX- --- + 4 RXP ENET1_RX+ --- + 5 TXM ENET1_TX- --- + 6 TXP ENET1_TX+ --- + 7 X0 RMII_XTAL0 --- + 8 XI RMII_XTAL1 --- + 9 REXT --- ---, Apparently not connected + 10 MDIO RMII0_MDIO PTB0/RMII0_MDIO + 11 MDC RMII0_MDC PTB1/RMII0_MDC + 12 RXD1 RMII0_RXD_1 PTA12/RMII0_RXD1 + 13 RXD0 RMII0_RXD_0 PTA13/RMII0_RXD0 + 14 VDDIO VDDIO_ENET --- + 15 CRS_DIV PTA14/RMII0_CRS_DV + 16 REF_CLK RMII_RXCLK PTA18/EXTAL0, PHY clock input + 17 RXER RMII0_RXER PTA5/RMII0_RXER + 18 INTRP RMII0_INT_B, J14 Pin 2, Apparently not available unless jumpered + PHY_INT_1 + 19 TXEN RMII0_TXEN PTA15/RMII0_TXEN + 20 TXD0 RMII0_TXD_0 PTA16/RMII0_TXD0 + 21 TXD1 RMII0_TXD_1 PTA17/RMII0_TXD1 + 22 GND1 --- --- + 24 nRST PHY_RST_B --- + 25 GND2 --- --- + --- -------- ----------------- -------------------------------------------- + Development Environment ======================= From 749b54fbda0bcdf452f3d8c661291bcad9fd55da Mon Sep 17 00:00:00 2001 From: Sebastien Lorquet Date: Tue, 12 Jul 2016 00:16:08 +0200 Subject: [PATCH 18/31] PR fixes for oneshoot and freerun --- arch/arm/src/stm32l4/stm32l4_freerun.c | 16 ++++++++-------- arch/arm/src/stm32l4/stm32l4_oneshot.c | 23 ++++++++++++----------- 2 files changed, 20 insertions(+), 19 deletions(-) diff --git a/arch/arm/src/stm32l4/stm32l4_freerun.c b/arch/arm/src/stm32l4/stm32l4_freerun.c index 6ffda5ac21f..1a653b49657 100644 --- a/arch/arm/src/stm32l4/stm32l4_freerun.c +++ b/arch/arm/src/stm32l4/stm32l4_freerun.c @@ -57,7 +57,7 @@ * Private Functions ****************************************************************************/ -static struct stm32l4_freerun_s *g_freerun; +FAR static struct stm32l4_freerun_s *g_freerun; /**************************************************************************** * Private Functions @@ -81,9 +81,9 @@ static struct stm32l4_freerun_s *g_freerun; * ****************************************************************************/ -static int stm32l4_freerun_handler(int irq, void *context) +static int stm32l4_freerun_handler(int irq, FAR void *context) { - struct stm32l4_freerun_s *freerun = g_freerun; + FAR struct stm32l4_freerun_s *freerun = g_freerun; DEBUGASSERT(freerun != NULL && freerun->overflow < UINT32_MAX); freerun->overflow++; @@ -115,8 +115,8 @@ static int stm32l4_freerun_handler(int irq, void *context) * ****************************************************************************/ -int stm32l4_freerun_initialize(struct stm32l4_freerun_s *freerun, int chan, - uint16_t resolution) +int stm32l4_freerun_initialize(FAR struct stm32l4_freerun_s *freerun, int chan, + uint16_t resolution) { uint32_t frequency; @@ -183,8 +183,8 @@ int stm32l4_freerun_initialize(struct stm32l4_freerun_s *freerun, int chan, * ****************************************************************************/ -int stm32l4_freerun_counter(struct stm32l4_freerun_s *freerun, - struct timespec *ts) +int stm32l4_freerun_counter(FAR struct stm32l4_freerun_s *freerun, + FAR struct timespec *ts) { uint64_t usec; uint32_t counter; @@ -275,7 +275,7 @@ int stm32l4_freerun_counter(struct stm32l4_freerun_s *freerun, * ****************************************************************************/ -int stm32l4_freerun_uninitialize(struct stm32l4_freerun_s *freerun) +int stm32l4_freerun_uninitialize(FAR struct stm32l4_freerun_s *freerun) { DEBUGASSERT(freerun && freerun->tch); diff --git a/arch/arm/src/stm32l4/stm32l4_oneshot.c b/arch/arm/src/stm32l4/stm32l4_oneshot.c index 221f023155d..6c8027e15cb 100644 --- a/arch/arm/src/stm32l4/stm32l4_oneshot.c +++ b/arch/arm/src/stm32l4/stm32l4_oneshot.c @@ -83,11 +83,11 @@ static struct stm32l4_oneshot_s *g_oneshot; * ****************************************************************************/ -static int stm32l4_oneshot_handler(int irq, void *context) +static int stm32l4_oneshot_handler(int irq, FAR void *context) { - struct stm32l4_oneshot_s *oneshot = g_oneshot; + FAR struct stm32l4_oneshot_s *oneshot = g_oneshot; oneshot_handler_t oneshot_handler; - void *oneshot_arg; + FAR void *oneshot_arg; tmrinfo("Expired...\n"); DEBUGASSERT(oneshot != NULL && oneshot->handler); @@ -138,8 +138,8 @@ static int stm32l4_oneshot_handler(int irq, void *context) * ****************************************************************************/ -int stm32l4_oneshot_initialize(struct stm32l4_oneshot_s *oneshot, int chan, - uint16_t resolution) +int stm32l4_oneshot_initialize(FAR struct stm32l4_oneshot_s *oneshot, int chan, + uint16_t resolution) { uint32_t frequency; @@ -181,7 +181,8 @@ int stm32l4_oneshot_initialize(struct stm32l4_oneshot_s *oneshot, int chan, * ****************************************************************************/ -int stm32l4_oneshot_max_delay(struct stm32l4_oneshot_s *oneshot, uint64_t *usec) +int stm32l4_oneshot_max_delay(FAR struct stm32l4_oneshot_s *oneshot, + FAR uint64_t *usec) { DEBUGASSERT(oneshot != NULL && usec != NULL); @@ -210,9 +211,9 @@ int stm32l4_oneshot_max_delay(struct stm32l4_oneshot_s *oneshot, uint64_t *usec) * ****************************************************************************/ -int stm32l4_oneshot_start(struct stm32l4_oneshot_s *oneshot, - oneshot_handler_t handler, void *arg, - const struct timespec *ts) +int stm32l4_oneshot_start(FAR struct stm32l4_oneshot_s *oneshot, + oneshot_handler_t handler, FAR void *arg, + FAR const struct timespec *ts) { uint64_t usec; uint64_t period; @@ -307,8 +308,8 @@ int stm32l4_oneshot_start(struct stm32l4_oneshot_s *oneshot, * ****************************************************************************/ -int stm32l4_oneshot_cancel(struct stm32l4_oneshot_s *oneshot, - struct timespec *ts) +int stm32l4_oneshot_cancel(FAR struct stm32l4_oneshot_s *oneshot, + FAR struct timespec *ts) { irqstate_t flags; uint64_t usec; From c80b627e8d85f3f9bdec14181a1a3720392a6488 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Mon, 11 Jul 2016 16:28:54 -0600 Subject: [PATCH 19/31] Partial review of last PR --- arch/arm/src/stm32l4/stm32l4_otgfsdev.c | 155 +++++++++++++----------- 1 file changed, 86 insertions(+), 69 deletions(-) diff --git a/arch/arm/src/stm32l4/stm32l4_otgfsdev.c b/arch/arm/src/stm32l4/stm32l4_otgfsdev.c index 6d891282c94..2ade38444f6 100644 --- a/arch/arm/src/stm32l4/stm32l4_otgfsdev.c +++ b/arch/arm/src/stm32l4/stm32l4_otgfsdev.c @@ -119,7 +119,7 @@ /* Number of endpoints */ -#define STM32L4_NENDPOINTS (6) /* ep0-5 x 2 for IN and OUT */ +#define STM32L4_NENDPOINTS (6) /* ep0-5 x 2 for IN and OUT */ /* Adjust actual number of endpoints based upon size; 0 means 'not available', * and we expect that the first 0-length endpoint implies that all others @@ -333,7 +333,7 @@ /* Endpoint 0 */ -#define EP0 (0) +#define EP0 (0) /* The set of all endpoints available to the class implementation (1-n). * This is a bitmap, and the first endpoint (0) is reserved. @@ -467,8 +467,8 @@ struct stm32l4_ctrlreq_s struct stm32l4_req_s { - struct usbdev_req_s req; /* Standard USB request */ - struct stm32l4_req_s *flink; /* Supports a singly linked list */ + struct usbdev_req_s req; /* Standard USB request */ + struct stm32l4_req_s *flink; /* Supports a singly linked list */ }; /* This is the internal representation of an endpoint */ @@ -480,20 +480,20 @@ struct stm32l4_ep_s * to struct stm32l4_ep_s. */ - struct usbdev_ep_s ep; /* Standard endpoint structure */ + struct usbdev_ep_s ep; /* Standard endpoint structure */ /* STM32-specific fields */ - struct stm32l4_usbdev_s *dev; /* Reference to private driver data */ - struct stm32l4_req_s *head; /* Request list for this endpoint */ + struct stm32l4_usbdev_s *dev; /* Reference to private driver data */ + struct stm32l4_req_s *head; /* Request list for this endpoint */ struct stm32l4_req_s *tail; - uint8_t epphy; /* Physical EP address */ - uint8_t eptype:2; /* Endpoint type */ - uint8_t active:1; /* 1: A request is being processed */ - uint8_t stalled:1; /* 1: Endpoint is stalled */ - uint8_t isin:1; /* 1: IN Endpoint */ - uint8_t odd:1; /* 1: Odd frame */ - uint8_t zlp:1; /* 1: Transmit a zero-length-packet (IN EPs only) */ + uint8_t epphy; /* Physical EP address */ + uint8_t eptype:2; /* Endpoint type */ + uint8_t active:1; /* 1: A request is being processed */ + uint8_t stalled:1; /* 1: Endpoint is stalled */ + uint8_t isin:1; /* 1: IN Endpoint */ + uint8_t odd:1; /* 1: Odd frame */ + uint8_t zlp:1; /* 1: Transmit a zero-length-packet (IN EPs only) */ }; /* This structure retains the state of the USB device controller */ @@ -505,7 +505,7 @@ struct stm32l4_usbdev_s * to struct stm32l4_usbdev_s. */ - struct usbdev_s usbdev; + struct usbdev_s usbdev; /* The bound device class driver */ @@ -513,17 +513,17 @@ struct stm32l4_usbdev_s /* STM32-specific fields */ - uint8_t stalled:1; /* 1: Protocol stalled */ - uint8_t selfpowered:1; /* 1: Device is self powered */ - uint8_t addressed:1; /* 1: Peripheral address has been set */ - uint8_t configured:1; /* 1: Class driver has been configured */ - uint8_t wakeup:1; /* 1: Device remote wake-up */ - uint8_t dotest:1; /* 1: Test mode selected */ + uint8_t stalled:1; /* 1: Protocol stalled */ + uint8_t selfpowered:1; /* 1: Device is self powered */ + uint8_t addressed:1; /* 1: Peripheral address has been set */ + uint8_t configured:1; /* 1: Class driver has been configured */ + uint8_t wakeup:1; /* 1: Device remote wake-up */ + uint8_t dotest:1; /* 1: Test mode selected */ - uint8_t devstate:4; /* See enum stm32l4_devstate_e */ - uint8_t ep0state:4; /* See enum stm32l4_ep0state_e */ - uint8_t testmode:4; /* Selected test mode */ - uint8_t epavail[2]; /* Bitset of available OUT/IN endpoints */ + uint8_t devstate:4; /* See enum stm32l4_devstate_e */ + uint8_t ep0state:4; /* See enum stm32l4_ep0state_e */ + uint8_t testmode:4; /* Selected test mode */ + uint8_t epavail[2]; /* Bitset of available OUT/IN endpoints */ /* E0 SETUP data buffering. * @@ -545,14 +545,14 @@ struct stm32l4_usbdev_s * Length of OUT DATA received in ep0data[] (Not used with OUT data) */ - struct usb_ctrlreq_s ctrlreq; - uint8_t ep0data[CONFIG_USBDEV_SETUP_MAXDATASIZE]; - uint16_t ep0datlen; + struct usb_ctrlreq_s ctrlreq; + uint8_t ep0data[CONFIG_USBDEV_SETUP_MAXDATASIZE]; + uint16_t ep0datlen; /* The endpoint lists */ - struct stm32l4_ep_s epin[STM32L4_NENDPOINTS]; - struct stm32l4_ep_s epout[STM32L4_NENDPOINTS]; + struct stm32l4_ep_s epin[STM32L4_NENDPOINTS]; + struct stm32l4_ep_s epout[STM32L4_NENDPOINTS]; }; /**************************************************************************** @@ -992,7 +992,7 @@ static FAR struct stm32l4_req_s *stm32l4_req_remfirst(FAR struct stm32l4_ep_s *p ****************************************************************************/ static bool stm32l4_req_addlast(FAR struct stm32l4_ep_s *privep, - FAR struct stm32l4_req_s *req) + FAR struct stm32l4_req_s *req) { bool is_empty = !privep->head; @@ -1007,6 +1007,7 @@ static bool stm32l4_req_addlast(FAR struct stm32l4_ep_s *privep, privep->tail->flink = req; privep->tail = req; } + return is_empty; } @@ -1019,7 +1020,7 @@ static bool stm32l4_req_addlast(FAR struct stm32l4_ep_s *privep, ****************************************************************************/ static void stm32l4_ep0in_setupresponse(FAR struct stm32l4_usbdev_s *priv, - FAR uint8_t *buf, uint32_t nbytes) + FAR uint8_t *buf, uint32_t nbytes) { stm32l4_epin_transfer(&priv->epin[EP0], buf, nbytes); priv->ep0state = EP0STATE_SETUPRESPONSE; @@ -1112,7 +1113,7 @@ static void stm32l4_ep0out_ctrlsetup(FAR struct stm32l4_usbdev_s *priv) ****************************************************************************/ static void stm32l4_txfifo_write(FAR struct stm32l4_ep_s *privep, - FAR uint8_t *buf, int nbytes) + FAR uint8_t *buf, int nbytes) { uint32_t regaddr; uint32_t regval; @@ -1157,7 +1158,7 @@ static void stm32l4_txfifo_write(FAR struct stm32l4_ep_s *privep, ****************************************************************************/ static void stm32l4_epin_transfer(FAR struct stm32l4_ep_s *privep, - FAR uint8_t *buf, int nbytes) + FAR uint8_t *buf, int nbytes) { uint32_t pktcnt; uint32_t regval; @@ -1257,7 +1258,7 @@ static void stm32l4_epin_transfer(FAR struct stm32l4_ep_s *privep, ****************************************************************************/ static void stm32l4_epin_request(FAR struct stm32l4_usbdev_s *priv, - FAR struct stm32l4_ep_s *privep) + FAR struct stm32l4_ep_s *privep) { struct stm32l4_req_s *privreq; uint32_t regaddr; @@ -1310,8 +1311,8 @@ static void stm32l4_epin_request(FAR struct stm32l4_usbdev_s *priv, } uinfo("EP%d req=%p: len=%d xfrd=%d zlp=%d\n", - privep->epphy, privreq, privreq->req.len, - privreq->req.xfrd, privep->zlp); + privep->epphy, privreq, privreq->req.len, + privreq->req.xfrd, privep->zlp); /* Check for a special case: If we are just starting a request (xfrd==0) and * the class driver is trying to send a zero-length packet (len==0). Then set @@ -1477,7 +1478,7 @@ static void stm32l4_epin_request(FAR struct stm32l4_usbdev_s *priv, ****************************************************************************/ static void stm32l4_rxfifo_read(FAR struct stm32l4_ep_s *privep, - FAR uint8_t *dest, uint16_t len) + FAR uint8_t *dest, uint16_t len) { uint32_t regaddr; int i; @@ -1557,7 +1558,7 @@ static void stm32l4_rxfifo_discard(FAR struct stm32l4_ep_s *privep, int len) ****************************************************************************/ static void stm32l4_epout_complete(FAR struct stm32l4_usbdev_s *priv, - FAR struct stm32l4_ep_s *privep) + FAR struct stm32l4_ep_s *privep) { struct stm32l4_req_s *privreq; @@ -1580,7 +1581,7 @@ static void stm32l4_epout_complete(FAR struct stm32l4_usbdev_s *priv, } uinfo("EP%d: len=%d xfrd=%d\n", - privep->epphy, privreq->req.len, privreq->req.xfrd); + privep->epphy, privreq->req.len, privreq->req.xfrd); /* Return the completed read request to the class driver and mark the state * IDLE. @@ -1605,7 +1606,8 @@ static void stm32l4_epout_complete(FAR struct stm32l4_usbdev_s *priv, * ****************************************************************************/ -static inline void stm32l4_ep0out_receive(FAR struct stm32l4_ep_s *privep, int bcnt) +static inline void stm32l4_ep0out_receive(FAR struct stm32l4_ep_s *privep, + int bcnt) { FAR struct stm32l4_usbdev_s *priv; @@ -1663,7 +1665,8 @@ static inline void stm32l4_ep0out_receive(FAR struct stm32l4_ep_s *privep, int b * ****************************************************************************/ -static inline void stm32l4_epout_receive(FAR struct stm32l4_ep_s *privep, int bcnt) +static inline void stm32l4_epout_receive(FAR struct stm32l4_ep_s *privep, + int bcnt) { struct stm32l4_req_s *privreq; uint8_t *dest; @@ -1746,7 +1749,7 @@ static inline void stm32l4_epout_receive(FAR struct stm32l4_ep_s *privep, int bc ****************************************************************************/ static void stm32l4_epout_request(FAR struct stm32l4_usbdev_s *priv, - FAR struct stm32l4_ep_s *privep) + FAR struct stm32l4_ep_s *privep) { struct stm32l4_req_s *privreq; uint32_t regaddr; @@ -1967,7 +1970,7 @@ static void stm32l4_req_cancel(struct stm32l4_ep_s *privep, int16_t status) ****************************************************************************/ static struct stm32l4_ep_s *stm32l4_ep_findbyaddr(struct stm32l4_usbdev_s *priv, - uint16_t eplog) + uint16_t eplog) { struct stm32l4_ep_s *privep; uint8_t epphy = USB_EPNO(eplog); @@ -2004,7 +2007,7 @@ static struct stm32l4_ep_s *stm32l4_ep_findbyaddr(struct stm32l4_usbdev_s *priv, ****************************************************************************/ static int stm32l4_req_dispatch(struct stm32l4_usbdev_s *priv, - const struct usb_ctrlreq_s *ctrl) + const struct usb_ctrlreq_s *ctrl) { int ret = -EIO; @@ -2135,7 +2138,7 @@ static void stm32l4_usbreset(struct stm32l4_usbdev_s *priv) ****************************************************************************/ static inline void stm32l4_ep0out_testmode(FAR struct stm32l4_usbdev_s *priv, - uint16_t index) + uint16_t index) { uint8_t testmode; @@ -2183,7 +2186,7 @@ static inline void stm32l4_ep0out_testmode(FAR struct stm32l4_usbdev_s *priv, ****************************************************************************/ static inline void stm32l4_ep0out_stdrequest(struct stm32l4_usbdev_s *priv, - FAR struct stm32l4_ctrlreq_s *ctrlreq) + FAR struct stm32l4_ctrlreq_s *ctrlreq) { FAR struct stm32l4_ep_s *privep; @@ -2627,7 +2630,8 @@ static inline void stm32l4_ep0out_setup(struct stm32l4_usbdev_s *priv) * ****************************************************************************/ -static inline void stm32l4_epout(FAR struct stm32l4_usbdev_s *priv, uint8_t epno) +static inline void stm32l4_epout(FAR struct stm32l4_usbdev_s *priv, + uint8_t epno) { FAR struct stm32l4_ep_s *privep; @@ -2755,7 +2759,8 @@ static inline void stm32l4_epout_interrupt(FAR struct stm32l4_usbdev_s *priv) if ((doepint & OTGFS_DOEPINT_XFRC) != 0) { - usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_EPOUT_XFRC), (uint16_t)doepint); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_EPOUT_XFRC), + (uint16_t)doepint); /* Clear the bit in DOEPINTn for this interrupt */ @@ -2773,7 +2778,8 @@ static inline void stm32l4_epout_interrupt(FAR struct stm32l4_usbdev_s *priv) /* REVISIT: */ if ((doepint & OTGFS_DOEPINT_EPDISD) != 0) { - usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_EPOUT_EPDISD), (uint16_t)doepint); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_EPOUT_EPDISD), + (uint16_t)doepint); /* Clear the bit in DOEPINTn for this interrupt */ @@ -2784,7 +2790,8 @@ static inline void stm32l4_epout_interrupt(FAR struct stm32l4_usbdev_s *priv) if ((doepint & OTGFS_DOEPINT_SETUP) != 0) { - usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_EPOUT_SETUP), priv->ep0state); + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_EPOUT_SETUP), + priv->ep0state); /* Handle the receipt of the IN SETUP packets now (OUT setup * packet processing may be delayed until the accompanying @@ -2795,6 +2802,7 @@ static inline void stm32l4_epout_interrupt(FAR struct stm32l4_usbdev_s *priv) { stm32l4_ep0out_setup(priv); } + stm32l4_putreg(OTGFS_DOEPINT_SETUP, STM32L4_OTGFS_DOEPINT(epno)); } } @@ -2832,7 +2840,8 @@ static inline void stm32l4_epin_runtestmode(FAR struct stm32l4_usbdev_s *priv) * ****************************************************************************/ -static inline void stm32l4_epin(FAR struct stm32l4_usbdev_s *priv, uint8_t epno) +static inline void stm32l4_epin(FAR struct stm32l4_usbdev_s *priv, + uint8_t epno) { FAR struct stm32l4_ep_s *privep = &priv->epin[epno]; @@ -2889,7 +2898,8 @@ static inline void stm32l4_epin(FAR struct stm32l4_usbdev_s *priv, uint8_t epno) * ****************************************************************************/ -static inline void stm32l4_epin_txfifoempty(FAR struct stm32l4_usbdev_s *priv, int epno) +static inline void stm32l4_epin_txfifoempty(FAR struct stm32l4_usbdev_s *priv, + int epno) { FAR struct stm32l4_ep_s *privep = &priv->epin[epno]; @@ -3310,7 +3320,7 @@ static inline void stm32l4_rxinterrupt(FAR struct stm32l4_usbdev_s *priv) */ stm32l4_rxfifo_read(&priv->epout[EP0], (FAR uint8_t *)&priv->ctrlreq, - USB_SIZEOF_CTRLREQ); + USB_SIZEOF_CTRLREQ); /* Was this an IN or an OUT SETUP packet. If it is an OUT SETUP, * then we need to wait for the completion of the data phase to @@ -3595,7 +3605,8 @@ static int stm32l4_usbinterrupt(int irq, FAR void *context) /* At present, there is only a single OTG FS device support. Hence it is * pre-allocated as g_otgfsdev. However, in most code, the private data * structure will be referenced using the 'priv' pointer (rather than the - * global data) in order to simplify any future support for multiple devices. + * global data) in order to simplify any future support for multiple + * devices. */ FAR struct stm32l4_usbdev_s *priv = &g_otgfsdev; @@ -3605,7 +3616,8 @@ static int stm32l4_usbinterrupt(int irq, FAR void *context) /* Assure that we are in device mode */ - DEBUGASSERT((stm32l4_getreg(STM32L4_OTGFS_GINTSTS) & OTGFS_GINTSTS_CMOD) == OTGFS_GINTSTS_DEVMODE); + DEBUGASSERT((stm32l4_getreg(STM32L4_OTGFS_GINTSTS) & OTGFS_GINTSTS_CMOD) == + OTGFS_GINTSTS_DEVMODE); /* Get the state of all enabled interrupts. We will do this repeatedly * some interrupts (like RXFLVL) will generate additional interrupting @@ -3627,6 +3639,7 @@ static int stm32l4_usbinterrupt(int irq, FAR void *context) { break; } + usbtrace(TRACE_INTDECODE(STM32L4_TRACEINTID_INTPENDING), (uint16_t)regval); /* OUT endpoint interrupt. The core sets this bit to indicate that an @@ -3862,8 +3875,8 @@ static void stm32l4_disablegonak(FAR struct stm32l4_ep_s *privep) * ****************************************************************************/ -static int stm32l4_epout_configure(FAR struct stm32l4_ep_s *privep, uint8_t eptype, - uint16_t maxpacket) +static int stm32l4_epout_configure(FAR struct stm32l4_ep_s *privep, + uint8_t eptype, uint16_t maxpacket) { uint32_t mpsiz; uint32_t regaddr; @@ -3958,7 +3971,7 @@ static int stm32l4_epout_configure(FAR struct stm32l4_ep_s *privep, uint8_t epty ****************************************************************************/ static int stm32l4_epin_configure(FAR struct stm32l4_ep_s *privep, uint8_t eptype, - uint16_t maxpacket) + uint16_t maxpacket) { uint32_t mpsiz; uint32_t regaddr; @@ -4058,8 +4071,8 @@ static int stm32l4_epin_configure(FAR struct stm32l4_ep_s *privep, uint8_t eptyp ****************************************************************************/ static int stm32l4_ep_configure(FAR struct usbdev_ep_s *ep, - FAR const struct usb_epdesc_s *desc, - bool last) + FAR const struct usb_epdesc_s *desc, + bool last) { FAR struct stm32l4_ep_s *privep = (FAR struct stm32l4_ep_s *)ep; uint16_t maxpacket; @@ -4101,9 +4114,9 @@ static void stm32l4_ep0_configure(FAR struct stm32l4_usbdev_s *priv) /* Enable EP0 IN and OUT */ (void)stm32l4_epin_configure(&priv->epin[EP0], USB_EP_ATTR_XFER_CONTROL, - CONFIG_USBDEV_EP0_MAXSIZE); + CONFIG_USBDEV_EP0_MAXSIZE); (void)stm32l4_epout_configure(&priv->epout[EP0], USB_EP_ATTR_XFER_CONTROL, - CONFIG_USBDEV_EP0_MAXSIZE); + CONFIG_USBDEV_EP0_MAXSIZE); } /**************************************************************************** @@ -4417,7 +4430,8 @@ static void stm32l4_ep_freebuffer(FAR struct usbdev_ep_s *ep, FAR void *buf) * ****************************************************************************/ -static int stm32l4_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *req) +static int stm32l4_ep_submit(FAR struct usbdev_ep_s *ep, + FAR struct usbdev_req_s *req) { FAR struct stm32l4_req_s *privreq = (FAR struct stm32l4_req_s *)req; FAR struct stm32l4_ep_s *privep = (FAR struct stm32l4_ep_s *)ep; @@ -4511,7 +4525,8 @@ static int stm32l4_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s * ****************************************************************************/ -static int stm32l4_ep_cancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *req) +static int stm32l4_ep_cancel(FAR struct usbdev_ep_s *ep, + FAR struct usbdev_req_s *req) { FAR struct stm32l4_ep_s *privep = (FAR struct stm32l4_ep_s *)ep; irqstate_t flags; @@ -4790,8 +4805,8 @@ static void stm32l4_ep0_stall(FAR struct stm32l4_usbdev_s *priv) ****************************************************************************/ static FAR struct usbdev_ep_s *stm32l4_ep_alloc(FAR struct usbdev_s *dev, - uint8_t eplog, bool in, - uint8_t eptype) + uint8_t eplog, bool in, + uint8_t eptype) { FAR struct stm32l4_usbdev_s *priv = (FAR struct stm32l4_usbdev_s *)dev; uint8_t epavail; @@ -4874,7 +4889,8 @@ static FAR struct usbdev_ep_s *stm32l4_ep_alloc(FAR struct usbdev_s *dev, * ****************************************************************************/ -static void stm32l4_ep_free(FAR struct usbdev_s *dev, FAR struct usbdev_ep_s *ep) +static void stm32l4_ep_free(FAR struct usbdev_s *dev, + FAR struct usbdev_ep_s *ep) { FAR struct stm32l4_usbdev_s *priv = (FAR struct stm32l4_usbdev_s *)dev; FAR struct stm32l4_ep_s *privep = (FAR struct stm32l4_ep_s *)ep; @@ -5032,7 +5048,8 @@ static int stm32l4_pullup(struct usbdev_s *dev, bool enable) * ****************************************************************************/ -static void stm32l4_setaddress(struct stm32l4_usbdev_s *priv, uint16_t address) +static void stm32l4_setaddress(struct stm32l4_usbdev_s *priv, + uint16_t address) { uint32_t regval; From 9dd70ffbae1a8ba5ea5225fac279b0b38e804bc8 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Mon, 11 Jul 2016 16:54:20 -0600 Subject: [PATCH 20/31] Freedom K64F: Green and Blue LEDs reversed --- arch/arm/src/kinetis/kinetis_enet.c | 2 +- configs/freedom-k64f/include/board.h | 24 ++++++++++++------------ configs/freedom-k64f/src/freedom-k64f.h | 6 +++--- 3 files changed, 16 insertions(+), 16 deletions(-) diff --git a/arch/arm/src/kinetis/kinetis_enet.c b/arch/arm/src/kinetis/kinetis_enet.c index 4a263a8c378..b3364a6bd38 100644 --- a/arch/arm/src/kinetis/kinetis_enet.c +++ b/arch/arm/src/kinetis/kinetis_enet.c @@ -1448,7 +1448,7 @@ static inline void kinetis_initphy(struct kinetis_driver_s *priv) phydata = 0; kinetis_readmii(priv, CONFIG_ENET_PHYADDR, PHY_STATUS, &phydata); - /* Set up the transmit and receive contrel registers based on the + /* Set up the transmit and receive control registers based on the * configuration and the auto negotiation results. */ diff --git a/configs/freedom-k64f/include/board.h b/configs/freedom-k64f/include/board.h index 92247416c36..7dcb29fc435 100644 --- a/configs/freedom-k64f/include/board.h +++ b/configs/freedom-k64f/include/board.h @@ -162,18 +162,18 @@ * the Freedom K64F. The following definitions describe how NuttX controls * the LEDs: * - * SYMBOL Meaning LED state - * RED GREEN BLUE - * ------------------- ----------------------- ----------------- */ -#define LED_STARTED 1 /* NuttX has been started OFF OFF OFF */ -#define LED_HEAPALLOCATE 2 /* Heap has been allocated OFF OFF ON */ -#define LED_IRQSENABLED 0 /* Interrupts enabled OFF OFF ON */ -#define LED_STACKCREATED 3 /* Idle stack created OFF ON OFF */ -#define LED_INIRQ 0 /* In an interrupt (no change) */ -#define LED_SIGNAL 0 /* In a signal handler (no change) */ -#define LED_ASSERTION 0 /* An assertion failed (no change) */ -#define LED_PANIC 4 /* The system has crashed FLASH OFF OFF */ -#undef LED_IDLE /* K64 is in sleep mode (Not used) */ + * SYMBOL Meaning LED state + * RED GREEN BLUE + * ------------------- ---------------------------- ----------------- */ +#define LED_STARTED 1 /* NuttX has been started OFF OFF OFF */ +#define LED_HEAPALLOCATE 2 /* Heap has been allocated OFF OFF ON */ +#define LED_IRQSENABLED 0 /* Interrupts enabled OFF OFF ON */ +#define LED_STACKCREATED 3 /* Idle stack created OFF ON OFF */ +#define LED_INIRQ 0 /* In an interrupt (no change) */ +#define LED_SIGNAL 0 /* In a signal handler (no change) */ +#define LED_ASSERTION 0 /* An assertion failed (no change) */ +#define LED_PANIC 4 /* The system has crashed FLASH OFF OFF */ +#undef LED_IDLE /* K64 is in sleep mode (Not used) */ /* Button definitions ***************************************************************/ /* Two push buttons, SW2 and SW3, are available on FRDM-K64F board, where SW2 is diff --git a/configs/freedom-k64f/src/freedom-k64f.h b/configs/freedom-k64f/src/freedom-k64f.h index 53a6e000e9e..a253dd3be4f 100644 --- a/configs/freedom-k64f/src/freedom-k64f.h +++ b/configs/freedom-k64f/src/freedom-k64f.h @@ -91,13 +91,13 @@ * LED K64 * ------ ------------------------------------------------------- * RED PTB22/SPI2_SOUT/FB_AD29/CMP2_OUT - * BLUE PTB21/SPI2_SCK/FB_AD30/CMP1_OUT * GREEN PTE26/ENET_1588_CLKIN/UART4_CTS_b/RTC_CLKOUT/USB0_CLKIN + * BLUE PTB21/SPI2_SCK/FB_AD30/CMP1_OUT */ #define GPIO_LED_R (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTB | PIN22) -#define GPIO_LED_G (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTB | PIN21) -#define GPIO_LED_B (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTE | PIN26) +#define GPIO_LED_G (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTE | PIN26) +#define GPIO_LED_B (GPIO_LOWDRIVE | GPIO_OUTPUT_ONE | PIN_PORTB | PIN21) /************************************************************************************ * Public data From 5e12d6203e51b0c6e8b080da1f28c5d3e305b144 Mon Sep 17 00:00:00 2001 From: Sebastien Lorquet Date: Tue, 12 Jul 2016 00:57:18 +0200 Subject: [PATCH 21/31] Cosmetic changes after PR 94 --- arch/arm/src/stm32l4/stm32l4_otgfsdev.c | 189 ++++++++------- arch/arm/src/stm32l4/stm32l4_otgfshost.c | 228 ++++++++++--------- arch/arm/src/stm32l4/stm32l4_rtcc.c | 2 +- arch/arm/src/stm32l4/stm32l4_tickless.c | 2 +- arch/arm/src/stm32l4/stm32l4_tim.c | 92 ++++---- arch/arm/src/stm32l4/stm32l4_tim_lowerhalf.c | 13 +- 6 files changed, 279 insertions(+), 247 deletions(-) diff --git a/arch/arm/src/stm32l4/stm32l4_otgfsdev.c b/arch/arm/src/stm32l4/stm32l4_otgfsdev.c index 6d891282c94..620059f99c6 100644 --- a/arch/arm/src/stm32l4/stm32l4_otgfsdev.c +++ b/arch/arm/src/stm32l4/stm32l4_otgfsdev.c @@ -468,7 +468,7 @@ struct stm32l4_ctrlreq_s struct stm32l4_req_s { struct usbdev_req_s req; /* Standard USB request */ - struct stm32l4_req_s *flink; /* Supports a singly linked list */ + FAR struct stm32l4_req_s *flink; /* Supports a singly linked list */ }; /* This is the internal representation of an endpoint */ @@ -484,9 +484,9 @@ struct stm32l4_ep_s /* STM32-specific fields */ - struct stm32l4_usbdev_s *dev; /* Reference to private driver data */ - struct stm32l4_req_s *head; /* Request list for this endpoint */ - struct stm32l4_req_s *tail; + FAR struct stm32l4_usbdev_s *dev; /* Reference to private driver data */ + FAR struct stm32l4_req_s *head; /* Request list for this endpoint */ + FAR struct stm32l4_req_s *tail; uint8_t epphy; /* Physical EP address */ uint8_t eptype:2; /* Endpoint type */ uint8_t active:1; /* 1: A request is being processed */ @@ -509,7 +509,7 @@ struct stm32l4_usbdev_s /* The bound device class driver */ - struct usbdevclass_driver_s *driver; + FAR struct usbdevclass_driver_s *driver; /* STM32-specific fields */ @@ -573,13 +573,14 @@ static void stm32l4_putreg(uint32_t val, uint32_t addr); static FAR struct stm32l4_req_s *stm32l4_req_remfirst(FAR struct stm32l4_ep_s *privep); static bool stm32l4_req_addlast(FAR struct stm32l4_ep_s *privep, - FAR struct stm32l4_req_s *req); + FAR struct stm32l4_req_s *req); /* Low level data transfers and request operations *****************************/ /* Special endpoint 0 data transfer logic */ static void stm32l4_ep0in_setupresponse(FAR struct stm32l4_usbdev_s *priv, - FAR uint8_t *data, uint32_t nbytes); + FAR uint8_t *data, + uint32_t nbytes); static inline void stm32l4_ep0in_transmitzlp(FAR struct stm32l4_usbdev_s *priv); static void stm32l4_ep0in_activate(void); @@ -588,56 +589,61 @@ static void stm32l4_ep0out_ctrlsetup(FAR struct stm32l4_usbdev_s *priv); /* IN request and TxFIFO handling */ static void stm32l4_txfifo_write(FAR struct stm32l4_ep_s *privep, - FAR uint8_t *buf, int nbytes); + FAR uint8_t *buf, int nbytes); static void stm32l4_epin_transfer(FAR struct stm32l4_ep_s *privep, - FAR uint8_t *buf, int nbytes); + FAR uint8_t *buf, int nbytes); static void stm32l4_epin_request(FAR struct stm32l4_usbdev_s *priv, - FAR struct stm32l4_ep_s *privep); + FAR struct stm32l4_ep_s *privep); /* OUT request and RxFIFO handling */ static void stm32l4_rxfifo_read(FAR struct stm32l4_ep_s *privep, - FAR uint8_t *dest, uint16_t len); -static void stm32l4_rxfifo_discard(FAR struct stm32l4_ep_s *privep, int len); + FAR uint8_t *dest, uint16_t len); +static void stm32l4_rxfifo_discard(FAR struct stm32l4_ep_s *privep, + int len); static void stm32l4_epout_complete(FAR struct stm32l4_usbdev_s *priv, - FAR struct stm32l4_ep_s *privep); -static inline void stm32l4_ep0out_receive(FAR struct stm32l4_ep_s *privep, int bcnt); -static inline void stm32l4_epout_receive(FAR struct stm32l4_ep_s *privep, int bcnt); + FAR struct stm32l4_ep_s *privep); +static inline void stm32l4_ep0out_receive(FAR struct stm32l4_ep_s *privep, + int bcnt); +static inline void stm32l4_epout_receive(FAR struct stm32l4_ep_s *privep, + int bcnt); static void stm32l4_epout_request(FAR struct stm32l4_usbdev_s *priv, - FAR struct stm32l4_ep_s *privep); + FAR struct stm32l4_ep_s *privep); /* General request handling */ static void stm32l4_ep_flush(FAR struct stm32l4_ep_s *privep); static void stm32l4_req_complete(FAR struct stm32l4_ep_s *privep, - int16_t result); + int16_t result); static void stm32l4_req_cancel(FAR struct stm32l4_ep_s *privep, - int16_t status); + int16_t status); /* Interrupt handling **********************************************************/ static struct stm32l4_ep_s *stm32l4_ep_findbyaddr(struct stm32l4_usbdev_s *priv, - uint16_t eplog); + uint16_t eplog); static int stm32l4_req_dispatch(FAR struct stm32l4_usbdev_s *priv, - FAR const struct usb_ctrlreq_s *ctrl); + FAR const struct usb_ctrlreq_s *ctrl); static void stm32l4_usbreset(FAR struct stm32l4_usbdev_s *priv); /* Second level OUT endpoint interrupt processing */ static inline void stm32l4_ep0out_testmode(FAR struct stm32l4_usbdev_s *priv, - uint16_t index); -static inline void stm32l4_ep0out_stdrequest(struct stm32l4_usbdev_s *priv, - FAR struct stm32l4_ctrlreq_s *ctrlreq); + uint16_t index); +static inline void stm32l4_ep0out_stdrequest(FAR struct stm32l4_usbdev_s *priv, + FAR struct stm32l4_ctrlreq_s *ctrlreq); static inline void stm32l4_ep0out_setup(struct stm32l4_usbdev_s *priv); static inline void stm32l4_epout(FAR struct stm32l4_usbdev_s *priv, - uint8_t epno); + uint8_t epno); static inline void stm32l4_epout_interrupt(FAR struct stm32l4_usbdev_s *priv); /* Second level IN endpoint interrupt processing */ static inline void stm32l4_epin_runtestmode(FAR struct stm32l4_usbdev_s *priv); -static inline void stm32l4_epin(FAR struct stm32l4_usbdev_s *priv, uint8_t epno); -static inline void stm32l4_epin_txfifoempty(FAR struct stm32l4_usbdev_s *priv, int epno); +static inline void stm32l4_epin(FAR struct stm32l4_usbdev_s *priv, + uint8_t epno); +static inline void stm32l4_epin_txfifoempty(FAR struct stm32l4_usbdev_s *priv, + int epno); static inline void stm32l4_epin_interrupt(FAR struct stm32l4_usbdev_s *priv); /* Other second level interrupt processing */ @@ -668,11 +674,12 @@ static void stm32l4_disablegonak(FAR struct stm32l4_ep_s *privep); /* Endpoint configuration */ static int stm32l4_epout_configure(FAR struct stm32l4_ep_s *privep, - uint8_t eptype, uint16_t maxpacket); + uint8_t eptype, uint16_t maxpacket); static int stm32l4_epin_configure(FAR struct stm32l4_ep_s *privep, - uint8_t eptype, uint16_t maxpacket); + uint8_t eptype, uint16_t maxpacket); static int stm32l4_ep_configure(FAR struct usbdev_ep_s *ep, - FAR const struct usb_epdesc_s *desc, bool last); + FAR const struct usb_epdesc_s *desc, + bool last); static void stm32l4_ep0_configure(FAR struct stm32l4_usbdev_s *priv); /* Endpoint disable */ @@ -685,24 +692,26 @@ static int stm32l4_ep_disable(FAR struct usbdev_ep_s *ep); static FAR struct usbdev_req_s *stm32l4_ep_allocreq(FAR struct usbdev_ep_s *ep); static void stm32l4_ep_freereq(FAR struct usbdev_ep_s *ep, - FAR struct usbdev_req_s *); + FAR struct usbdev_req_s *); /* Endpoint buffer management */ #ifdef CONFIG_USBDEV_DMA -static void *stm32l4_ep_allocbuffer(FAR struct usbdev_ep_s *ep, unsigned bytes); -static void stm32l4_ep_freebuffer(FAR struct usbdev_ep_s *ep, FAR void *buf); +static void *stm32l4_ep_allocbuffer(FAR struct usbdev_ep_s *ep, + unsigned bytes); +static void stm32l4_ep_freebuffer(FAR struct usbdev_ep_s *ep, + FAR void *buf); #endif /* Endpoint request submission */ static int stm32l4_ep_submit(FAR struct usbdev_ep_s *ep, - struct usbdev_req_s *req); + FAR struct usbdev_req_s *req); /* Endpoint request cancellation */ static int stm32l4_ep_cancel(FAR struct usbdev_ep_s *ep, - struct usbdev_req_s *req); + FAR struct usbdev_req_s *req); /* Stall handling */ @@ -716,18 +725,19 @@ static void stm32l4_ep0_stall(FAR struct stm32l4_usbdev_s *priv); /* Endpoint allocation */ static FAR struct usbdev_ep_s *stm32l4_ep_alloc(FAR struct usbdev_s *dev, - uint8_t epno, bool in, uint8_t eptype); + uint8_t epno, bool in, + uint8_t eptype); static void stm32l4_ep_free(FAR struct usbdev_s *dev, - FAR struct usbdev_ep_s *ep); + FAR struct usbdev_ep_s *ep); /* USB device controller operations ********************************************/ -static int stm32l4_getframe(struct usbdev_s *dev); -static int stm32l4_wakeup(struct usbdev_s *dev); -static int stm32l4_selfpowered(struct usbdev_s *dev, bool selfpowered); -static int stm32l4_pullup(struct usbdev_s *dev, bool enable); -static void stm32l4_setaddress(struct stm32l4_usbdev_s *priv, - uint16_t address); +static int stm32l4_getframe(FAR struct usbdev_s *dev); +static int stm32l4_wakeup(FAR struct usbdev_s *dev); +static int stm32l4_selfpowered(FAR struct usbdev_s *dev, bool selfpowered); +static int stm32l4_pullup(FAR struct usbdev_s *dev, bool enable); +static void stm32l4_setaddress(FAR struct stm32l4_usbdev_s *priv, + uint16_t address); static int stm32l4_txfifo_flush(uint32_t txfnum); static int stm32l4_rxfifo_flush(void); @@ -992,7 +1002,7 @@ static FAR struct stm32l4_req_s *stm32l4_req_remfirst(FAR struct stm32l4_ep_s *p ****************************************************************************/ static bool stm32l4_req_addlast(FAR struct stm32l4_ep_s *privep, - FAR struct stm32l4_req_s *req) + FAR struct stm32l4_req_s *req) { bool is_empty = !privep->head; @@ -1019,7 +1029,7 @@ static bool stm32l4_req_addlast(FAR struct stm32l4_ep_s *privep, ****************************************************************************/ static void stm32l4_ep0in_setupresponse(FAR struct stm32l4_usbdev_s *priv, - FAR uint8_t *buf, uint32_t nbytes) + FAR uint8_t *buf, uint32_t nbytes) { stm32l4_epin_transfer(&priv->epin[EP0], buf, nbytes); priv->ep0state = EP0STATE_SETUPRESPONSE; @@ -1112,7 +1122,7 @@ static void stm32l4_ep0out_ctrlsetup(FAR struct stm32l4_usbdev_s *priv) ****************************************************************************/ static void stm32l4_txfifo_write(FAR struct stm32l4_ep_s *privep, - FAR uint8_t *buf, int nbytes) + FAR uint8_t *buf, int nbytes) { uint32_t regaddr; uint32_t regval; @@ -1157,7 +1167,7 @@ static void stm32l4_txfifo_write(FAR struct stm32l4_ep_s *privep, ****************************************************************************/ static void stm32l4_epin_transfer(FAR struct stm32l4_ep_s *privep, - FAR uint8_t *buf, int nbytes) + FAR uint8_t *buf, int nbytes) { uint32_t pktcnt; uint32_t regval; @@ -1257,7 +1267,7 @@ static void stm32l4_epin_transfer(FAR struct stm32l4_ep_s *privep, ****************************************************************************/ static void stm32l4_epin_request(FAR struct stm32l4_usbdev_s *priv, - FAR struct stm32l4_ep_s *privep) + FAR struct stm32l4_ep_s *privep) { struct stm32l4_req_s *privreq; uint32_t regaddr; @@ -1477,7 +1487,7 @@ static void stm32l4_epin_request(FAR struct stm32l4_usbdev_s *priv, ****************************************************************************/ static void stm32l4_rxfifo_read(FAR struct stm32l4_ep_s *privep, - FAR uint8_t *dest, uint16_t len) + FAR uint8_t *dest, uint16_t len) { uint32_t regaddr; int i; @@ -1557,9 +1567,9 @@ static void stm32l4_rxfifo_discard(FAR struct stm32l4_ep_s *privep, int len) ****************************************************************************/ static void stm32l4_epout_complete(FAR struct stm32l4_usbdev_s *priv, - FAR struct stm32l4_ep_s *privep) + FAR struct stm32l4_ep_s *privep) { - struct stm32l4_req_s *privreq; + FAR struct stm32l4_req_s *privreq; /* Since a transfer just completed, there must be a read request at the head of * the endpoint request queue. @@ -1605,7 +1615,8 @@ static void stm32l4_epout_complete(FAR struct stm32l4_usbdev_s *priv, * ****************************************************************************/ -static inline void stm32l4_ep0out_receive(FAR struct stm32l4_ep_s *privep, int bcnt) +static inline void stm32l4_ep0out_receive(FAR struct stm32l4_ep_s *privep, + int bcnt) { FAR struct stm32l4_usbdev_s *priv; @@ -1663,10 +1674,11 @@ static inline void stm32l4_ep0out_receive(FAR struct stm32l4_ep_s *privep, int b * ****************************************************************************/ -static inline void stm32l4_epout_receive(FAR struct stm32l4_ep_s *privep, int bcnt) +static inline void stm32l4_epout_receive(FAR struct stm32l4_ep_s *privep, + int bcnt) { - struct stm32l4_req_s *privreq; - uint8_t *dest; + FAR struct stm32l4_req_s *privreq; + FAR uint8_t *dest; int buflen; int readlen; @@ -1746,9 +1758,9 @@ static inline void stm32l4_epout_receive(FAR struct stm32l4_ep_s *privep, int bc ****************************************************************************/ static void stm32l4_epout_request(FAR struct stm32l4_usbdev_s *priv, - FAR struct stm32l4_ep_s *privep) + FAR struct stm32l4_ep_s *privep) { - struct stm32l4_req_s *privreq; + FAR struct stm32l4_req_s *privreq; uint32_t regaddr; uint32_t regval; uint32_t xfrsize; @@ -1882,7 +1894,7 @@ static void stm32l4_epout_request(FAR struct stm32l4_usbdev_s *priv, * ****************************************************************************/ -static void stm32l4_ep_flush(struct stm32l4_ep_s *privep) +static void stm32l4_ep_flush(FAR struct stm32l4_ep_s *privep) { if (privep->isin) { @@ -1902,7 +1914,8 @@ static void stm32l4_ep_flush(struct stm32l4_ep_s *privep) * ****************************************************************************/ -static void stm32l4_req_complete(struct stm32l4_ep_s *privep, int16_t result) +static void stm32l4_req_complete(FAR struct stm32l4_ep_s *privep, + int16_t result) { FAR struct stm32l4_req_s *privreq; @@ -1942,7 +1955,7 @@ static void stm32l4_req_complete(struct stm32l4_ep_s *privep, int16_t result) * ****************************************************************************/ -static void stm32l4_req_cancel(struct stm32l4_ep_s *privep, int16_t status) +static void stm32l4_req_cancel(FAR struct stm32l4_ep_s *privep, int16_t status) { if (!stm32l4_rqempty(privep)) { @@ -1966,8 +1979,8 @@ static void stm32l4_req_cancel(struct stm32l4_ep_s *privep, int16_t status) * ****************************************************************************/ -static struct stm32l4_ep_s *stm32l4_ep_findbyaddr(struct stm32l4_usbdev_s *priv, - uint16_t eplog) +static FAR struct stm32l4_ep_s *stm32l4_ep_findbyaddr(FAR struct stm32l4_usbdev_s *priv, + uint16_t eplog) { struct stm32l4_ep_s *privep; uint8_t epphy = USB_EPNO(eplog); @@ -2003,8 +2016,8 @@ static struct stm32l4_ep_s *stm32l4_ep_findbyaddr(struct stm32l4_usbdev_s *priv, * ****************************************************************************/ -static int stm32l4_req_dispatch(struct stm32l4_usbdev_s *priv, - const struct usb_ctrlreq_s *ctrl) +static int stm32l4_req_dispatch(FAR struct stm32l4_usbdev_s *priv, + FAR const struct usb_ctrlreq_s *ctrl) { int ret = -EIO; @@ -2036,7 +2049,7 @@ static int stm32l4_req_dispatch(struct stm32l4_usbdev_s *priv, * ****************************************************************************/ -static void stm32l4_usbreset(struct stm32l4_usbdev_s *priv) +static void stm32l4_usbreset(FAR struct stm32l4_usbdev_s *priv) { FAR struct stm32l4_ep_s *privep; uint32_t regval; @@ -2135,7 +2148,7 @@ static void stm32l4_usbreset(struct stm32l4_usbdev_s *priv) ****************************************************************************/ static inline void stm32l4_ep0out_testmode(FAR struct stm32l4_usbdev_s *priv, - uint16_t index) + uint16_t index) { uint8_t testmode; @@ -2182,8 +2195,8 @@ static inline void stm32l4_ep0out_testmode(FAR struct stm32l4_usbdev_s *priv, * ****************************************************************************/ -static inline void stm32l4_ep0out_stdrequest(struct stm32l4_usbdev_s *priv, - FAR struct stm32l4_ctrlreq_s *ctrlreq) +static inline void stm32l4_ep0out_stdrequest(FAR struct stm32l4_usbdev_s *priv, + FAR struct stm32l4_ctrlreq_s *ctrlreq) { FAR struct stm32l4_ep_s *privep; @@ -2552,7 +2565,7 @@ static inline void stm32l4_ep0out_stdrequest(struct stm32l4_usbdev_s *priv, * ****************************************************************************/ -static inline void stm32l4_ep0out_setup(struct stm32l4_usbdev_s *priv) +static inline void stm32l4_ep0out_setup(FAR struct stm32l4_usbdev_s *priv) { struct stm32l4_ctrlreq_s ctrlreq; @@ -3862,8 +3875,8 @@ static void stm32l4_disablegonak(FAR struct stm32l4_ep_s *privep) * ****************************************************************************/ -static int stm32l4_epout_configure(FAR struct stm32l4_ep_s *privep, uint8_t eptype, - uint16_t maxpacket) +static int stm32l4_epout_configure(FAR struct stm32l4_ep_s *privep, + uint8_t eptype, uint16_t maxpacket) { uint32_t mpsiz; uint32_t regaddr; @@ -3957,8 +3970,8 @@ static int stm32l4_epout_configure(FAR struct stm32l4_ep_s *privep, uint8_t epty * ****************************************************************************/ -static int stm32l4_epin_configure(FAR struct stm32l4_ep_s *privep, uint8_t eptype, - uint16_t maxpacket) +static int stm32l4_epin_configure(FAR struct stm32l4_ep_s *privep, + uint8_t eptype, uint16_t maxpacket) { uint32_t mpsiz; uint32_t regaddr; @@ -4058,8 +4071,8 @@ static int stm32l4_epin_configure(FAR struct stm32l4_ep_s *privep, uint8_t eptyp ****************************************************************************/ static int stm32l4_ep_configure(FAR struct usbdev_ep_s *ep, - FAR const struct usb_epdesc_s *desc, - bool last) + FAR const struct usb_epdesc_s *desc, + bool last) { FAR struct stm32l4_ep_s *privep = (FAR struct stm32l4_ep_s *)ep; uint16_t maxpacket; @@ -4417,7 +4430,8 @@ static void stm32l4_ep_freebuffer(FAR struct usbdev_ep_s *ep, FAR void *buf) * ****************************************************************************/ -static int stm32l4_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *req) +static int stm32l4_ep_submit(FAR struct usbdev_ep_s *ep, + FAR struct usbdev_req_s *req) { FAR struct stm32l4_req_s *privreq = (FAR struct stm32l4_req_s *)req; FAR struct stm32l4_ep_s *privep = (FAR struct stm32l4_ep_s *)ep; @@ -4511,7 +4525,8 @@ static int stm32l4_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s * ****************************************************************************/ -static int stm32l4_ep_cancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *req) +static int stm32l4_ep_cancel(FAR struct usbdev_ep_s *ep, + FAR struct usbdev_req_s *req) { FAR struct stm32l4_ep_s *privep = (FAR struct stm32l4_ep_s *)ep; irqstate_t flags; @@ -4790,8 +4805,8 @@ static void stm32l4_ep0_stall(FAR struct stm32l4_usbdev_s *priv) ****************************************************************************/ static FAR struct usbdev_ep_s *stm32l4_ep_alloc(FAR struct usbdev_s *dev, - uint8_t eplog, bool in, - uint8_t eptype) + uint8_t eplog, bool in, + uint8_t eptype) { FAR struct stm32l4_usbdev_s *priv = (FAR struct stm32l4_usbdev_s *)dev; uint8_t epavail; @@ -4874,7 +4889,8 @@ static FAR struct usbdev_ep_s *stm32l4_ep_alloc(FAR struct usbdev_s *dev, * ****************************************************************************/ -static void stm32l4_ep_free(FAR struct usbdev_s *dev, FAR struct usbdev_ep_s *ep) +static void stm32l4_ep_free(FAR struct usbdev_s *dev, + FAR struct usbdev_ep_s *ep) { FAR struct stm32l4_usbdev_s *priv = (FAR struct stm32l4_usbdev_s *)dev; FAR struct stm32l4_ep_s *privep = (FAR struct stm32l4_ep_s *)ep; @@ -4900,7 +4916,7 @@ static void stm32l4_ep_free(FAR struct usbdev_s *dev, FAR struct usbdev_ep_s *ep * ****************************************************************************/ -static int stm32l4_getframe(struct usbdev_s *dev) +static int stm32l4_getframe(FAR struct usbdev_s *dev) { uint32_t regval; @@ -4920,7 +4936,7 @@ static int stm32l4_getframe(struct usbdev_s *dev) * ****************************************************************************/ -static int stm32l4_wakeup(struct usbdev_s *dev) +static int stm32l4_wakeup(FAR struct usbdev_s *dev) { FAR struct stm32l4_usbdev_s *priv = (FAR struct stm32l4_usbdev_s *)dev; uint32_t regval; @@ -4968,7 +4984,7 @@ static int stm32l4_wakeup(struct usbdev_s *dev) * ****************************************************************************/ -static int stm32l4_selfpowered(struct usbdev_s *dev, bool selfpowered) +static int stm32l4_selfpowered(FAR struct usbdev_s *dev, bool selfpowered) { FAR struct stm32l4_usbdev_s *priv = (FAR struct stm32l4_usbdev_s *)dev; @@ -4994,7 +5010,7 @@ static int stm32l4_selfpowered(struct usbdev_s *dev, bool selfpowered) * ****************************************************************************/ -static int stm32l4_pullup(struct usbdev_s *dev, bool enable) +static int stm32l4_pullup(FAR struct usbdev_s *dev, bool enable) { uint32_t regval; @@ -5032,7 +5048,8 @@ static int stm32l4_pullup(struct usbdev_s *dev, bool enable) * ****************************************************************************/ -static void stm32l4_setaddress(struct stm32l4_usbdev_s *priv, uint16_t address) +static void stm32l4_setaddress(FAR struct stm32l4_usbdev_s *priv, + uint16_t address) { uint32_t regval; @@ -5655,7 +5672,7 @@ void up_usbuninitialize(void) * ****************************************************************************/ -int usbdev_register(struct usbdevclass_driver_s *driver) +int usbdev_register(FAR struct usbdevclass_driver_s *driver) { /* At present, there is only a single OTG FS device support. Hence it is * pre-allocated as g_otgfsdev. However, in most code, the private data @@ -5726,7 +5743,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver) * ****************************************************************************/ -int usbdev_unregister(struct usbdevclass_driver_s *driver) +int usbdev_unregister(FAR struct usbdevclass_driver_s *driver) { /* At present, there is only a single OTG FS device support. Hence it is * pre-allocated as g_otgfsdev. However, in most code, the private data diff --git a/arch/arm/src/stm32l4/stm32l4_otgfshost.c b/arch/arm/src/stm32l4/stm32l4_otgfshost.c index 348bdc17094..543ea7c8817 100644 --- a/arch/arm/src/stm32l4/stm32l4_otgfshost.c +++ b/arch/arm/src/stm32l4/stm32l4_otgfshost.c @@ -295,7 +295,7 @@ static void stm32l4_putreg(uint32_t addr, uint32_t value); #endif static inline void stm32l4_modifyreg(uint32_t addr, uint32_t clrbits, - uint32_t setbits); + uint32_t setbits); #ifdef CONFIG_STM32L4_USBHOST_PKTDUMP # define stm32l4_pktdump(m,b,n) lib_dumpbuffer(m,b,n) @@ -305,12 +305,12 @@ static inline void stm32l4_modifyreg(uint32_t addr, uint32_t clrbits, /* Semaphores ******************************************************************/ -static void stm32l4_takesem(sem_t *sem); +static void stm32l4_takesem(FAR sem_t *sem); #define stm32l4_givesem(s) sem_post(s); /* Byte stream access helper functions *****************************************/ -static inline uint16_t stm32l4_getle16(const uint8_t *val); +static inline uint16_t stm32l4_getle16(FAR const uint8_t *val); /* Channel management **********************************************************/ @@ -319,27 +319,27 @@ static inline void stm32l4_chan_free(FAR struct stm32l4_usbhost_s *priv, int chi static inline void stm32l4_chan_freeall(FAR struct stm32l4_usbhost_s *priv); static void stm32l4_chan_configure(FAR struct stm32l4_usbhost_s *priv, int chidx); static void stm32l4_chan_halt(FAR struct stm32l4_usbhost_s *priv, int chidx, - enum stm32l4_chreason_e chreason); + enum stm32l4_chreason_e chreason); static int stm32l4_chan_waitsetup(FAR struct stm32l4_usbhost_s *priv, - FAR struct stm32l4_chan_s *chan); + FAR struct stm32l4_chan_s *chan); #ifdef CONFIG_USBHOST_ASYNCH static int stm32l4_chan_asynchsetup(FAR struct stm32l4_usbhost_s *priv, - FAR struct stm32l4_chan_s *chan, - usbhost_asynch_t callback, FAR void *arg); + FAR struct stm32l4_chan_s *chan, + usbhost_asynch_t callback, FAR void *arg); #endif static int stm32l4_chan_wait(FAR struct stm32l4_usbhost_s *priv, - FAR struct stm32l4_chan_s *chan); + FAR struct stm32l4_chan_s *chan); static void stm32l4_chan_wakeup(FAR struct stm32l4_usbhost_s *priv, - FAR struct stm32l4_chan_s *chan); + FAR struct stm32l4_chan_s *chan); static int stm32l4_ctrlchan_alloc(FAR struct stm32l4_usbhost_s *priv, - uint8_t epno, uint8_t funcaddr, uint8_t speed, - FAR struct stm32l4_ctrlinfo_s *ctrlep); + uint8_t epno, uint8_t funcaddr, uint8_t speed, + FAR struct stm32l4_ctrlinfo_s *ctrlep); static int stm32l4_ctrlep_alloc(FAR struct stm32l4_usbhost_s *priv, - FAR const struct usbhost_epdesc_s *epdesc, - FAR usbhost_ep_t *ep); + FAR const struct usbhost_epdesc_s *epdesc, + FAR usbhost_ep_t *ep); static int stm32l4_xfrep_alloc(FAR struct stm32l4_usbhost_s *priv, - FAR const struct usbhost_epdesc_s *epdesc, - FAR usbhost_ep_t *ep); + FAR const struct usbhost_epdesc_s *epdesc, + FAR usbhost_ep_t *ep); /* Control/data transfer logic *************************************************/ @@ -348,44 +348,44 @@ static void stm32l4_transfer_start(FAR struct stm32l4_usbhost_s *priv, int chidx static inline uint16_t stm32l4_getframe(void); #endif static int stm32l4_ctrl_sendsetup(FAR struct stm32l4_usbhost_s *priv, - FAR struct stm32l4_ctrlinfo_s *ep0, - FAR const struct usb_ctrlreq_s *req); + FAR struct stm32l4_ctrlinfo_s *ep0, + FAR const struct usb_ctrlreq_s *req); static int stm32l4_ctrl_senddata(FAR struct stm32l4_usbhost_s *priv, - FAR struct stm32l4_ctrlinfo_s *ep0, - FAR uint8_t *buffer, unsigned int buflen); + FAR struct stm32l4_ctrlinfo_s *ep0, + FAR uint8_t *buffer, unsigned int buflen); static int stm32l4_ctrl_recvdata(FAR struct stm32l4_usbhost_s *priv, - FAR struct stm32l4_ctrlinfo_s *ep0, - FAR uint8_t *buffer, unsigned int buflen); + FAR struct stm32l4_ctrlinfo_s *ep0, + FAR uint8_t *buffer, unsigned int buflen); static int stm32l4_in_setup(FAR struct stm32l4_usbhost_s *priv, int chidx); static ssize_t stm32l4_in_transfer(FAR struct stm32l4_usbhost_s *priv, int chidx, - FAR uint8_t *buffer, size_t buflen); + FAR uint8_t *buffer, size_t buflen); #ifdef CONFIG_USBHOST_ASYNCH static void stm32l4_in_next(FAR struct stm32l4_usbhost_s *priv, - FAR struct stm32l4_chan_s *chan); + FAR struct stm32l4_chan_s *chan); static int stm32l4_in_asynch(FAR struct stm32l4_usbhost_s *priv, int chidx, - FAR uint8_t *buffer, size_t buflen, - usbhost_asynch_t callback, FAR void *arg); + FAR uint8_t *buffer, size_t buflen, + usbhost_asynch_t callback, FAR void *arg); #endif static int stm32l4_out_setup(FAR struct stm32l4_usbhost_s *priv, int chidx); static ssize_t stm32l4_out_transfer(FAR struct stm32l4_usbhost_s *priv, int chidx, - FAR uint8_t *buffer, size_t buflen); + FAR uint8_t *buffer, size_t buflen); #ifdef CONFIG_USBHOST_ASYNCH static void stm32l4_out_next(FAR struct stm32l4_usbhost_s *priv, - FAR struct stm32l4_chan_s *chan); + FAR struct stm32l4_chan_s *chan); static int stm32l4_out_asynch(FAR struct stm32l4_usbhost_s *priv, int chidx, - FAR uint8_t *buffer, size_t buflen, - usbhost_asynch_t callback, FAR void *arg); + FAR uint8_t *buffer, size_t buflen, + usbhost_asynch_t callback, FAR void *arg); #endif /* Interrupt handling **********************************************************/ /* Lower level interrupt handlers */ static void stm32l4_gint_wrpacket(FAR struct stm32l4_usbhost_s *priv, - FAR uint8_t *buffer, int chidx, int buflen); + FAR uint8_t *buffer, int chidx, int buflen); static inline void stm32l4_gint_hcinisr(FAR struct stm32l4_usbhost_s *priv, - int chidx); + int chidx); static inline void stm32l4_gint_hcoutisr(FAR struct stm32l4_usbhost_s *priv, - int chidx); + int chidx); static void stm32l4_gint_connected(FAR struct stm32l4_usbhost_s *priv); static void stm32l4_gint_disconnected(FAR struct stm32l4_usbhost_s *priv); @@ -416,47 +416,47 @@ static void stm32l4_txfe_enable(FAR struct stm32l4_usbhost_s *priv, int chidx); /* USB host controller operations **********************************************/ static int stm32l4_wait(FAR struct usbhost_connection_s *conn, - FAR struct usbhost_hubport_s **hport); + FAR struct usbhost_hubport_s **hport); static int stm32l4_rh_enumerate(FAR struct stm32l4_usbhost_s *priv, - FAR struct usbhost_connection_s *conn, - FAR struct usbhost_hubport_s *hport); + FAR struct usbhost_connection_s *conn, + FAR struct usbhost_hubport_s *hport); static int stm32l4_enumerate(FAR struct usbhost_connection_s *conn, - FAR struct usbhost_hubport_s *hport); + FAR struct usbhost_hubport_s *hport); static int stm32l4_ep0configure(FAR struct usbhost_driver_s *drvr, - usbhost_ep_t ep0, uint8_t funcaddr, uint8_t speed, - uint16_t maxpacketsize); + usbhost_ep_t ep0, uint8_t funcaddr, uint8_t speed, + uint16_t maxpacketsize); static int stm32l4_epalloc(FAR struct usbhost_driver_s *drvr, - FAR const FAR struct usbhost_epdesc_s *epdesc, - FAR usbhost_ep_t *ep); + FAR const FAR struct usbhost_epdesc_s *epdesc, + FAR usbhost_ep_t *ep); static int stm32l4_epfree(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep); static int stm32l4_alloc(FAR struct usbhost_driver_s *drvr, - FAR uint8_t **buffer, FAR size_t *maxlen); + FAR uint8_t **buffer, FAR size_t *maxlen); static int stm32l4_free(FAR struct usbhost_driver_s *drvr, FAR uint8_t *buffer); static int stm32l4_ioalloc(FAR struct usbhost_driver_s *drvr, - FAR uint8_t **buffer, size_t buflen); + FAR uint8_t **buffer, size_t buflen); static int stm32l4_iofree(FAR struct usbhost_driver_s *drvr, FAR uint8_t *buffer); static int stm32l4_ctrlin(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0, - const struct usb_ctrlreq_s *req, - FAR uint8_t *buffer); + FAR const struct usb_ctrlreq_s *req, + FAR uint8_t *buffer); static int stm32l4_ctrlout(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0, - FAR const struct usb_ctrlreq_s *req, - FAR const uint8_t *buffer); + FAR const struct usb_ctrlreq_s *req, + FAR const uint8_t *buffer); static ssize_t stm32l4_transfer(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep, - FAR uint8_t *buffer, size_t buflen); + FAR uint8_t *buffer, size_t buflen); #ifdef CONFIG_USBHOST_ASYNCH static int stm32l4_asynch(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep, - FAR uint8_t *buffer, size_t buflen, - usbhost_asynch_t callback, FAR void *arg); + FAR uint8_t *buffer, size_t buflen, + usbhost_asynch_t callback, FAR void *arg); #endif static int stm32l4_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep); #ifdef CONFIG_USBHOST_HUB static int stm32l4_connect(FAR struct usbhost_driver_s *drvr, - FAR struct usbhost_hubport_s *hport, - bool connected); + FAR struct usbhost_hubport_s *hport, + bool connected); #endif static void stm32l4_disconnect(FAR struct usbhost_driver_s *drvr, - FAR struct usbhost_hubport_s *hport); + FAR struct usbhost_hubport_s *hport); /* Initialization **************************************************************/ @@ -626,7 +626,8 @@ static void stm32l4_putreg(uint32_t addr, uint32_t val) * ****************************************************************************/ -static inline void stm32l4_modifyreg(uint32_t addr, uint32_t clrbits, uint32_t setbits) +static inline void stm32l4_modifyreg(uint32_t addr, uint32_t clrbits, + uint32_t setbits) { stm32l4_putreg(addr, (((stm32l4_getreg(addr)) & ~clrbits) | setbits)); } @@ -640,7 +641,7 @@ static inline void stm32l4_modifyreg(uint32_t addr, uint32_t clrbits, uint32_t s * ****************************************************************************/ -static void stm32l4_takesem(sem_t *sem) +static void stm32l4_takesem(FAR sem_t *sem) { /* Take the semaphore (perhaps waiting) */ @@ -662,7 +663,7 @@ static void stm32l4_takesem(sem_t *sem) * ****************************************************************************/ -static inline uint16_t stm32l4_getle16(const uint8_t *val) +static inline uint16_t stm32l4_getle16(FAR const uint8_t *val) { return (uint16_t)val[1] << 8 | (uint16_t)val[0]; } @@ -909,7 +910,7 @@ static void stm32l4_chan_configure(FAR struct stm32l4_usbhost_s *priv, int chidx ****************************************************************************/ static void stm32l4_chan_halt(FAR struct stm32l4_usbhost_s *priv, int chidx, - enum stm32l4_chreason_e chreason) + enum stm32l4_chreason_e chreason) { uint32_t hcchar; uint32_t intmsk; @@ -999,7 +1000,7 @@ static void stm32l4_chan_halt(FAR struct stm32l4_usbhost_s *priv, int chidx, ****************************************************************************/ static int stm32l4_chan_waitsetup(FAR struct stm32l4_usbhost_s *priv, - FAR struct stm32l4_chan_s *chan) + FAR struct stm32l4_chan_s *chan) { irqstate_t flags = enter_critical_section(); int ret = -ENODEV; @@ -1040,8 +1041,8 @@ static int stm32l4_chan_waitsetup(FAR struct stm32l4_usbhost_s *priv, #ifdef CONFIG_USBHOST_ASYNCH static int stm32l4_chan_asynchsetup(FAR struct stm32l4_usbhost_s *priv, - FAR struct stm32l4_chan_s *chan, - usbhost_asynch_t callback, FAR void *arg) + FAR struct stm32l4_chan_s *chan, + usbhost_asynch_t callback, FAR void *arg) { irqstate_t flags = enter_critical_section(); int ret = -ENODEV; @@ -1077,7 +1078,7 @@ static int stm32l4_chan_asynchsetup(FAR struct stm32l4_usbhost_s *priv, ****************************************************************************/ static int stm32l4_chan_wait(FAR struct stm32l4_usbhost_s *priv, - FAR struct stm32l4_chan_s *chan) + FAR struct stm32l4_chan_s *chan) { irqstate_t flags; int ret; @@ -1134,7 +1135,7 @@ static int stm32l4_chan_wait(FAR struct stm32l4_usbhost_s *priv, ****************************************************************************/ static void stm32l4_chan_wakeup(FAR struct stm32l4_usbhost_s *priv, - FAR struct stm32l4_chan_s *chan) + FAR struct stm32l4_chan_s *chan) { /* Is the transfer complete? */ @@ -1190,8 +1191,8 @@ static void stm32l4_chan_wakeup(FAR struct stm32l4_usbhost_s *priv, ****************************************************************************/ static int stm32l4_ctrlchan_alloc(FAR struct stm32l4_usbhost_s *priv, - uint8_t epno, uint8_t funcaddr, uint8_t speed, - FAR struct stm32l4_ctrlinfo_s *ctrlep) + uint8_t epno, uint8_t funcaddr, uint8_t speed, + FAR struct stm32l4_ctrlinfo_s *ctrlep) { FAR struct stm32l4_chan_s *chan; int inndx; @@ -1266,8 +1267,8 @@ static int stm32l4_ctrlchan_alloc(FAR struct stm32l4_usbhost_s *priv, ****************************************************************************/ static int stm32l4_ctrlep_alloc(FAR struct stm32l4_usbhost_s *priv, - FAR const struct usbhost_epdesc_s *epdesc, - FAR usbhost_ep_t *ep) + FAR const struct usbhost_epdesc_s *epdesc, + FAR usbhost_ep_t *ep) { FAR struct usbhost_hubport_s *hport; FAR struct stm32l4_ctrlinfo_s *ctrlep; @@ -1328,8 +1329,8 @@ static int stm32l4_ctrlep_alloc(FAR struct stm32l4_usbhost_s *priv, ************************************************************************************/ static int stm32l4_xfrep_alloc(FAR struct stm32l4_usbhost_s *priv, - FAR const struct usbhost_epdesc_s *epdesc, - FAR usbhost_ep_t *ep) + FAR const struct usbhost_epdesc_s *epdesc, + FAR usbhost_ep_t *ep) { struct usbhost_hubport_s *hport; FAR struct stm32l4_chan_s *chan; @@ -1385,7 +1386,8 @@ static int stm32l4_xfrep_alloc(FAR struct stm32l4_usbhost_s *priv, * ****************************************************************************/ -static void stm32l4_transfer_start(FAR struct stm32l4_usbhost_s *priv, int chidx) +static void stm32l4_transfer_start(FAR struct stm32l4_usbhost_s *priv, + int chidx) { FAR struct stm32l4_chan_s *chan; uint32_t regval; @@ -1593,8 +1595,8 @@ static inline uint16_t stm32l4_getframe(void) ****************************************************************************/ static int stm32l4_ctrl_sendsetup(FAR struct stm32l4_usbhost_s *priv, - FAR struct stm32l4_ctrlinfo_s *ep0, - FAR const struct usb_ctrlreq_s *req) + FAR struct stm32l4_ctrlinfo_s *ep0, + FAR const struct usb_ctrlreq_s *req) { FAR struct stm32l4_chan_s *chan; systime_t start; @@ -1670,8 +1672,8 @@ static int stm32l4_ctrl_sendsetup(FAR struct stm32l4_usbhost_s *priv, ****************************************************************************/ static int stm32l4_ctrl_senddata(FAR struct stm32l4_usbhost_s *priv, - FAR struct stm32l4_ctrlinfo_s *ep0, - FAR uint8_t *buffer, unsigned int buflen) + FAR struct stm32l4_ctrlinfo_s *ep0, + FAR uint8_t *buffer, unsigned int buflen) { FAR struct stm32l4_chan_s *chan = &priv->chan[ep0->outndx]; int ret; @@ -1723,8 +1725,8 @@ static int stm32l4_ctrl_senddata(FAR struct stm32l4_usbhost_s *priv, ****************************************************************************/ static int stm32l4_ctrl_recvdata(FAR struct stm32l4_usbhost_s *priv, - FAR struct stm32l4_ctrlinfo_s *ep0, - FAR uint8_t *buffer, unsigned int buflen) + FAR struct stm32l4_ctrlinfo_s *ep0, + FAR uint8_t *buffer, unsigned int buflen) { FAR struct stm32l4_chan_s *chan = &priv->chan[ep0->inndx]; int ret; @@ -1823,8 +1825,9 @@ static int stm32l4_in_setup(FAR struct stm32l4_usbhost_s *priv, int chidx) * ****************************************************************************/ -static ssize_t stm32l4_in_transfer(FAR struct stm32l4_usbhost_s *priv, int chidx, - FAR uint8_t *buffer, size_t buflen) +static ssize_t stm32l4_in_transfer(FAR struct stm32l4_usbhost_s *priv, + int chidx, FAR uint8_t *buffer, + size_t buflen) { FAR struct stm32l4_chan_s *chan; systime_t start; @@ -1910,7 +1913,7 @@ static ssize_t stm32l4_in_transfer(FAR struct stm32l4_usbhost_s *priv, int chidx #ifdef CONFIG_USBHOST_ASYNCH static void stm32l4_in_next(FAR struct stm32l4_usbhost_s *priv, - FAR struct stm32l4_chan_s *chan) + FAR struct stm32l4_chan_s *chan) { usbhost_asynch_t callback; FAR void *arg; @@ -1975,8 +1978,8 @@ static void stm32l4_in_next(FAR struct stm32l4_usbhost_s *priv, #ifdef CONFIG_USBHOST_ASYNCH static int stm32l4_in_asynch(FAR struct stm32l4_usbhost_s *priv, int chidx, - FAR uint8_t *buffer, size_t buflen, - usbhost_asynch_t callback, FAR void *arg) + FAR uint8_t *buffer, size_t buflen, + usbhost_asynch_t callback, FAR void *arg) { FAR struct stm32l4_chan_s *chan; int ret; @@ -2082,8 +2085,9 @@ static int stm32l4_out_setup(FAR struct stm32l4_usbhost_s *priv, int chidx) * ****************************************************************************/ -static ssize_t stm32l4_out_transfer(FAR struct stm32l4_usbhost_s *priv, int chidx, - FAR uint8_t *buffer, size_t buflen) +static ssize_t stm32l4_out_transfer(FAR struct stm32l4_usbhost_s *priv, + int chidx, FAR uint8_t *buffer, + size_t buflen) { FAR struct stm32l4_chan_s *chan; systime_t start; @@ -2196,7 +2200,7 @@ static ssize_t stm32l4_out_transfer(FAR struct stm32l4_usbhost_s *priv, int chid #ifdef CONFIG_USBHOST_ASYNCH static void stm32l4_out_next(FAR struct stm32l4_usbhost_s *priv, - FAR struct stm32l4_chan_s *chan) + FAR struct stm32l4_chan_s *chan) { usbhost_asynch_t callback; FAR void *arg; @@ -2261,8 +2265,8 @@ static void stm32l4_out_next(FAR struct stm32l4_usbhost_s *priv, #ifdef CONFIG_USBHOST_ASYNCH static int stm32l4_out_asynch(FAR struct stm32l4_usbhost_s *priv, int chidx, - FAR uint8_t *buffer, size_t buflen, - usbhost_asynch_t callback, FAR void *arg) + FAR uint8_t *buffer, size_t buflen, + usbhost_asynch_t callback, FAR void *arg) { FAR struct stm32l4_chan_s *chan; int ret; @@ -2305,7 +2309,7 @@ static int stm32l4_out_asynch(FAR struct stm32l4_usbhost_s *priv, int chidx, ****************************************************************************/ static void stm32l4_gint_wrpacket(FAR struct stm32l4_usbhost_s *priv, - FAR uint8_t *buffer, int chidx, int buflen) + FAR uint8_t *buffer, int chidx, int buflen) { FAR uint32_t *src; uint32_t fifo; @@ -2355,7 +2359,7 @@ static void stm32l4_gint_wrpacket(FAR struct stm32l4_usbhost_s *priv, ****************************************************************************/ static inline void stm32l4_gint_hcinisr(FAR struct stm32l4_usbhost_s *priv, - int chidx) + int chidx) { FAR struct stm32l4_chan_s *chan = &priv->chan[chidx]; uint32_t regval; @@ -2616,7 +2620,7 @@ static inline void stm32l4_gint_hcinisr(FAR struct stm32l4_usbhost_s *priv, ****************************************************************************/ static inline void stm32l4_gint_hcoutisr(FAR struct stm32l4_usbhost_s *priv, - int chidx) + int chidx) { FAR struct stm32l4_chan_s *chan = &priv->chan[chidx]; uint32_t regval; @@ -3732,7 +3736,7 @@ static void stm32l4_txfe_enable(FAR struct stm32l4_usbhost_s *priv, int chidx) ****************************************************************************/ static int stm32l4_wait(FAR struct usbhost_connection_s *conn, - FAR struct usbhost_hubport_s **hport) + FAR struct usbhost_hubport_s **hport) { FAR struct stm32l4_usbhost_s *priv = &g_usbhost; struct usbhost_hubport_s *connport; @@ -3819,8 +3823,8 @@ static int stm32l4_wait(FAR struct usbhost_connection_s *conn, ****************************************************************************/ static int stm32l4_rh_enumerate(FAR struct stm32l4_usbhost_s *priv, - FAR struct usbhost_connection_s *conn, - FAR struct usbhost_hubport_s *hport) + FAR struct usbhost_connection_s *conn, + FAR struct usbhost_hubport_s *hport) { uint32_t regval; int ret; @@ -3873,7 +3877,7 @@ static int stm32l4_rh_enumerate(FAR struct stm32l4_usbhost_s *priv, } static int stm32l4_enumerate(FAR struct usbhost_connection_s *conn, - FAR struct usbhost_hubport_s *hport) + FAR struct usbhost_hubport_s *hport) { FAR struct stm32l4_usbhost_s *priv = &g_usbhost; int ret; @@ -3946,9 +3950,9 @@ static int stm32l4_enumerate(FAR struct usbhost_connection_s *conn, * ************************************************************************************/ -static int stm32l4_ep0configure(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0, - uint8_t funcaddr, uint8_t speed, - uint16_t maxpacketsize) +static int stm32l4_ep0configure(FAR struct usbhost_driver_s *drvr, + usbhost_ep_t ep0, uint8_t funcaddr, + uint8_t speed, uint16_t maxpacketsize) { FAR struct stm32l4_usbhost_s *priv = (FAR struct stm32l4_usbhost_s *)drvr; FAR struct stm32l4_ctrlinfo_s *ep0info = (FAR struct stm32l4_ctrlinfo_s *)ep0; @@ -4006,8 +4010,8 @@ static int stm32l4_ep0configure(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ************************************************************************************/ static int stm32l4_epalloc(FAR struct usbhost_driver_s *drvr, - FAR const struct usbhost_epdesc_s *epdesc, - FAR usbhost_ep_t *ep) + FAR const struct usbhost_epdesc_s *epdesc, + FAR usbhost_ep_t *ep) { FAR struct stm32l4_usbhost_s *priv = (FAR struct stm32l4_usbhost_s *)drvr; int ret; @@ -4129,9 +4133,9 @@ static int stm32l4_epfree(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep) * - Never called from an interrupt handler. * ****************************************************************************/ - +#warning this function name is too generic static int stm32l4_alloc(FAR struct usbhost_driver_s *drvr, - FAR uint8_t **buffer, FAR size_t *maxlen) + FAR uint8_t **buffer, FAR size_t *maxlen) { FAR uint8_t *alloc; @@ -4174,7 +4178,7 @@ static int stm32l4_alloc(FAR struct usbhost_driver_s *drvr, * - Never called from an interrupt handler. * ****************************************************************************/ - +#warning this function name is too generic static int stm32l4_free(FAR struct usbhost_driver_s *drvr, FAR uint8_t *buffer) { /* There is no special memory requirement */ @@ -4210,9 +4214,9 @@ static int stm32l4_free(FAR struct usbhost_driver_s *drvr, FAR uint8_t *buffer) * This function will *not* be called from an interrupt handler. * ************************************************************************************/ - +#warning this function name is too generic static int stm32l4_ioalloc(FAR struct usbhost_driver_s *drvr, - FAR uint8_t **buffer, size_t buflen) + FAR uint8_t **buffer, size_t buflen) { FAR uint8_t *alloc; @@ -4254,7 +4258,7 @@ static int stm32l4_ioalloc(FAR struct usbhost_driver_s *drvr, * This function will *not* be called from an interrupt handler. * ************************************************************************************/ - +#warning this function name is too generic static int stm32l4_iofree(FAR struct usbhost_driver_s *drvr, FAR uint8_t *buffer) { /* There is no special memory requirement */ @@ -4300,8 +4304,8 @@ static int stm32l4_iofree(FAR struct usbhost_driver_s *drvr, FAR uint8_t *buffer ****************************************************************************/ static int stm32l4_ctrlin(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0, - FAR const struct usb_ctrlreq_s *req, - FAR uint8_t *buffer) + FAR const struct usb_ctrlreq_s *req, + FAR uint8_t *buffer) { FAR struct stm32l4_usbhost_s *priv = (FAR struct stm32l4_usbhost_s *)drvr; FAR struct stm32l4_ctrlinfo_s *ep0info = (FAR struct stm32l4_ctrlinfo_s *)ep0; @@ -4385,8 +4389,8 @@ static int stm32l4_ctrlin(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0, } static int stm32l4_ctrlout(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0, - FAR const struct usb_ctrlreq_s *req, - FAR const uint8_t *buffer) + FAR const struct usb_ctrlreq_s *req, + FAR const uint8_t *buffer) { FAR struct stm32l4_usbhost_s *priv = (FAR struct stm32l4_usbhost_s *)drvr; FAR struct stm32l4_ctrlinfo_s *ep0info = (FAR struct stm32l4_ctrlinfo_s *)ep0; @@ -4510,7 +4514,7 @@ static int stm32l4_ctrlout(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0, ****************************************************************************/ static ssize_t stm32l4_transfer(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep, - FAR uint8_t *buffer, size_t buflen) + FAR uint8_t *buffer, size_t buflen) { FAR struct stm32l4_usbhost_s *priv = (FAR struct stm32l4_usbhost_s *)drvr; unsigned int chidx = (unsigned int)ep; @@ -4576,8 +4580,8 @@ static ssize_t stm32l4_transfer(FAR struct usbhost_driver_s *drvr, usbhost_ep_t #ifdef CONFIG_USBHOST_ASYNCH static int stm32l4_asynch(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep, - FAR uint8_t *buffer, size_t buflen, - usbhost_asynch_t callback, FAR void *arg) + FAR uint8_t *buffer, size_t buflen, + usbhost_asynch_t callback, FAR void *arg) { FAR struct stm32l4_usbhost_s *priv = (FAR struct stm32l4_usbhost_s *)drvr; unsigned int chidx = (unsigned int)ep; @@ -4717,8 +4721,8 @@ static int stm32l4_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep) #ifdef CONFIG_USBHOST_HUB static int stm32l4_connect(FAR struct usbhost_driver_s *drvr, - FAR struct usbhost_hubport_s *hport, - bool connected) + FAR struct usbhost_hubport_s *hport, + bool connected) { FAR struct stm32l4_usbhost_s *priv = (FAR struct stm32l4_usbhost_s *)drvr; irqstate_t flags; @@ -4771,7 +4775,7 @@ static int stm32l4_connect(FAR struct usbhost_driver_s *drvr, ****************************************************************************/ static void stm32l4_disconnect(FAR struct usbhost_driver_s *drvr, - FAR struct usbhost_hubport_s *hport) + FAR struct usbhost_hubport_s *hport) { DEBUGASSERT(hport != NULL); hport->devclass = NULL; diff --git a/arch/arm/src/stm32l4/stm32l4_rtcc.c b/arch/arm/src/stm32l4/stm32l4_rtcc.c index d15a8981b48..338d9a54076 100644 --- a/arch/arm/src/stm32l4/stm32l4_rtcc.c +++ b/arch/arm/src/stm32l4/stm32l4_rtcc.c @@ -535,7 +535,7 @@ static void rtc_resume(void) ************************************************************************************/ #ifdef CONFIG_RTC_ALARM -static int stm32l4_rtc_alarm_handler(int irq, void *context) +static int stm32l4_rtc_alarm_handler(int irq, FAR void *context) { FAR struct alm_cbinfo_s *cbinfo; alm_callback_t cb; diff --git a/arch/arm/src/stm32l4/stm32l4_tickless.c b/arch/arm/src/stm32l4/stm32l4_tickless.c index b14bef51e83..9474f720c5b 100644 --- a/arch/arm/src/stm32l4/stm32l4_tickless.c +++ b/arch/arm/src/stm32l4/stm32l4_tickless.c @@ -152,7 +152,7 @@ static struct stm32l4_tickless_s g_tickless; * ****************************************************************************/ -static void stm32l4_oneshot_handler(void *arg) +static void stm32l4_oneshot_handler(FAR void *arg) { tmrinfo("Expired...\n"); sched_timer_expiration(); diff --git a/arch/arm/src/stm32l4/stm32l4_tim.c b/arch/arm/src/stm32l4/stm32l4_tim.c index d4c560855c2..57440d902aa 100644 --- a/arch/arm/src/stm32l4/stm32l4_tim.c +++ b/arch/arm/src/stm32l4/stm32l4_tim.c @@ -217,7 +217,7 @@ struct stm32l4_tim_priv_s { - const struct stm32l4_tim_ops_s *ops; + FAR const struct stm32l4_tim_ops_s *ops; stm32l4_tim_mode_t mode; uint32_t base; /* TIMn base address */ }; @@ -229,16 +229,16 @@ struct stm32l4_tim_priv_s /* Register helpers */ static inline uint16_t stm32l4_getreg16(FAR struct stm32l4_tim_dev_s *dev, - uint8_t offset); -static inline void stm32l4_putreg16(FAR struct stm32l4_tim_dev_s *dev, uint8_t offset, - uint16_t value); + uint8_t offset); +static inline void stm32l4_putreg16(FAR struct stm32l4_tim_dev_s *dev, + uint8_t offset, uint16_t value); static inline void stm32l4_modifyreg16(FAR struct stm32l4_tim_dev_s *dev, - uint8_t offset, uint16_t clearbits, - uint16_t setbits); + uint8_t offset, uint16_t clearbits, + uint16_t setbits); static inline uint32_t stm32l4_getreg32(FAR struct stm32l4_tim_dev_s *dev, - uint8_t offset); -static inline void stm32l4_putreg32(FAR struct stm32l4_tim_dev_s *dev, uint8_t offset, - uint32_t value); + uint8_t offset); +static inline void stm32l4_putreg32(FAR struct stm32l4_tim_dev_s *dev, + uint8_t offset, uint32_t value); /* Timer helpers */ @@ -254,21 +254,26 @@ static void stm32l4_tim_gpioconfig(uint32_t cfg, stm32l4_tim_channel_t mode); /* Timer methods */ -static int stm32l4_tim_setmode(FAR struct stm32l4_tim_dev_s *dev, stm32l4_tim_mode_t mode); -static int stm32l4_tim_setclock(FAR struct stm32l4_tim_dev_s *dev, uint32_t freq); +static int stm32l4_tim_setmode(FAR struct stm32l4_tim_dev_s *dev, + stm32l4_tim_mode_t mode); +static int stm32l4_tim_setclock(FAR struct stm32l4_tim_dev_s *dev, + uint32_t freq); static void stm32l4_tim_setperiod(FAR struct stm32l4_tim_dev_s *dev, - uint32_t period); + uint32_t period); static uint32_t stm32l4_tim_getcounter(FAR struct stm32l4_tim_dev_s *dev); -static int stm32l4_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev, uint8_t channel, - stm32l4_tim_channel_t mode); -static int stm32l4_tim_setcompare(FAR struct stm32l4_tim_dev_s *dev, uint8_t channel, - uint32_t compare); -static int stm32l4_tim_getcapture(FAR struct stm32l4_tim_dev_s *dev, uint8_t channel); +static int stm32l4_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev, + uint8_t channel, stm32l4_tim_channel_t mode); +static int stm32l4_tim_setcompare(FAR struct stm32l4_tim_dev_s *dev, + uint8_t channel, uint32_t compare); +static int stm32l4_tim_getcapture(FAR struct stm32l4_tim_dev_s *dev, + uint8_t channel); static int stm32l4_tim_setisr(FAR struct stm32l4_tim_dev_s *dev, - int (*handler)(int irq, void *context), - int source); -static void stm32l4_tim_enableint(FAR struct stm32l4_tim_dev_s *dev, int source); -static void stm32l4_tim_disableint(FAR struct stm32l4_tim_dev_s *dev, int source); + int (*handler)(int irq, FAR void *context), + int source); +static void stm32l4_tim_enableint(FAR struct stm32l4_tim_dev_s *dev, + int source); +static void stm32l4_tim_disableint(FAR struct stm32l4_tim_dev_s *dev, + int source); static void stm32l4_tim_ackint(FAR struct stm32l4_tim_dev_s *dev, int source); static int stm32l4_tim_checkint(FAR struct stm32l4_tim_dev_s *dev, int source); @@ -403,7 +408,7 @@ struct stm32l4_tim_priv_s stm32l4_tim17_priv = ************************************************************************************/ static inline uint16_t stm32l4_getreg16(FAR struct stm32l4_tim_dev_s *dev, - uint8_t offset) + uint8_t offset) { return getreg16(((struct stm32l4_tim_priv_s *)dev)->base + offset); } @@ -416,8 +421,8 @@ static inline uint16_t stm32l4_getreg16(FAR struct stm32l4_tim_dev_s *dev, * ************************************************************************************/ -static inline void stm32l4_putreg16(FAR struct stm32l4_tim_dev_s *dev, uint8_t offset, - uint16_t value) +static inline void stm32l4_putreg16(FAR struct stm32l4_tim_dev_s *dev, + uint8_t offset, uint16_t value) { putreg16(value, ((struct stm32l4_tim_priv_s *)dev)->base + offset); } @@ -431,10 +436,11 @@ static inline void stm32l4_putreg16(FAR struct stm32l4_tim_dev_s *dev, uint8_t o ************************************************************************************/ static inline void stm32l4_modifyreg16(FAR struct stm32l4_tim_dev_s *dev, - uint8_t offset, uint16_t clearbits, - uint16_t setbits) + uint8_t offset, uint16_t clearbits, + uint16_t setbits) { - modifyreg16(((struct stm32l4_tim_priv_s *)dev)->base + offset, clearbits, setbits); + modifyreg16(((struct stm32l4_tim_priv_s *)dev)->base + offset, clearbits, + setbits); } /************************************************************************************ @@ -447,7 +453,7 @@ static inline void stm32l4_modifyreg16(FAR struct stm32l4_tim_dev_s *dev, ************************************************************************************/ static inline uint32_t stm32l4_getreg32(FAR struct stm32l4_tim_dev_s *dev, - uint8_t offset) + uint8_t offset) { return getreg32(((struct stm32l4_tim_priv_s *)dev)->base + offset); } @@ -461,8 +467,8 @@ static inline uint32_t stm32l4_getreg32(FAR struct stm32l4_tim_dev_s *dev, * ************************************************************************************/ -static inline void stm32l4_putreg32(FAR struct stm32l4_tim_dev_s *dev, uint8_t offset, - uint32_t value) +static inline void stm32l4_putreg32(FAR struct stm32l4_tim_dev_s *dev, + uint8_t offset, uint32_t value) { putreg32(value, ((struct stm32l4_tim_priv_s *)dev)->base + offset); } @@ -541,7 +547,8 @@ static void stm32l4_tim_gpioconfig(uint32_t cfg, stm32l4_tim_channel_t mode) * Name: stm32l4_tim_setmode ************************************************************************************/ -static int stm32l4_tim_setmode(FAR struct stm32l4_tim_dev_s *dev, stm32l4_tim_mode_t mode) +static int stm32l4_tim_setmode(FAR struct stm32l4_tim_dev_s *dev, + stm32l4_tim_mode_t mode) { uint16_t val = ATIM_CR1_CEN | ATIM_CR1_ARPE; @@ -611,7 +618,8 @@ static int stm32l4_tim_setmode(FAR struct stm32l4_tim_dev_s *dev, stm32l4_tim_mo * Name: stm32l4_tim_setclock ************************************************************************************/ -static int stm32l4_tim_setclock(FAR struct stm32l4_tim_dev_s *dev, uint32_t freq) +static int stm32l4_tim_setclock(FAR struct stm32l4_tim_dev_s *dev, + uint32_t freq) { uint32_t freqin; int prescaler; @@ -747,8 +755,8 @@ static uint32_t stm32l4_tim_getcounter(FAR struct stm32l4_tim_dev_s *dev) * Name: stm32l4_tim_setchannel ************************************************************************************/ -static int stm32l4_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev, uint8_t channel, - stm32l4_tim_channel_t mode) +static int stm32l4_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev, + uint8_t channel, stm32l4_tim_channel_t mode) { uint16_t ccmr_orig = 0; uint16_t ccmr_val = 0; @@ -1096,8 +1104,8 @@ static int stm32l4_tim_setchannel(FAR struct stm32l4_tim_dev_s *dev, uint8_t cha * Name: stm32l4_tim_setcompare ************************************************************************************/ -static int stm32l4_tim_setcompare(FAR struct stm32l4_tim_dev_s *dev, uint8_t channel, - uint32_t compare) +static int stm32l4_tim_setcompare(FAR struct stm32l4_tim_dev_s *dev, + uint8_t channel, uint32_t compare) { DEBUGASSERT(dev != NULL); @@ -1125,7 +1133,8 @@ static int stm32l4_tim_setcompare(FAR struct stm32l4_tim_dev_s *dev, uint8_t cha * Name: stm32l4_tim_getcapture ************************************************************************************/ -static int stm32l4_tim_getcapture(FAR struct stm32l4_tim_dev_s *dev, uint8_t channel) +static int stm32l4_tim_getcapture(FAR struct stm32l4_tim_dev_s *dev, + uint8_t channel) { DEBUGASSERT(dev != NULL); @@ -1149,8 +1158,8 @@ static int stm32l4_tim_getcapture(FAR struct stm32l4_tim_dev_s *dev, uint8_t cha ************************************************************************************/ static int stm32l4_tim_setisr(FAR struct stm32l4_tim_dev_s *dev, - int (*handler)(int irq, void *context), - int source) + int (*handler)(int irq, FAR void *context), + int source) { int vectorno; @@ -1256,7 +1265,8 @@ static void stm32l4_tim_enableint(FAR struct stm32l4_tim_dev_s *dev, int source) * Name: stm32l4_tim_disableint ************************************************************************************/ -static void stm32l4_tim_disableint(FAR struct stm32l4_tim_dev_s *dev, int source) +static void stm32l4_tim_disableint(FAR struct stm32l4_tim_dev_s *dev, + int source) { DEBUGASSERT(dev != NULL); stm32l4_modifyreg16(dev, STM32L4_BTIM_DIER_OFFSET, ATIM_DIER_UIE, 0); @@ -1386,7 +1396,7 @@ FAR struct stm32l4_tim_dev_s *stm32l4_tim_init(int timer) * ************************************************************************************/ -int stm32l4_tim_deinit(FAR struct stm32l4_tim_dev_s * dev) +int stm32l4_tim_deinit(FAR struct stm32l4_tim_dev_s *dev) { DEBUGASSERT(dev != NULL); diff --git a/arch/arm/src/stm32l4/stm32l4_tim_lowerhalf.c b/arch/arm/src/stm32l4/stm32l4_tim_lowerhalf.c index 7fff996234c..e7d0d72dbd0 100644 --- a/arch/arm/src/stm32l4/stm32l4_tim_lowerhalf.c +++ b/arch/arm/src/stm32l4/stm32l4_tim_lowerhalf.c @@ -144,9 +144,9 @@ static int stm32l4_timer_handler(FAR struct stm32l4_lowerhalf_s *lower); static int stm32l4_start(FAR struct timer_lowerhalf_s *lower); static int stm32l4_stop(FAR struct timer_lowerhalf_s *lower); static int stm32l4_settimeout(FAR struct timer_lowerhalf_s *lower, - uint32_t timeout); + uint32_t timeout); static tccb_t stm32l4_sethandler(FAR struct timer_lowerhalf_s *lower, - tccb_t handler); + tccb_t handler); /**************************************************************************** * Private Data @@ -437,9 +437,9 @@ static int stm32l4_start(FAR struct timer_lowerhalf_s *lower) * ****************************************************************************/ -static int stm32l4_stop(struct timer_lowerhalf_s *lower) +static int stm32l4_stop(FAR struct timer_lowerhalf_s *lower) { - struct stm32l4_lowerhalf_s *priv = (struct stm32l4_lowerhalf_s *)lower; + FAR struct stm32l4_lowerhalf_s *priv = (FAR struct stm32l4_lowerhalf_s *)lower; if (priv->started) { @@ -471,7 +471,8 @@ static int stm32l4_stop(struct timer_lowerhalf_s *lower) * ****************************************************************************/ -static int stm32l4_settimeout(FAR struct timer_lowerhalf_s *lower, uint32_t timeout) +static int stm32l4_settimeout(FAR struct timer_lowerhalf_s *lower, + uint32_t timeout) { FAR struct stm32l4_lowerhalf_s *priv = (FAR struct stm32l4_lowerhalf_s *)lower; uint64_t maxtimeout; @@ -517,7 +518,7 @@ static int stm32l4_settimeout(FAR struct timer_lowerhalf_s *lower, uint32_t time ****************************************************************************/ static tccb_t stm32l4_sethandler(FAR struct timer_lowerhalf_s *lower, - tccb_t newhandler) + tccb_t newhandler) { FAR struct stm32l4_lowerhalf_s *priv = (FAR struct stm32l4_lowerhalf_s *)lower; From 4172016667b5e491ad3a11d11aa2ad7d7aa6dd3d Mon Sep 17 00:00:00 2001 From: Sebastien Lorquet Date: Tue, 12 Jul 2016 01:04:15 +0200 Subject: [PATCH 22/31] revert changes made by greg --- arch/arm/src/stm32l4/stm32l4_otgfsdev.c | 189 +++++++++++------------- 1 file changed, 86 insertions(+), 103 deletions(-) diff --git a/arch/arm/src/stm32l4/stm32l4_otgfsdev.c b/arch/arm/src/stm32l4/stm32l4_otgfsdev.c index 620059f99c6..6d891282c94 100644 --- a/arch/arm/src/stm32l4/stm32l4_otgfsdev.c +++ b/arch/arm/src/stm32l4/stm32l4_otgfsdev.c @@ -468,7 +468,7 @@ struct stm32l4_ctrlreq_s struct stm32l4_req_s { struct usbdev_req_s req; /* Standard USB request */ - FAR struct stm32l4_req_s *flink; /* Supports a singly linked list */ + struct stm32l4_req_s *flink; /* Supports a singly linked list */ }; /* This is the internal representation of an endpoint */ @@ -484,9 +484,9 @@ struct stm32l4_ep_s /* STM32-specific fields */ - FAR struct stm32l4_usbdev_s *dev; /* Reference to private driver data */ - FAR struct stm32l4_req_s *head; /* Request list for this endpoint */ - FAR struct stm32l4_req_s *tail; + struct stm32l4_usbdev_s *dev; /* Reference to private driver data */ + struct stm32l4_req_s *head; /* Request list for this endpoint */ + struct stm32l4_req_s *tail; uint8_t epphy; /* Physical EP address */ uint8_t eptype:2; /* Endpoint type */ uint8_t active:1; /* 1: A request is being processed */ @@ -509,7 +509,7 @@ struct stm32l4_usbdev_s /* The bound device class driver */ - FAR struct usbdevclass_driver_s *driver; + struct usbdevclass_driver_s *driver; /* STM32-specific fields */ @@ -573,14 +573,13 @@ static void stm32l4_putreg(uint32_t val, uint32_t addr); static FAR struct stm32l4_req_s *stm32l4_req_remfirst(FAR struct stm32l4_ep_s *privep); static bool stm32l4_req_addlast(FAR struct stm32l4_ep_s *privep, - FAR struct stm32l4_req_s *req); + FAR struct stm32l4_req_s *req); /* Low level data transfers and request operations *****************************/ /* Special endpoint 0 data transfer logic */ static void stm32l4_ep0in_setupresponse(FAR struct stm32l4_usbdev_s *priv, - FAR uint8_t *data, - uint32_t nbytes); + FAR uint8_t *data, uint32_t nbytes); static inline void stm32l4_ep0in_transmitzlp(FAR struct stm32l4_usbdev_s *priv); static void stm32l4_ep0in_activate(void); @@ -589,61 +588,56 @@ static void stm32l4_ep0out_ctrlsetup(FAR struct stm32l4_usbdev_s *priv); /* IN request and TxFIFO handling */ static void stm32l4_txfifo_write(FAR struct stm32l4_ep_s *privep, - FAR uint8_t *buf, int nbytes); + FAR uint8_t *buf, int nbytes); static void stm32l4_epin_transfer(FAR struct stm32l4_ep_s *privep, - FAR uint8_t *buf, int nbytes); + FAR uint8_t *buf, int nbytes); static void stm32l4_epin_request(FAR struct stm32l4_usbdev_s *priv, - FAR struct stm32l4_ep_s *privep); + FAR struct stm32l4_ep_s *privep); /* OUT request and RxFIFO handling */ static void stm32l4_rxfifo_read(FAR struct stm32l4_ep_s *privep, - FAR uint8_t *dest, uint16_t len); -static void stm32l4_rxfifo_discard(FAR struct stm32l4_ep_s *privep, - int len); + FAR uint8_t *dest, uint16_t len); +static void stm32l4_rxfifo_discard(FAR struct stm32l4_ep_s *privep, int len); static void stm32l4_epout_complete(FAR struct stm32l4_usbdev_s *priv, - FAR struct stm32l4_ep_s *privep); -static inline void stm32l4_ep0out_receive(FAR struct stm32l4_ep_s *privep, - int bcnt); -static inline void stm32l4_epout_receive(FAR struct stm32l4_ep_s *privep, - int bcnt); + FAR struct stm32l4_ep_s *privep); +static inline void stm32l4_ep0out_receive(FAR struct stm32l4_ep_s *privep, int bcnt); +static inline void stm32l4_epout_receive(FAR struct stm32l4_ep_s *privep, int bcnt); static void stm32l4_epout_request(FAR struct stm32l4_usbdev_s *priv, - FAR struct stm32l4_ep_s *privep); + FAR struct stm32l4_ep_s *privep); /* General request handling */ static void stm32l4_ep_flush(FAR struct stm32l4_ep_s *privep); static void stm32l4_req_complete(FAR struct stm32l4_ep_s *privep, - int16_t result); + int16_t result); static void stm32l4_req_cancel(FAR struct stm32l4_ep_s *privep, - int16_t status); + int16_t status); /* Interrupt handling **********************************************************/ static struct stm32l4_ep_s *stm32l4_ep_findbyaddr(struct stm32l4_usbdev_s *priv, - uint16_t eplog); + uint16_t eplog); static int stm32l4_req_dispatch(FAR struct stm32l4_usbdev_s *priv, - FAR const struct usb_ctrlreq_s *ctrl); + FAR const struct usb_ctrlreq_s *ctrl); static void stm32l4_usbreset(FAR struct stm32l4_usbdev_s *priv); /* Second level OUT endpoint interrupt processing */ static inline void stm32l4_ep0out_testmode(FAR struct stm32l4_usbdev_s *priv, - uint16_t index); -static inline void stm32l4_ep0out_stdrequest(FAR struct stm32l4_usbdev_s *priv, - FAR struct stm32l4_ctrlreq_s *ctrlreq); + uint16_t index); +static inline void stm32l4_ep0out_stdrequest(struct stm32l4_usbdev_s *priv, + FAR struct stm32l4_ctrlreq_s *ctrlreq); static inline void stm32l4_ep0out_setup(struct stm32l4_usbdev_s *priv); static inline void stm32l4_epout(FAR struct stm32l4_usbdev_s *priv, - uint8_t epno); + uint8_t epno); static inline void stm32l4_epout_interrupt(FAR struct stm32l4_usbdev_s *priv); /* Second level IN endpoint interrupt processing */ static inline void stm32l4_epin_runtestmode(FAR struct stm32l4_usbdev_s *priv); -static inline void stm32l4_epin(FAR struct stm32l4_usbdev_s *priv, - uint8_t epno); -static inline void stm32l4_epin_txfifoempty(FAR struct stm32l4_usbdev_s *priv, - int epno); +static inline void stm32l4_epin(FAR struct stm32l4_usbdev_s *priv, uint8_t epno); +static inline void stm32l4_epin_txfifoempty(FAR struct stm32l4_usbdev_s *priv, int epno); static inline void stm32l4_epin_interrupt(FAR struct stm32l4_usbdev_s *priv); /* Other second level interrupt processing */ @@ -674,12 +668,11 @@ static void stm32l4_disablegonak(FAR struct stm32l4_ep_s *privep); /* Endpoint configuration */ static int stm32l4_epout_configure(FAR struct stm32l4_ep_s *privep, - uint8_t eptype, uint16_t maxpacket); + uint8_t eptype, uint16_t maxpacket); static int stm32l4_epin_configure(FAR struct stm32l4_ep_s *privep, - uint8_t eptype, uint16_t maxpacket); + uint8_t eptype, uint16_t maxpacket); static int stm32l4_ep_configure(FAR struct usbdev_ep_s *ep, - FAR const struct usb_epdesc_s *desc, - bool last); + FAR const struct usb_epdesc_s *desc, bool last); static void stm32l4_ep0_configure(FAR struct stm32l4_usbdev_s *priv); /* Endpoint disable */ @@ -692,26 +685,24 @@ static int stm32l4_ep_disable(FAR struct usbdev_ep_s *ep); static FAR struct usbdev_req_s *stm32l4_ep_allocreq(FAR struct usbdev_ep_s *ep); static void stm32l4_ep_freereq(FAR struct usbdev_ep_s *ep, - FAR struct usbdev_req_s *); + FAR struct usbdev_req_s *); /* Endpoint buffer management */ #ifdef CONFIG_USBDEV_DMA -static void *stm32l4_ep_allocbuffer(FAR struct usbdev_ep_s *ep, - unsigned bytes); -static void stm32l4_ep_freebuffer(FAR struct usbdev_ep_s *ep, - FAR void *buf); +static void *stm32l4_ep_allocbuffer(FAR struct usbdev_ep_s *ep, unsigned bytes); +static void stm32l4_ep_freebuffer(FAR struct usbdev_ep_s *ep, FAR void *buf); #endif /* Endpoint request submission */ static int stm32l4_ep_submit(FAR struct usbdev_ep_s *ep, - FAR struct usbdev_req_s *req); + struct usbdev_req_s *req); /* Endpoint request cancellation */ static int stm32l4_ep_cancel(FAR struct usbdev_ep_s *ep, - FAR struct usbdev_req_s *req); + struct usbdev_req_s *req); /* Stall handling */ @@ -725,19 +716,18 @@ static void stm32l4_ep0_stall(FAR struct stm32l4_usbdev_s *priv); /* Endpoint allocation */ static FAR struct usbdev_ep_s *stm32l4_ep_alloc(FAR struct usbdev_s *dev, - uint8_t epno, bool in, - uint8_t eptype); + uint8_t epno, bool in, uint8_t eptype); static void stm32l4_ep_free(FAR struct usbdev_s *dev, - FAR struct usbdev_ep_s *ep); + FAR struct usbdev_ep_s *ep); /* USB device controller operations ********************************************/ -static int stm32l4_getframe(FAR struct usbdev_s *dev); -static int stm32l4_wakeup(FAR struct usbdev_s *dev); -static int stm32l4_selfpowered(FAR struct usbdev_s *dev, bool selfpowered); -static int stm32l4_pullup(FAR struct usbdev_s *dev, bool enable); -static void stm32l4_setaddress(FAR struct stm32l4_usbdev_s *priv, - uint16_t address); +static int stm32l4_getframe(struct usbdev_s *dev); +static int stm32l4_wakeup(struct usbdev_s *dev); +static int stm32l4_selfpowered(struct usbdev_s *dev, bool selfpowered); +static int stm32l4_pullup(struct usbdev_s *dev, bool enable); +static void stm32l4_setaddress(struct stm32l4_usbdev_s *priv, + uint16_t address); static int stm32l4_txfifo_flush(uint32_t txfnum); static int stm32l4_rxfifo_flush(void); @@ -1002,7 +992,7 @@ static FAR struct stm32l4_req_s *stm32l4_req_remfirst(FAR struct stm32l4_ep_s *p ****************************************************************************/ static bool stm32l4_req_addlast(FAR struct stm32l4_ep_s *privep, - FAR struct stm32l4_req_s *req) + FAR struct stm32l4_req_s *req) { bool is_empty = !privep->head; @@ -1029,7 +1019,7 @@ static bool stm32l4_req_addlast(FAR struct stm32l4_ep_s *privep, ****************************************************************************/ static void stm32l4_ep0in_setupresponse(FAR struct stm32l4_usbdev_s *priv, - FAR uint8_t *buf, uint32_t nbytes) + FAR uint8_t *buf, uint32_t nbytes) { stm32l4_epin_transfer(&priv->epin[EP0], buf, nbytes); priv->ep0state = EP0STATE_SETUPRESPONSE; @@ -1122,7 +1112,7 @@ static void stm32l4_ep0out_ctrlsetup(FAR struct stm32l4_usbdev_s *priv) ****************************************************************************/ static void stm32l4_txfifo_write(FAR struct stm32l4_ep_s *privep, - FAR uint8_t *buf, int nbytes) + FAR uint8_t *buf, int nbytes) { uint32_t regaddr; uint32_t regval; @@ -1167,7 +1157,7 @@ static void stm32l4_txfifo_write(FAR struct stm32l4_ep_s *privep, ****************************************************************************/ static void stm32l4_epin_transfer(FAR struct stm32l4_ep_s *privep, - FAR uint8_t *buf, int nbytes) + FAR uint8_t *buf, int nbytes) { uint32_t pktcnt; uint32_t regval; @@ -1267,7 +1257,7 @@ static void stm32l4_epin_transfer(FAR struct stm32l4_ep_s *privep, ****************************************************************************/ static void stm32l4_epin_request(FAR struct stm32l4_usbdev_s *priv, - FAR struct stm32l4_ep_s *privep) + FAR struct stm32l4_ep_s *privep) { struct stm32l4_req_s *privreq; uint32_t regaddr; @@ -1487,7 +1477,7 @@ static void stm32l4_epin_request(FAR struct stm32l4_usbdev_s *priv, ****************************************************************************/ static void stm32l4_rxfifo_read(FAR struct stm32l4_ep_s *privep, - FAR uint8_t *dest, uint16_t len) + FAR uint8_t *dest, uint16_t len) { uint32_t regaddr; int i; @@ -1567,9 +1557,9 @@ static void stm32l4_rxfifo_discard(FAR struct stm32l4_ep_s *privep, int len) ****************************************************************************/ static void stm32l4_epout_complete(FAR struct stm32l4_usbdev_s *priv, - FAR struct stm32l4_ep_s *privep) + FAR struct stm32l4_ep_s *privep) { - FAR struct stm32l4_req_s *privreq; + struct stm32l4_req_s *privreq; /* Since a transfer just completed, there must be a read request at the head of * the endpoint request queue. @@ -1615,8 +1605,7 @@ static void stm32l4_epout_complete(FAR struct stm32l4_usbdev_s *priv, * ****************************************************************************/ -static inline void stm32l4_ep0out_receive(FAR struct stm32l4_ep_s *privep, - int bcnt) +static inline void stm32l4_ep0out_receive(FAR struct stm32l4_ep_s *privep, int bcnt) { FAR struct stm32l4_usbdev_s *priv; @@ -1674,11 +1663,10 @@ static inline void stm32l4_ep0out_receive(FAR struct stm32l4_ep_s *privep, * ****************************************************************************/ -static inline void stm32l4_epout_receive(FAR struct stm32l4_ep_s *privep, - int bcnt) +static inline void stm32l4_epout_receive(FAR struct stm32l4_ep_s *privep, int bcnt) { - FAR struct stm32l4_req_s *privreq; - FAR uint8_t *dest; + struct stm32l4_req_s *privreq; + uint8_t *dest; int buflen; int readlen; @@ -1758,9 +1746,9 @@ static inline void stm32l4_epout_receive(FAR struct stm32l4_ep_s *privep, ****************************************************************************/ static void stm32l4_epout_request(FAR struct stm32l4_usbdev_s *priv, - FAR struct stm32l4_ep_s *privep) + FAR struct stm32l4_ep_s *privep) { - FAR struct stm32l4_req_s *privreq; + struct stm32l4_req_s *privreq; uint32_t regaddr; uint32_t regval; uint32_t xfrsize; @@ -1894,7 +1882,7 @@ static void stm32l4_epout_request(FAR struct stm32l4_usbdev_s *priv, * ****************************************************************************/ -static void stm32l4_ep_flush(FAR struct stm32l4_ep_s *privep) +static void stm32l4_ep_flush(struct stm32l4_ep_s *privep) { if (privep->isin) { @@ -1914,8 +1902,7 @@ static void stm32l4_ep_flush(FAR struct stm32l4_ep_s *privep) * ****************************************************************************/ -static void stm32l4_req_complete(FAR struct stm32l4_ep_s *privep, - int16_t result) +static void stm32l4_req_complete(struct stm32l4_ep_s *privep, int16_t result) { FAR struct stm32l4_req_s *privreq; @@ -1955,7 +1942,7 @@ static void stm32l4_req_complete(FAR struct stm32l4_ep_s *privep, * ****************************************************************************/ -static void stm32l4_req_cancel(FAR struct stm32l4_ep_s *privep, int16_t status) +static void stm32l4_req_cancel(struct stm32l4_ep_s *privep, int16_t status) { if (!stm32l4_rqempty(privep)) { @@ -1979,8 +1966,8 @@ static void stm32l4_req_cancel(FAR struct stm32l4_ep_s *privep, int16_t status) * ****************************************************************************/ -static FAR struct stm32l4_ep_s *stm32l4_ep_findbyaddr(FAR struct stm32l4_usbdev_s *priv, - uint16_t eplog) +static struct stm32l4_ep_s *stm32l4_ep_findbyaddr(struct stm32l4_usbdev_s *priv, + uint16_t eplog) { struct stm32l4_ep_s *privep; uint8_t epphy = USB_EPNO(eplog); @@ -2016,8 +2003,8 @@ static FAR struct stm32l4_ep_s *stm32l4_ep_findbyaddr(FAR struct stm32l4_usbdev_ * ****************************************************************************/ -static int stm32l4_req_dispatch(FAR struct stm32l4_usbdev_s *priv, - FAR const struct usb_ctrlreq_s *ctrl) +static int stm32l4_req_dispatch(struct stm32l4_usbdev_s *priv, + const struct usb_ctrlreq_s *ctrl) { int ret = -EIO; @@ -2049,7 +2036,7 @@ static int stm32l4_req_dispatch(FAR struct stm32l4_usbdev_s *priv, * ****************************************************************************/ -static void stm32l4_usbreset(FAR struct stm32l4_usbdev_s *priv) +static void stm32l4_usbreset(struct stm32l4_usbdev_s *priv) { FAR struct stm32l4_ep_s *privep; uint32_t regval; @@ -2148,7 +2135,7 @@ static void stm32l4_usbreset(FAR struct stm32l4_usbdev_s *priv) ****************************************************************************/ static inline void stm32l4_ep0out_testmode(FAR struct stm32l4_usbdev_s *priv, - uint16_t index) + uint16_t index) { uint8_t testmode; @@ -2195,8 +2182,8 @@ static inline void stm32l4_ep0out_testmode(FAR struct stm32l4_usbdev_s *priv, * ****************************************************************************/ -static inline void stm32l4_ep0out_stdrequest(FAR struct stm32l4_usbdev_s *priv, - FAR struct stm32l4_ctrlreq_s *ctrlreq) +static inline void stm32l4_ep0out_stdrequest(struct stm32l4_usbdev_s *priv, + FAR struct stm32l4_ctrlreq_s *ctrlreq) { FAR struct stm32l4_ep_s *privep; @@ -2565,7 +2552,7 @@ static inline void stm32l4_ep0out_stdrequest(FAR struct stm32l4_usbdev_s *priv, * ****************************************************************************/ -static inline void stm32l4_ep0out_setup(FAR struct stm32l4_usbdev_s *priv) +static inline void stm32l4_ep0out_setup(struct stm32l4_usbdev_s *priv) { struct stm32l4_ctrlreq_s ctrlreq; @@ -3875,8 +3862,8 @@ static void stm32l4_disablegonak(FAR struct stm32l4_ep_s *privep) * ****************************************************************************/ -static int stm32l4_epout_configure(FAR struct stm32l4_ep_s *privep, - uint8_t eptype, uint16_t maxpacket) +static int stm32l4_epout_configure(FAR struct stm32l4_ep_s *privep, uint8_t eptype, + uint16_t maxpacket) { uint32_t mpsiz; uint32_t regaddr; @@ -3970,8 +3957,8 @@ static int stm32l4_epout_configure(FAR struct stm32l4_ep_s *privep, * ****************************************************************************/ -static int stm32l4_epin_configure(FAR struct stm32l4_ep_s *privep, - uint8_t eptype, uint16_t maxpacket) +static int stm32l4_epin_configure(FAR struct stm32l4_ep_s *privep, uint8_t eptype, + uint16_t maxpacket) { uint32_t mpsiz; uint32_t regaddr; @@ -4071,8 +4058,8 @@ static int stm32l4_epin_configure(FAR struct stm32l4_ep_s *privep, ****************************************************************************/ static int stm32l4_ep_configure(FAR struct usbdev_ep_s *ep, - FAR const struct usb_epdesc_s *desc, - bool last) + FAR const struct usb_epdesc_s *desc, + bool last) { FAR struct stm32l4_ep_s *privep = (FAR struct stm32l4_ep_s *)ep; uint16_t maxpacket; @@ -4430,8 +4417,7 @@ static void stm32l4_ep_freebuffer(FAR struct usbdev_ep_s *ep, FAR void *buf) * ****************************************************************************/ -static int stm32l4_ep_submit(FAR struct usbdev_ep_s *ep, - FAR struct usbdev_req_s *req) +static int stm32l4_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *req) { FAR struct stm32l4_req_s *privreq = (FAR struct stm32l4_req_s *)req; FAR struct stm32l4_ep_s *privep = (FAR struct stm32l4_ep_s *)ep; @@ -4525,8 +4511,7 @@ static int stm32l4_ep_submit(FAR struct usbdev_ep_s *ep, * ****************************************************************************/ -static int stm32l4_ep_cancel(FAR struct usbdev_ep_s *ep, - FAR struct usbdev_req_s *req) +static int stm32l4_ep_cancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *req) { FAR struct stm32l4_ep_s *privep = (FAR struct stm32l4_ep_s *)ep; irqstate_t flags; @@ -4805,8 +4790,8 @@ static void stm32l4_ep0_stall(FAR struct stm32l4_usbdev_s *priv) ****************************************************************************/ static FAR struct usbdev_ep_s *stm32l4_ep_alloc(FAR struct usbdev_s *dev, - uint8_t eplog, bool in, - uint8_t eptype) + uint8_t eplog, bool in, + uint8_t eptype) { FAR struct stm32l4_usbdev_s *priv = (FAR struct stm32l4_usbdev_s *)dev; uint8_t epavail; @@ -4889,8 +4874,7 @@ static FAR struct usbdev_ep_s *stm32l4_ep_alloc(FAR struct usbdev_s *dev, * ****************************************************************************/ -static void stm32l4_ep_free(FAR struct usbdev_s *dev, - FAR struct usbdev_ep_s *ep) +static void stm32l4_ep_free(FAR struct usbdev_s *dev, FAR struct usbdev_ep_s *ep) { FAR struct stm32l4_usbdev_s *priv = (FAR struct stm32l4_usbdev_s *)dev; FAR struct stm32l4_ep_s *privep = (FAR struct stm32l4_ep_s *)ep; @@ -4916,7 +4900,7 @@ static void stm32l4_ep_free(FAR struct usbdev_s *dev, * ****************************************************************************/ -static int stm32l4_getframe(FAR struct usbdev_s *dev) +static int stm32l4_getframe(struct usbdev_s *dev) { uint32_t regval; @@ -4936,7 +4920,7 @@ static int stm32l4_getframe(FAR struct usbdev_s *dev) * ****************************************************************************/ -static int stm32l4_wakeup(FAR struct usbdev_s *dev) +static int stm32l4_wakeup(struct usbdev_s *dev) { FAR struct stm32l4_usbdev_s *priv = (FAR struct stm32l4_usbdev_s *)dev; uint32_t regval; @@ -4984,7 +4968,7 @@ static int stm32l4_wakeup(FAR struct usbdev_s *dev) * ****************************************************************************/ -static int stm32l4_selfpowered(FAR struct usbdev_s *dev, bool selfpowered) +static int stm32l4_selfpowered(struct usbdev_s *dev, bool selfpowered) { FAR struct stm32l4_usbdev_s *priv = (FAR struct stm32l4_usbdev_s *)dev; @@ -5010,7 +4994,7 @@ static int stm32l4_selfpowered(FAR struct usbdev_s *dev, bool selfpowered) * ****************************************************************************/ -static int stm32l4_pullup(FAR struct usbdev_s *dev, bool enable) +static int stm32l4_pullup(struct usbdev_s *dev, bool enable) { uint32_t regval; @@ -5048,8 +5032,7 @@ static int stm32l4_pullup(FAR struct usbdev_s *dev, bool enable) * ****************************************************************************/ -static void stm32l4_setaddress(FAR struct stm32l4_usbdev_s *priv, - uint16_t address) +static void stm32l4_setaddress(struct stm32l4_usbdev_s *priv, uint16_t address) { uint32_t regval; @@ -5672,7 +5655,7 @@ void up_usbuninitialize(void) * ****************************************************************************/ -int usbdev_register(FAR struct usbdevclass_driver_s *driver) +int usbdev_register(struct usbdevclass_driver_s *driver) { /* At present, there is only a single OTG FS device support. Hence it is * pre-allocated as g_otgfsdev. However, in most code, the private data @@ -5743,7 +5726,7 @@ int usbdev_register(FAR struct usbdevclass_driver_s *driver) * ****************************************************************************/ -int usbdev_unregister(FAR struct usbdevclass_driver_s *driver) +int usbdev_unregister(struct usbdevclass_driver_s *driver) { /* At present, there is only a single OTG FS device support. Hence it is * pre-allocated as g_otgfsdev. However, in most code, the private data From b1740bc5d6909ede533249b6424d8852ca3e66d5 Mon Sep 17 00:00:00 2001 From: Heath Petersen Date: Tue, 12 Jul 2016 05:41:17 +0000 Subject: [PATCH 23/31] fix qemu-i486/ostest/Make.defs test for M32 --- configs/qemu-i486/ostest/Make.defs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/qemu-i486/ostest/Make.defs b/configs/qemu-i486/ostest/Make.defs index 72f26452bb6..e2ac40b09f2 100644 --- a/configs/qemu-i486/ostest/Make.defs +++ b/configs/qemu-i486/ostest/Make.defs @@ -71,7 +71,7 @@ ARCHDEFINES = # Check if building a 32-bit target with a 64-bit toolchain -ifeq ($(ARCH_X86_M32),y) +ifeq ($(CONFIG_ARCH_X86_M32),y) ARCHCPUFLAGS += -m32 endif From 4f75609fa9e7189c4cf7db1d7f517119d00c4953 Mon Sep 17 00:00:00 2001 From: Heath Petersen Date: Tue, 12 Jul 2016 05:43:23 +0000 Subject: [PATCH 24/31] fix qemu-i486/nsh/Make.defs test for M32 --- configs/qemu-i486/nsh/Make.defs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/qemu-i486/nsh/Make.defs b/configs/qemu-i486/nsh/Make.defs index 7f5be321fde..0d16a608b0d 100644 --- a/configs/qemu-i486/nsh/Make.defs +++ b/configs/qemu-i486/nsh/Make.defs @@ -71,7 +71,7 @@ ARCHDEFINES = # Check if building a 32-bit target with a 64-bit toolchain -ifeq ($(ARCH_X86_M32),y) +ifeq ($(CONFIG_ARCH_X86_M32),y) ARCHCPUFLAGS += -m32 endif From dc72e16625480caf7aef29e589265c64de79a35c Mon Sep 17 00:00:00 2001 From: Heath Petersen Date: Tue, 12 Jul 2016 06:50:58 +0000 Subject: [PATCH 25/31] handle when CONFIG_SERIAL_UART_ARCH_IOCTL is not enabled --- drivers/serial/uart_16550.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/serial/uart_16550.c b/drivers/serial/uart_16550.c index 022adf3abe4..b55597bdf12 100644 --- a/drivers/serial/uart_16550.c +++ b/drivers/serial/uart_16550.c @@ -871,14 +871,17 @@ static int u16550_ioctl(struct file *filep, int cmd, unsigned long arg) struct inode *inode = filep->f_inode; struct uart_dev_s *dev = inode->i_private; struct u16550_s *priv = (FAR struct u16550_s *)dev->priv; + int ret; #ifdef CONFIG_SERIAL_UART_ARCH_IOCTL - int ret = uart_ioctl(filep, cmd, arg); + ret = uart_ioctl(filep, cmd, arg); if (ret != -ENOTTY) { return ret; } +#else + ret = OK; #endif switch (cmd) From 38999dfe9d77b56754a03d96c93ddd9e1b5bf5b6 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 12 Jul 2016 09:46:09 -0600 Subject: [PATCH 26/31] Fix two incorrectly named header files --- .../chip/{kinetis_k40memormap.h => kinetis_k40memorymap.h} | 0 .../chip/{kinetis_k60memormap.h => kinetis_k60memorymap.h} | 0 2 files changed, 0 insertions(+), 0 deletions(-) rename arch/arm/src/kinetis/chip/{kinetis_k40memormap.h => kinetis_k40memorymap.h} (100%) rename arch/arm/src/kinetis/chip/{kinetis_k60memormap.h => kinetis_k60memorymap.h} (100%) diff --git a/arch/arm/src/kinetis/chip/kinetis_k40memormap.h b/arch/arm/src/kinetis/chip/kinetis_k40memorymap.h similarity index 100% rename from arch/arm/src/kinetis/chip/kinetis_k40memormap.h rename to arch/arm/src/kinetis/chip/kinetis_k40memorymap.h diff --git a/arch/arm/src/kinetis/chip/kinetis_k60memormap.h b/arch/arm/src/kinetis/chip/kinetis_k60memorymap.h similarity index 100% rename from arch/arm/src/kinetis/chip/kinetis_k60memormap.h rename to arch/arm/src/kinetis/chip/kinetis_k60memorymap.h From 3bc504b68576091163d0d23ff374d1a89da5071a Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 12 Jul 2016 06:58:21 -0600 Subject: [PATCH 27/31] Per comment from David Alession: M_E128 will never be used since it is greater than FLT_MAX. --- libc/math/lib_libexpif.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/libc/math/lib_libexpif.c b/libc/math/lib_libexpif.c index 88dd9dd61ee..1ab9b90f437 100644 --- a/libc/math/lib_libexpif.c +++ b/libc/math/lib_libexpif.c @@ -49,13 +49,16 @@ #define M_E16 (M_E8 * M_E8) #define M_E32 (M_E16 * M_E16) #define M_E64 (M_E32 * M_E32) -#define M_E128 (M_E64 * M_E64) /**************************************************************************** * Private Data ****************************************************************************/ -static const float g_expif_square_tbl[8] = +/* Values above M_E64 will never be used since it’s larger than FLT_MAX + *(3.402823e+38). + */ + +static const float g_expif_square_tbl[7] = { (float)M_E, /* e^1 */ (float)M_E2, /* e^2 */ @@ -64,7 +67,6 @@ static const float g_expif_square_tbl[8] = (float)M_E16, /* e^16 */ (float)M_E32, /* e^32 */ (float)M_E64, /* e^64 */ - (float)M_E128, /* e^128 */ }; /**************************************************************************** @@ -76,7 +78,7 @@ float lib_expif(size_t n) size_t i; float val; - if (n > 128) + if (n >= 128) { return INFINITY_F; } From c8f053de929fe2cbc5e7ed52f0c10f9c63cfb7d4 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 12 Jul 2016 09:34:16 -0600 Subject: [PATCH 28/31] Kinetis Ethernet: Add support for the KSZ8081 PHY --- arch/arm/src/kinetis/Kconfig | 46 +++++---- arch/arm/src/kinetis/kinetis_enet.c | 153 +++++++++++++++++++++------- include/nuttx/net/mii.h | 2 +- 3 files changed, 140 insertions(+), 61 deletions(-) diff --git a/arch/arm/src/kinetis/Kconfig b/arch/arm/src/kinetis/Kconfig index 55a69302110..2e0ff4ae893 100644 --- a/arch/arm/src/kinetis/Kconfig +++ b/arch/arm/src/kinetis/Kconfig @@ -205,19 +205,22 @@ config KINETIS_UART5 config KINETIS_ENET bool "Ethernet" default n - depends on ARCH_FAMILY_K60 - select NET + depends on ARCH_FAMILY_K60 || ARCH_FAMILY_K64 + select ARCH_HAVE_PHY select ARCH_HAVE_NETDEV_STATISTICS + select NET + select NETDEVICES + select NET_MULTIBUFFER ---help--- - Support Ethernet (K60 only) + Support Ethernet (K6x only) config KINETIS_RNGB bool "Random number generator" default n - depends on ARCH_FAMILY_K60 + depends on ARCH_FAMILY_K60 || ARCH_FAMILY_K64 select ARCH_HAVE_RNG ---help--- - Support the random number generator(K60 only) + Support the random number generator(K6x only) config KINETIS_FLEXCAN0 bool "FlexCAN0" @@ -478,7 +481,7 @@ config KINETIS_FTM2_CHANNEL If FTM2 is enabled for PWM usage, you also need specifies the timer output channel {0,..,1} -comment "Kinetis GPIO Interrupt Configuration" +menu "Kinetis GPIO Interrupt Configuration" config GPIO_IRQ bool "GPIO pin interrupts" @@ -513,55 +516,54 @@ config KINETIS_PORTEINTS Enable support for 32 interrupts from GPIO port E pins endif +endmenu # Kinetis GPIO Interrupt Configuration -if KINETIS_ENET +menu "Kinetis Ethernet Configuration" + depends on KINETIS_ENET -comment "Kinetis Ethernet Configuration" - -config ENET_ENHANCEDBD +config KINETIS_ENETENHANCEDBD bool "Use enhanced buffer descriptors" default n ---help--- Use enhanced, 32-byte buffer descriptors -config ENET_NETHIFS +config KINETIS_ENETNETHIFS int "Number of Ethernet interfaces" default 1 ---help--- Number of Ethernet interfaces supported by the hardware. Must be one for now. -config ENET_NRXBUFFERS +config KINETIS_ENETNRXBUFFERS int "Number of Ethernet Rx buffers" default 6 ---help--- Number of Ethernet Rx buffers to use. The size of one buffer is determined by NET_BUFSIZE -config ENET_NTXBUFFERS +config KINETIS_ENETNTXBUFFERS int "Number of Ethernet Tx buffers" default 2 ---help--- Number of Ethernet Tx buffers to use. The size of one buffer is determined by NET_BUFSIZE -config ENET_PHYADDR +config KINETIS_ENETPHYADDR int "PHY address" default 1 ---help--- MII/RMII address of the PHY -config ENET_USEMII +config KINETIS_ENETUSEMII bool "Use MII interface" default n ---help--- The the MII PHY interface. Default: Use RMII interface -endif +endmenu # Kinetis Ethernet Configuration -if KINETIS_SDHC - -comment "Kinetis SDHC Configuration" +menu "Kinetis SDHC Configuration" + depends on KINETIS_SDHC config KINETIS_SDHC_ABSFREQ bool "Custom transfer frequencies" @@ -611,11 +613,13 @@ config KINETIS_SDHC_DMAPRIO ---help--- SDHC DMA priority -endif +endmenu # Kinetis SDHC Configuration -comment "Kinetis UART Configuration" +menu "Kinetis UART Configuration" config KINETIS_UARTFIFOS bool "Enable UART0 FIFO" default n depends on KINETIS_UART0 + +endmenu # Kinetis UART Configuration diff --git a/arch/arm/src/kinetis/kinetis_enet.c b/arch/arm/src/kinetis/kinetis_enet.c index b3364a6bd38..c72c12951b2 100644 --- a/arch/arm/src/kinetis/kinetis_enet.c +++ b/arch/arm/src/kinetis/kinetis_enet.c @@ -76,23 +76,23 @@ * Pre-processor Definitions ****************************************************************************/ -/* CONFIG_ENET_NETHIFS determines the number of physical interfaces +/* CONFIG_KINETIS_ENETNETHIFS determines the number of physical interfaces * that will be supported. */ -#if CONFIG_ENET_NETHIFS != 1 -# error "CONFIG_ENET_NETHIFS must be one for now" +#if CONFIG_KINETIS_ENETNETHIFS != 1 +# error "CONFIG_KINETIS_ENETNETHIFS must be one for now" #endif -#if CONFIG_ENET_NTXBUFFERS < 1 +#if CONFIG_KINETIS_ENETNTXBUFFERS < 1 # error "Need at least one TX buffer" #endif -#if CONFIG_ENET_NRXBUFFERS < 1 +#if CONFIG_KINETIS_ENETNRXBUFFERS < 1 # error "Need at least one RX buffer" #endif -#define NENET_NBUFFERS (CONFIG_ENET_NTXBUFFERS+CONFIG_ENET_NRXBUFFERS) +#define NENET_NBUFFERS (CONFIG_KINETIS_ENETNTXBUFFERS+CONFIG_KINETIS_ENETNRXBUFFERS) #ifndef CONFIG_NET_MULTIBUFFER # error "CONFIG_NET_MULTIBUFFER is required in the configuration" @@ -108,14 +108,47 @@ #define MII_MAXPOLLS (0x1ffff) #define LINK_WAITUS (500*1000) -/* PHY hardware specifics. This was copied from the FreeScale code examples. - * this is a vendor specific register and bit settings. I really should - * do the research and find out what this really is. +/* PHY definitions. + * + * The selected PHY must be selected from the drivers/net/Kconfig PHY menu. + * A description of the PHY must be provided here. That description must + * include: + * + * 1. BOARD_PHY_NAME: A PHY name string (for debug output), + * 2. BOARD_PHYID1 and BOARD_PHYID2: The PHYID1 and PHYID2 values (from + * include/nuttx/net/mii.h) + * 3. BOARD_PHY_STATUS: The address of the status register to use when + * querying link status (from include/nuttx/net/mii.h) + * 4. BOARD_PHY_ISDUPLEX: A macro that can convert the status register + * value into a boolean: true=duplex mode, false=half-duplex mode + * 5. BOARD_PHY_10BASET: A macro that can convert the status register + * value into a boolean: true=10Base-T, false=Not 10Base-T + * 6. BOARD_PHY_100BASET: A macro that can convert the status register + * value into a boolean: true=100Base-T, false=Not 100Base-T + * + * The Tower SER board uses a KSZ8041 PHY. + * The Freedom K64F board uses a KSZ8081 PHY */ -#define PHY_STATUS (0x1f) -#define PHY_DUPLEX_STATUS (4 << 2) -#define PHY_SPEED_STATUS (1 << 2) +#if defined(CONFIG_ETH0_PHY_KSZ8041) +# define BOARD_PHY_NAME "KSZ8041" +# define BOARD_PHYID1 MII_PHYID1_KSZ8041 +# define BOARD_PHYID2 MII_PHYID2_KSZ8041 +# define BOARD_PHY_STATUS MII_KSZ8041_PHYCTRL2 +# define BOARD_PHY_ISDUPLEX(s) (((s) & (4 << MII_PHYCTRL2_MODE_SHIFT)) != 0) +# define BOARD_PHY_10BASET(s) (((s) & (1 << MII_PHYCTRL2_MODE_SHIFT)) != 0) +# define BOARD_PHY_100BASET(s) (((s) & (2 << MII_PHYCTRL2_MODE_SHIFT)) != 0) +#elif defined(CONFIG_ETH0_PHY_KSZ8081) +# define BOARD_PHY_NAME "KSZ8081" +# define BOARD_PHYID1 MII_PHYID1_KSZ8081 +# define BOARD_PHYID2 MII_PHYID2_KSZ8081 +# define BOARD_PHY_STATUS MII_KSZ8081_PHYCTRL2 +# define BOARD_PHY_ISDUPLEX(s) (((s) & (4 << MII_PHYCTRL2_MODE_SHIFT)) != 0) +# define BOARD_PHY_10BASET(s) (((s) & (1 << MII_PHYCTRL2_MODE_SHIFT)) != 0) +# define BOARD_PHY_100BASET(s) (((s) & (2 << MII_PHYCTRL2_MODE_SHIFT)) != 0) +#else +# error "Unrecognized or missing PHY selection" +#endif /* Estimate the hold time to use based on the peripheral (bus) clock: * @@ -188,7 +221,7 @@ struct kinetis_driver_s * Private Data ****************************************************************************/ -static struct kinetis_driver_s g_enet[CONFIG_ENET_NETHIFS]; +static struct kinetis_driver_s g_enet[CONFIG_KINETIS_ENETNETHIFS]; /**************************************************************************** * Private Function Prototypes @@ -222,8 +255,8 @@ static int kinetis_interrupt(int irq, FAR void *context); /* Watchdog timer expirations */ -static void kinetis_polltimer(int argc, uint32_t arg, ...); static void kinetis_txtimeout(int argc, uint32_t arg, ...); +static void kinetis_polltimer(int argc, uint32_t arg, ...); /* NuttX callback functions */ @@ -241,6 +274,10 @@ static int kinetis_ioctl(struct net_driver_s *dev, int cmd, long arg); /* PHY/MII support */ static inline void kinetis_initmii(struct kinetis_driver_s *priv); +static int kinetis_writemii(struct kinetis_driver_s *priv, uint8_t phyaddr, + uint8_t regaddr, uint16_t data); +static int kinetis_readmii(struct kinetis_driver_s *priv, uint8_t phyaddr, + uint8_t regaddr, uint16_t *data); static inline void kinetis_initphy(struct kinetis_driver_s *priv); /* Initialization */ @@ -323,7 +360,7 @@ static bool kinetics_txringfull(FAR struct kinetis_driver_s *priv) */ txnext = priv->txhead + 1; - if (txnext >= CONFIG_ENET_NTXBUFFERS) + if (txnext >= CONFIG_KINETIS_ENETNTXBUFFERS) { txnext = 0; } @@ -375,7 +412,7 @@ static int kinetis_transmit(FAR struct kinetis_driver_s *priv) txdesc = &priv->txdesc[priv->txhead]; priv->txhead++; - if (priv->txhead >= CONFIG_ENET_NTXBUFFERS) + if (priv->txhead >= CONFIG_KINETIS_ENETNTXBUFFERS) { priv->txhead = 0; } @@ -392,7 +429,7 @@ static int kinetis_transmit(FAR struct kinetis_driver_s *priv) */ txdesc->length = kinesis_swap16(priv->dev.d_len); -#ifdef CONFIG_ENET_ENHANCEDBD +#ifdef CONFIG_KINETIS_ENETENHANCEDBD txdesc->bdu = 0x00000000; txdesc->status2 = TXDESC_INT | TXDESC_TS; /* | TXDESC_IINS | TXDESC_PINS; */ #endif @@ -668,7 +705,7 @@ static void kinetis_receive(FAR struct kinetis_driver_s *priv) /* Update the index to the next descriptor */ priv->rxtail++; - if (priv->rxtail >= CONFIG_ENET_NRXBUFFERS) + if (priv->rxtail >= CONFIG_KINETIS_ENETNRXBUFFERS) { priv->rxtail = 0; } @@ -708,7 +745,7 @@ static void kinetis_txdone(FAR struct kinetis_driver_s *priv) /* Yes.. bump up the tail pointer, making space for a new TX descriptor */ priv->txtail++; - if (priv->txtail >= CONFIG_ENET_NTXBUFFERS) + if (priv->txtail >= CONFIG_KINETIS_ENETNTXBUFFERS) { priv->txtail = 0; } @@ -961,7 +998,7 @@ static int kinetis_ifup(struct net_driver_s *dev) /* Select legacy of enhanced buffer descriptor format */ -#ifdef CONFIG_ENET_ENHANCEDBD +#ifdef CONFIG_KINETIS_ENETENHANCEDBD putreg32(ENET_ECR_EN1588, KINETIS_ENET_ECR); #else putreg32(0, KINETIS_ENET_ECR); @@ -1216,7 +1253,7 @@ static int kinetis_ioctl(struct net_driver_s *dev, int cmd, long arg) { struct mii_ioctl_data_s *req = (struct mii_ioctl_data_s *)((uintptr_t)arg); - req->phy_id = CONFIG_ENET_PHYADDR; + req->phy_id = CONFIG_KINETIS_ENETPHYADDR; ret = OK; } break; @@ -1424,13 +1461,41 @@ static inline void kinetis_initphy(struct kinetis_driver_s *priv) { usleep(LINK_WAITUS); phydata = 0xffff; - kinetis_readmii(priv, CONFIG_ENET_PHYADDR, MII_PHYID1, &phydata); + kinetis_readmii(priv, CONFIG_KINETIS_ENETPHYADDR, MII_PHYID1, &phydata); } while (phydata == 0xffff); +#if CONFIG_DEBUG_NET_ERROR + /* Verify PHYID1. Compare OUI bits 3-18 */ + + ninfo("%s: PHYID1: %04x\n", BOARD_PHY_NAME, phydata); + if (phydata != BOARD_PHYID1) + { + nerr("ERROR: PHYID1=%04x incorrect for %s. Expected %04x\n", + phydata, BOARD_PHY_NAME, BOARD_PHYID1); + } + else + { + /* Read PHYID2 */ + + kinetis_readmii(priv, CONFIG_KINETIS_ENETPHYADDR, MII_PHYID2, &phydata); + ninfo("%s: PHYID2: %04x\n", BOARD_PHY_NAME, phydata); + + /* Verify PHYID2: Compare OUI bits 19-24 and the 6-bit model number + * (ignoring the 4-bit revision number). + */ + + if ((phydata & 0xfff0) != (BOARD_PHYID2 & 0xfff0)) + { + nerr("ERROR: PHYID2=%04x incorrect for %s. Expected %04x\n", + (phydata & 0xfff0), BOARD_PHY_NAME, (BOARD_PHYID2 & 0xfff0)); + } + } +#endif + /* Start auto negotiation */ - kinetis_writemii(priv, CONFIG_ENET_PHYADDR, MII_MCR, + kinetis_writemii(priv, CONFIG_KINETIS_ENETPHYADDR, MII_MCR, (MII_MCR_ANRESTART | MII_MCR_ANENABLE)); /* Wait (potentially forever) for auto negotiation to complete */ @@ -1438,21 +1503,24 @@ static inline void kinetis_initphy(struct kinetis_driver_s *priv) do { usleep(LINK_WAITUS); - kinetis_readmii(priv, CONFIG_ENET_PHYADDR, MII_MSR, &phydata); - + kinetis_readmii(priv, CONFIG_KINETIS_ENETPHYADDR, MII_MSR, &phydata); } while ((phydata & MII_MSR_ANEGCOMPLETE) == 0); + ninfo("%s: MII_MSR: %04x\n", BOARD_PHY_NAME, phydata); + /* When we get here we have a link - Find the negotiated speed and duplex. */ phydata = 0; - kinetis_readmii(priv, CONFIG_ENET_PHYADDR, PHY_STATUS, &phydata); + kinetis_readmii(priv, CONFIG_KINETIS_ENETPHYADDR, BOARD_PHY_STATUS, &phydata); + + ninfo("%s: BOARD_PHY_STATUS: %04x\n", BOARD_PHY_NAME, phydata); /* Set up the transmit and receive control registers based on the * configuration and the auto negotiation results. */ -#ifdef CONFIG_ENET_USEMII +#ifdef CONFIG_KINETIS_ENETUSEMII rcr = ENET_RCR_MII_MODE | ENET_RCR_CRCFWD | CONFIG_NET_ETH_MTU << ENET_RCR_MAX_FL_SHIFT | ENET_RCR_MII_MODE; @@ -1468,7 +1536,7 @@ static inline void kinetis_initphy(struct kinetis_driver_s *priv) /* Setup half or full duplex */ - if ((phydata & PHY_DUPLEX_STATUS) != 0) + if (BOARD_PHY_ISDUPLEX(phydata)) { /* Full duplex */ @@ -1481,12 +1549,17 @@ static inline void kinetis_initphy(struct kinetis_driver_s *priv) rcr |= ENET_RCR_DRT; } - if ((phydata & PHY_SPEED_STATUS) != 0) + if (BOARD_PHY_10BASET(phydata)) { /* 10Mbps */ rcr |= ENET_RCR_RMII_10T; } + else if (!BOARD_PHY_100BASET(phydata)) + { + nerr("ERROR: Neither 10- nor 100-BaseT reported: PHY STATUS=%04x\n", + phydata); + } putreg32(rcr, KINETIS_ENET_RCR); putreg32(tcr, KINETIS_ENET_TCR); @@ -1520,7 +1593,7 @@ static void kinetis_initbuffers(struct kinetis_driver_s *priv) /* Get an aligned RX descriptor (array) address */ - addr += CONFIG_ENET_NTXBUFFERS * sizeof(struct enet_desc_s); + addr += CONFIG_KINETIS_ENETNTXBUFFERS * sizeof(struct enet_desc_s); priv->rxdesc = (struct enet_desc_s *)addr; /* Get the beginning of the first aligned buffer */ @@ -1529,12 +1602,12 @@ static void kinetis_initbuffers(struct kinetis_driver_s *priv) /* Then fill in the TX descriptors */ - for (i = 0; i < CONFIG_ENET_NTXBUFFERS; i++) + for (i = 0; i < CONFIG_KINETIS_ENETNTXBUFFERS; i++) { priv->txdesc[i].status1 = 0; priv->txdesc[i].length = 0; priv->txdesc[i].data = (uint8_t *)kinesis_swap32((uint32_t)addr); -#ifdef CONFIG_ENET_ENHANCEDBD +#ifdef CONFIG_KINETIS_ENETENHANCEDBD priv->txdesc[i].status2 = TXDESC_IINS | TXDESC_PINS; #endif addr += KINETIS_BUF_SIZE; @@ -1542,12 +1615,12 @@ static void kinetis_initbuffers(struct kinetis_driver_s *priv) /* Then fill in the RX descriptors */ - for (i = 0; i < CONFIG_ENET_NRXBUFFERS; i++) + for (i = 0; i < CONFIG_KINETIS_ENETNRXBUFFERS; i++) { priv->rxdesc[i].status1 = RXDESC_E; priv->rxdesc[i].length = 0; priv->rxdesc[i].data = (uint8_t *)kinesis_swap32((uint32_t)addr); -#ifdef CONFIG_ENET_ENHANCEDBD +#ifdef CONFIG_KINETIS_ENETENHANCEDBD priv->rxdesc[i].bdu = 0; priv->rxdesc[i].status2 = RXDESC_INT; #endif @@ -1556,8 +1629,8 @@ static void kinetis_initbuffers(struct kinetis_driver_s *priv) /* Set the wrap bit in the last descriptors to form a ring */ - priv->txdesc[CONFIG_ENET_NTXBUFFERS-1].status1 |= TXDESC_W; - priv->rxdesc[CONFIG_ENET_NRXBUFFERS-1].status1 |= RXDESC_W; + priv->txdesc[CONFIG_KINETIS_ENETNTXBUFFERS-1].status1 |= TXDESC_W; + priv->rxdesc[CONFIG_KINETIS_ENETNRXBUFFERS-1].status1 |= RXDESC_W; /* We start with RX descriptor 0 and with no TX descriptors in use */ @@ -1631,7 +1704,7 @@ int kinetis_netinitialize(int intf) /* Get the interface structure associated with this interface number. */ - DEBUGASSERT(intf < CONFIG_ENET_NETHIFS); + DEBUGASSERT(intf < CONFIG_KINETIS_ENETNETHIFS); priv = &g_enet[intf]; /* Enable the ENET clock */ @@ -1646,9 +1719,9 @@ int kinetis_netinitialize(int intf) putreg32(0, KINETIS_MPU_CESR); +#ifdef CONFIG_KINETIS_ENETUSEMII /* Configure all ENET/MII pins */ -#ifdef CONFIG_ENET_USEMII kinetis_pinconfig(PIN_MII0_MDIO); kinetis_pinconfig(PIN_MII0_MDC); kinetis_pinconfig(PIN_MII0_RXDV); @@ -1668,6 +1741,8 @@ int kinetis_netinitialize(int intf) kinetis_pinconfig(PIN_MII0_CRS); kinetis_pinconfig(PIN_MII0_COL); #else + /* Use RMII subset */ + kinetis_pinconfig(PIN_RMII0_MDIO); kinetis_pinconfig(PIN_RMII0_MDC); kinetis_pinconfig(PIN_RMII0_CRS_DV); @@ -1773,7 +1848,7 @@ int kinetis_netinitialize(int intf) * ****************************************************************************/ -#if CONFIG_ENET_NETHIFS == 1 +#if CONFIG_KINETIS_ENETNETHIFS == 1 void up_netinitialize(void) { (void)kinetis_netinitialize(0); diff --git a/include/nuttx/net/mii.h b/include/nuttx/net/mii.h index 9d10beb32f2..d595202738b 100644 --- a/include/nuttx/net/mii.h +++ b/include/nuttx/net/mii.h @@ -547,7 +547,7 @@ #define MII_KSZ80x1_INT_LU (1 << 0) /* Link up interrupt */ /* KSZ8041 Register 0x1e: PHY Control 1 -- To be provided */ -/* KSZ8041 Register 0x1e: PHY Control 2 */ +/* KSZ8041 Register 0x1f: PHY Control 2 */ #define MII_PHYCTRL2_MDIX (1 << 15) /* Bit 15: Micrel/HP MDI/MDI-X state */ #define MII_PHYCTRL2_MDIX_SEL (1 << 14) /* Bit 14: MDI/MDI-X select */ From de3b8d85a42190b3e0c91c132267e164e9c523e0 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 12 Jul 2016 09:40:49 -0600 Subject: [PATCH 29/31] Freedom K64F: Add a networking NSH configuration. --- configs/freedom-k64f/README.txt | 33 +- configs/freedom-k64f/netnsh/Make.defs | 111 +++ configs/freedom-k64f/netnsh/defconfig | 1142 +++++++++++++++++++++++++ configs/freedom-k64f/netnsh/setenv.sh | 77 ++ 4 files changed, 1362 insertions(+), 1 deletion(-) create mode 100644 configs/freedom-k64f/netnsh/Make.defs create mode 100644 configs/freedom-k64f/netnsh/defconfig create mode 100644 configs/freedom-k64f/netnsh/setenv.sh diff --git a/configs/freedom-k64f/README.txt b/configs/freedom-k64f/README.txt index 87519c37fae..cfdac464d11 100644 --- a/configs/freedom-k64f/README.txt +++ b/configs/freedom-k64f/README.txt @@ -13,6 +13,9 @@ Contents o Ethernet o Development Environment o GNU Toolchain Options + o Freedom K64F Configuration Options + o Configurations + o Status Kinetis Freedom K64F Features: ============================= @@ -380,6 +383,23 @@ can be selected as follow: Where is one of the following: + netnsh: + ------ + This configuration is identical to the nsh configuration described + below except that networking support is enabled. + + NOTES: + + 1. Most of the notes associated with the nsh configuration apply here + as well (see below). + + 2. Default platform/toolchain: + + CONFIG_HOST_WINDOWS=y : Cygwin under Windows + CONFIG_WINDOWS_CYGWIN=y + CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : ARM/mbed toolcahin (arm-none-elf-gcc) + CONFIG_INTELHEX_BINARY=y : Output formats: Intel hex binary + nsh: --- Configures the NuttShell (nsh) located at apps/examples/nsh using a @@ -401,7 +421,7 @@ Where is one of the following: CONFIG_HOST_LINUX=y : Linux (Cygwin under Windows okay too). CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y : Buildroot (arm-nuttx-elf-gcc) CONFIG_ARMV7M_OABI_TOOLCHAIN=y : The older OABI version - CONFIG_RAW_BINARY=y : Output formats: ELF and raw binary + CONFIG_INTELHEX_BINARY=y : Output formats: Intel hex binary 3. The Serial Console is provided on UART3 with the correct pin configuration for use with an Arduino Serial Shield. @@ -426,3 +446,14 @@ Where is one of the following: CONFIG_SCHED_WORKQUEUE=y : Enable the NuttX workqueue CONFIG_NSH_ARCHINIT=y : Provide NSH initializeation logic + +Status +====== + + 2016-07-11: Received hardware today and the board came up on the very + first try. That does not happen often. At this point, the very basic + NSH configuration is working and LEDs are working. The only odd + behavior that I see is that pressing SW3 causes an unexpected interrupt + error. + 2016-07-12: Added support for the KSZ8081 PHY and added the netnsh + configuration. Untested as of this writing. diff --git a/configs/freedom-k64f/netnsh/Make.defs b/configs/freedom-k64f/netnsh/Make.defs new file mode 100644 index 00000000000..81ee818d815 --- /dev/null +++ b/configs/freedom-k64f/netnsh/Make.defs @@ -0,0 +1,111 @@ +############################################################################ +# configs/freedom-k64f/netnsh/Make.defs +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/flash.ld}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/flash.ld +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/freedom-k64f/netnsh/defconfig b/configs/freedom-k64f/netnsh/defconfig new file mode 100644 index 00000000000..0cb2657d581 --- /dev/null +++ b/configs/freedom-k64f/netnsh/defconfig @@ -0,0 +1,1142 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +CONFIG_MOTOROLA_SREC=y +# CONFIG_RAW_BINARY is not set +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG_ALERT=y +# CONFIG_DEBUG_FEATURES is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_DEBUG_SYMBOLS=y +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +CONFIG_ARCH_CHIP_KINETIS=y +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="kinetis" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set +# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW is not set +# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y +# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set + +# +# Kinetis Configuration Options +# +# CONFIG_ARCH_CHIP_MK20DN32VLH5 is not set +# CONFIG_ARCH_CHIP_MK20DX32VLH5 is not set +# CONFIG_ARCH_CHIP_MK20DN64VLH5 is not set +# CONFIG_ARCH_CHIP_MK20DX64VLH5 is not set +# CONFIG_ARCH_CHIP_MK20DN128VLH5 is not set +# CONFIG_ARCH_CHIP_MK20DX128VLH5 is not set +# CONFIG_ARCH_CHIP_MK20DX64VLH7 is not set +# CONFIG_ARCH_CHIP_MK20DX128VLH7 is not set +# CONFIG_ARCH_CHIP_MK20DX256VLH7 is not set +# CONFIG_ARCH_CHIP_MK40N512VLQ100 is not set +# CONFIG_ARCH_CHIP_MK40N512VMD100 is not set +# CONFIG_ARCH_CHIP_MK40X128VLQ100 is not set +# CONFIG_ARCH_CHIP_MK40X128VMD100 is not set +# CONFIG_ARCH_CHIP_MK40X256VLQ100 is not set +# CONFIG_ARCH_CHIP_MK40X256VMD100 is not set +# CONFIG_ARCH_CHIP_MK60N256VLQ100 is not set +# CONFIG_ARCH_CHIP_MK60N256VMD100 is not set +# CONFIG_ARCH_CHIP_MK60N512VLL100 is not set +# CONFIG_ARCH_CHIP_MK60N512VLQ100 is not set +# CONFIG_ARCH_CHIP_MK60N512VMD100 is not set +# CONFIG_ARCH_CHIP_MK60X256VLQ100 is not set +# CONFIG_ARCH_CHIP_MK60X256VMD100 is not set +CONFIG_ARCH_CHIP_MK64FN1M0VLL12=y +# CONFIG_ARCH_CHIP_MK64FX512VLL12 is not set +# CONFIG_ARCH_CHIP_MK64FX512VDC12 is not set +# CONFIG_ARCH_CHIP_MK64FN1M0VDC12 is not set +# CONFIG_ARCH_CHIP_MK64FX512VLQ12 is not set +# CONFIG_ARCH_CHIP_MK64FX512VMD12 is not set +# CONFIG_ARCH_CHIP_MK64FN1M0VMD12 is not set +# CONFIG_ARCH_FAMILY_K20 is not set +# CONFIG_ARCH_FAMILY_K40 is not set +# CONFIG_ARCH_FAMILY_K60 is not set +CONFIG_ARCH_FAMILY_K64=y + +# +# Kinetis Peripheral Support +# +# CONFIG_KINETIS_TRACE is not set +# CONFIG_KINETIS_FLEXBUS is not set +# CONFIG_KINETIS_UART0 is not set +# CONFIG_KINETIS_UART1 is not set +# CONFIG_KINETIS_UART2 is not set +CONFIG_KINETIS_UART3=y +# CONFIG_KINETIS_UART4 is not set +# CONFIG_KINETIS_UART5 is not set +CONFIG_KINETIS_ENET=y +# CONFIG_KINETIS_RNGB is not set +# CONFIG_KINETIS_FLEXCAN0 is not set +# CONFIG_KINETIS_FLEXCAN1 is not set +# CONFIG_KINETIS_SPI0 is not set +# CONFIG_KINETIS_SPI1 is not set +# CONFIG_KINETIS_SPI2 is not set +# CONFIG_KINETIS_I2C0 is not set +# CONFIG_KINETIS_I2C1 is not set +# CONFIG_KINETIS_I2S is not set +# CONFIG_KINETIS_DAC0 is not set +# CONFIG_KINETIS_DAC1 is not set +# CONFIG_KINETIS_ADC0 is not set +# CONFIG_KINETIS_ADC1 is not set +# CONFIG_KINETIS_CMP is not set +# CONFIG_KINETIS_VREF is not set +# CONFIG_KINETIS_SDHC is not set +# CONFIG_KINETIS_FTM0 is not set +# CONFIG_KINETIS_FTM1 is not set +# CONFIG_KINETIS_FTM2 is not set +# CONFIG_KINETIS_LPTIMER is not set +# CONFIG_KINETIS_RTC is not set +# CONFIG_KINETIS_EWM is not set +# CONFIG_KINETIS_CMT is not set +# CONFIG_KINETIS_USBOTG is not set +# CONFIG_KINETIS_USBDCD is not set +# CONFIG_KINETIS_LLWU is not set +# CONFIG_KINETIS_TSI is not set +# CONFIG_KINETIS_FTFL is not set +# CONFIG_KINETIS_DMA is not set +# CONFIG_KINETIS_CRC is not set +# CONFIG_KINETIS_PDB is not set +# CONFIG_KINETIS_PIT is not set + +# +# Kinetis GPIO Interrupt Configuration +# +# CONFIG_GPIO_IRQ is not set + +# +# Kinetis Ethernet Configuration +# +# CONFIG_KINETIS_ENETENHANCEDBD is not set +CONFIG_KINETIS_ENETNETHIFS=1 +CONFIG_KINETIS_ENETNRXBUFFERS=6 +CONFIG_KINETIS_ENETNTXBUFFERS=2 +CONFIG_KINETIS_ENETPHYADDR=1 +# CONFIG_KINETIS_ENETUSEMII is not set + +# +# Kinetis UART Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +CONFIG_ARCH_RAMFUNCS=y +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=9535 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x1fff0000 +CONFIG_RAM_SIZE=131072 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_FREEDOM_K64F=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="freedom-k64f" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +# CONFIG_ARCH_BUTTONS is not set +CONFIG_ARCH_HAVE_IRQBUTTONS=y + +# +# Board-Specific Options +# +# CONFIG_BOARD_CRASHDUMP is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=25 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set + +# +# IO Expander/GPIO Support +# +# CONFIG_IOEXPANDER is not set +# CONFIG_DEV_GPIO is not set + +# +# LCD Driver Support +# +# CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_NCP5623C is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +CONFIG_NETDEVICES=y + +# +# General Ethernet MAC Driver Options +# +# CONFIG_NETDEV_LOOPBACK is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 +# CONFIG_NETDEV_MULTINIC is not set +CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y +CONFIG_NETDEV_STATISTICS=y +# CONFIG_NETDEV_LATEINIT is not set + +# +# External Ethernet MAC Device Support +# +# CONFIG_NET_DM90x0 is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ENCX24J600 is not set +# CONFIG_NET_E1000 is not set +# CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set +# CONFIG_NET_VNET is not set + +# +# External Ethernet PHY Device Support +# +# CONFIG_ARCH_PHY_INTERRUPT is not set +# CONFIG_ETH0_PHY_NONE is not set +# CONFIG_ETH0_PHY_AM79C874 is not set +# CONFIG_ETH0_PHY_KS8721 is not set +# CONFIG_ETH0_PHY_KSZ8041 is not set +# CONFIG_ETH0_PHY_KSZ8051 is not set +# CONFIG_ETH0_PHY_KSZ8061 is not set +CONFIG_ETH0_PHY_KSZ8081=y +# CONFIG_ETH0_PHY_KSZ90x1 is not set +# CONFIG_ETH0_PHY_DP83848C is not set +# CONFIG_ETH0_PHY_LAN8720 is not set +# CONFIG_ETH0_PHY_LAN8740 is not set +# CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set +# CONFIG_ETH0_PHY_DM9161 is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_SERIAL_REMOVABLE is not set +CONFIG_SERIAL_CONSOLE=y +# CONFIG_16550_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +CONFIG_UART3_SERIALDRIVER=y +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART3_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART3 Configuration +# +CONFIG_UART3_RXBUFSIZE=256 +CONFIG_UART3_TXBUFSIZE=256 +CONFIG_UART3_BAUD=115200 +CONFIG_UART3_BITS=8 +CONFIG_UART3_PARITY=0 +CONFIG_UART3_2STOP=0 +# CONFIG_UART3_IFLOWCONTROL is not set +# CONFIG_UART3_OFLOWCONTROL is not set +# CONFIG_UART3_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_HAVE_USBTRACE is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging +# +# CONFIG_ARCH_SYSLOG is not set +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_INTBUFFER is not set +# CONFIG_SYSLOG_TIMESTAMP is not set +CONFIG_SYSLOG_SERIAL_CONSOLE=y +# CONFIG_SYSLOG_CHAR is not set +CONFIG_SYSLOG_CONSOLE=y +# CONFIG_SYSLOG_NONE is not set +# CONFIG_SYSLOG_FILE is not set +# CONFIG_SYSLOG_CHARDEV is not set + +# +# Networking Support +# +CONFIG_ARCH_HAVE_NET=y +CONFIG_ARCH_HAVE_PHY=y +CONFIG_NET=y +# CONFIG_NET_NOINTS is not set +# CONFIG_NET_PROMISCUOUS is not set + +# +# Driver buffer configuration +# +CONFIG_NET_MULTIBUFFER=y +CONFIG_NET_ETH_MTU=590 +CONFIG_NET_ETH_TCP_RECVWNDO=536 +CONFIG_NET_GUARDSIZE=2 + +# +# Data link support +# +# CONFIG_NET_MULTILINK is not set +CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set + +# +# Network Device Operations +# +CONFIG_NETDEV_PHY_IOCTL=y + +# +# Internet Protocol Selection +# +CONFIG_NET_IPv4=y +# CONFIG_NET_IPv6 is not set + +# +# Socket Support +# +CONFIG_NSOCKET_DESCRIPTORS=8 +CONFIG_NET_NACTIVESOCKETS=16 +CONFIG_NET_SOCKOPTS=y +# CONFIG_NET_SOLINGER is not set + +# +# Raw Socket Support +# +# CONFIG_NET_PKT is not set + +# +# Unix Domain Socket Support +# +# CONFIG_NET_LOCAL is not set + +# +# TCP/IP Networking +# +CONFIG_NET_TCP=y +# CONFIG_NET_TCPURGDATA is not set +CONFIG_NET_TCP_CONNS=8 +CONFIG_NET_MAX_LISTENPORTS=20 +CONFIG_NET_TCP_READAHEAD=y +CONFIG_NET_TCP_WRITE_BUFFERS=y +CONFIG_NET_TCP_NWRBCHAINS=8 +CONFIG_NET_TCP_RECVDELAY=0 +CONFIG_NET_TCPBACKLOG=y +# CONFIG_NET_SENDFILE is not set + +# +# UDP Networking +# +CONFIG_NET_UDP=y +# CONFIG_NET_UDP_CHECKSUMS is not set +CONFIG_NET_UDP_CONNS=8 +CONFIG_NET_BROADCAST=y +# CONFIG_NET_RXAVAIL is not set +CONFIG_NET_UDP_READAHEAD=y + +# +# ICMP Networking Support +# +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_PING=y + +# +# IGMPv2 Client Support +# +# CONFIG_NET_IGMP is not set + +# +# ARP Configuration +# +CONFIG_NET_ARP=y +CONFIG_NET_ARPTAB_SIZE=16 +CONFIG_NET_ARP_MAXAGE=120 +# CONFIG_NET_ARP_IPIN is not set +CONFIG_NET_ARP_SEND=y +CONFIG_ARP_SEND_MAXTRIES=5 +CONFIG_ARP_SEND_DELAYMSEC=20 + +# +# Network I/O Buffer Support +# +CONFIG_NET_IOB=y +CONFIG_IOB_NBUFFERS=36 +CONFIG_IOB_BUFSIZE=196 +CONFIG_IOB_NCHAINS=8 +CONFIG_IOB_THROTTLE=8 +# CONFIG_NET_ARCH_INCR32 is not set +# CONFIG_NET_ARCH_CHKSUM is not set +CONFIG_NET_STATISTICS=y + +# +# Routing Table Configuration +# +# CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="Freedom-K64F" + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +CONFIG_FS_WRITABLE=y +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +CONFIG_FS_FAT=y +# CONFIG_FAT_LCNAMES is not set +# CONFIG_FAT_LFN is not set +# CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set +# CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set +# CONFIG_NFS is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_LIBC_TMPDIR="/tmp" +CONFIG_LIBC_MAX_TMPFILE=32 +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=8 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETDB_RESOLVCONF is not set +# CONFIG_NETDB_DNSSERVER_NOADDR is not set +CONFIG_NETDB_DNSSERVER_IPv4=y +CONFIG_NETDB_DNSSERVER_IPv4ADDR=0x0a000001 + +# +# Non-standard Library Support +# +# CONFIG_LIB_CRC64_FAST is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set +# CONFIG_LIB_HEX2BIN is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NETTEST is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_UDP is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_WGET is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set +# CONFIG_NETUTILS_SMTP is not set +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_TFTPC=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" +CONFIG_WEBCLIENT_TIMEOUT=10 +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_XMLRPC is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFATFS is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PING is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ARCHINIT is not set + +# +# Networking Configuration +# +CONFIG_NSH_NETINIT=y +CONFIG_NSH_NETINIT_THREAD=y +CONFIG_NSH_NETINIT_THREAD_STACKSIZE=1568 +CONFIG_NSH_NETINIT_THREAD_PRIORITY=80 + +# +# IP Address Configuration +# + +# +# IPv4 Addresses +# +CONFIG_NSH_IPADDR=0x0a000002 +CONFIG_NSH_DRIPADDR=0x0a000001 +CONFIG_NSH_NETMASK=0xffffff00 +# CONFIG_NSH_DNS is not set +CONFIG_NSH_NOMAC=y +CONFIG_NSH_SWMAC=y +CONFIG_NSH_MACADDR=0x00e0deadbeef +CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set +# CONFIG_NSH_TELNET_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_MDIO is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/freedom-k64f/netnsh/setenv.sh b/configs/freedom-k64f/netnsh/setenv.sh new file mode 100644 index 00000000000..c07c4f16079 --- /dev/null +++ b/configs/freedom-k64f/netnsh/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/freedom-k64f/netnsh/setenv.sh +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the path to the location where I installed the devkitARM toolchain +# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/ +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" From 96edfdb4c7ef2cc2a19981375513d23b484989e5 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 12 Jul 2016 09:50:32 -0600 Subject: [PATCH 30/31] libm: Fix/improve range checks in lib_expi() and lib_expif(). --- libc/math/lib_libexpi.c | 10 +++++----- libc/math/lib_libexpif.c | 8 +++++--- 2 files changed, 10 insertions(+), 8 deletions(-) diff --git a/libc/math/lib_libexpi.c b/libc/math/lib_libexpi.c index bcb56221300..3cd5f8f6d75 100644 --- a/libc/math/lib_libexpi.c +++ b/libc/math/lib_libexpi.c @@ -52,13 +52,12 @@ #define M_E128 (M_E64 * M_E64) #define M_E256 (M_E128 * M_E128) #define M_E512 (M_E256 * M_E256) -#define M_E1024 (M_E512 * M_E512) /**************************************************************************** * Private Data ****************************************************************************/ -static const double g_expi_square_tbl[11] = +static const double g_expi_square_tbl[] = { M_E, /* e^1 */ M_E2, /* e^2 */ @@ -69,8 +68,7 @@ static const double g_expi_square_tbl[11] = M_E64, /* e^64 */ M_E128, /* e^128 */ M_E256, /* e^256 */ - M_E512, /* e^512 */ - M_E1024, /* e^1024 */ + M_E512 /* e^512 */ }; /**************************************************************************** @@ -82,7 +80,9 @@ double lib_expi(size_t n) size_t i; double val; - if (n > 1024) + /* The largest calculable value for n is floor(ln(DBL_MAX)) */ + + if (n > 709) { return INFINITY; } diff --git a/libc/math/lib_libexpif.c b/libc/math/lib_libexpif.c index 1ab9b90f437..22c60f48d13 100644 --- a/libc/math/lib_libexpif.c +++ b/libc/math/lib_libexpif.c @@ -58,7 +58,7 @@ *(3.402823e+38). */ -static const float g_expif_square_tbl[7] = +static const float g_expif_square_tbl[] = { (float)M_E, /* e^1 */ (float)M_E2, /* e^2 */ @@ -66,7 +66,7 @@ static const float g_expif_square_tbl[7] = (float)M_E8, /* e^8 */ (float)M_E16, /* e^16 */ (float)M_E32, /* e^32 */ - (float)M_E64, /* e^64 */ + (float)M_E64 /* e^64 */ }; /**************************************************************************** @@ -78,7 +78,9 @@ float lib_expif(size_t n) size_t i; float val; - if (n >= 128) + /* The largest calculable value for n is floor(ln(FLT_MAX)) */ + + if (n > 88) { return INFINITY_F; } From 0d41a1cd42cf2c168d2f54c0a51cb0e0734bfadc Mon Sep 17 00:00:00 2001 From: Sebastien Lorquet Date: Tue, 12 Jul 2016 10:34:03 -0600 Subject: [PATCH 31/31] Before accessing the sst26 flash, the "Global Unlock" command must me executed, which I do in the sst26 driver. BUT. re-reading the datasheet, the WREN instruction is required to enable the execution of this command. This was not done. I have no idea how the driver currently works except by chance. The writes should never happen at all, the flash is half-enabled! --- drivers/mtd/sst26.c | 27 +++++++++++++++++++++++++-- 1 file changed, 25 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/sst26.c b/drivers/mtd/sst26.c index 51888da063b..27648ae91a2 100644 --- a/drivers/mtd/sst26.c +++ b/drivers/mtd/sst26.c @@ -245,6 +245,7 @@ static inline void sst26_unlock(FAR struct spi_dev_s *dev); static inline int sst26_readid(struct sst26_dev_s *priv); static void sst26_waitwritecomplete(struct sst26_dev_s *priv); static void sst26_writeenable(struct sst26_dev_s *priv); +static void sst26_writedisable(struct sst26_dev_s *priv); static void sst26_globalunlock(struct sst26_dev_s *priv); static inline void sst26_sectorerase(struct sst26_dev_s *priv, off_t offset, uint8_t type); static inline int sst26_chiperase(struct sst26_dev_s *priv); @@ -427,7 +428,7 @@ static void sst26_globalunlock(struct sst26_dev_s *priv) SPI_SELECT(priv->dev, SPIDEV_FLASH, true); - /* Send "Write Enable (WREN)" command */ + /* Send "Global Unlock (ULBPR)" command */ (void)SPI_SEND(priv->dev, SST26_ULBPR); @@ -459,6 +460,27 @@ static void sst26_writeenable(struct sst26_dev_s *priv) sstinfo("Enabled\n"); } +/************************************************************************************ + * Name: sst26_writedisable + ************************************************************************************/ + +static void sst26_writedisable(struct sst26_dev_s *priv) +{ + /* Select this FLASH part */ + + SPI_SELECT(priv->dev, SPIDEV_FLASH, true); + + /* Send "Write Disable (WRDI)" command */ + + (void)SPI_SEND(priv->dev, SST26_WRDI); + + /* Deselect the FLASH */ + + SPI_SELECT(priv->dev, SPIDEV_FLASH, false); + + sstinfo("Disabled\n"); +} + /************************************************************************************ * Name: sst26_sectorerase (4k) ************************************************************************************/ @@ -939,8 +961,9 @@ FAR struct mtd_dev_s *sst26_initialize_spi(FAR struct spi_dev_s *dev) else { /* Make sure that the FLASH is unprotected so that we can write into it */ - + sst26_writeenable(priv); sst26_globalunlock(priv); + sst26_writedisable(priv); #ifdef CONFIG_MTD_REGISTRATION /* Register the MTD with the procfs system if enabled */