Not all labels are added because there is no match with the label name.
issue_labeler.yml
os: Linux -> os: linux
001_bug_report.yml
Type: bug -> Type: Bug
Corrected label in links
002_feature_request.yml
Type: enhancement -> Type: Enhancement
Corrected label in links
003_help.yml
Type: question -> Community: Question
Corrected label in links
pthread & detach will still quit when parent task exit,
cause nsh_parse clone args leak. nsh should use task instead of thread
this case can reproduce the memory leak.
int main(int argc, FAR char *argv[])
{
printf("Hello, World!!\n");
system("sleep 1 &");
return 0;
}
Signed-off-by: buxiasen <buxiasen@xiaomi.com>
This PR updates the Build Rules `arch.yml` to build only these Arm32 Targets when we create or update a Complex PR:
- arm-01, arm-03, arm-05, arm-06, arm-07, arm-09, arm-11
No changes for Simple PRs (arm-01 to arm-14) and for Merging PRs (also arm-01 to arm-14).
This will improve our breadth of CI Checks across Arm32 Targets, as explained here: https://github.com/apache/nuttx/issues/14376
When we submit or update a Complex PR that affects All Architectures (Arm, RISC-V, Xtensa, etc): CI Workflow shall run only half the jobs for RISC-V, Xtensa and Simulator:
- `risc-v-01` to `03`
- `xtensa-01`
- `sim-01`
When the Complex PR is Merged: CI Workflow will still run all jobs for RISC-V, Xtensa and Simulator:
- `risc-v-01` to `06`
- `xtensa-01` to `02`
- `sim-01` to `02`
Simple PRs with One Single Arch / Board will build the same way as before:
- `risc-v-01` to `06`
- `xtensa-01` to `02`
- `sim-01` to `02`
We hope to lower drastically our usage of GitHub Runners before the ASF Deadline, as explained here: https://github.com/apache/nuttx/issues/14376
The PRIu16 macro in the system is defined as "u", and "hu" is required.
In Linux and Nuttx, PRIu32 PRIu16 PRIu8 are all defined as "u", but %pB
prints the structure and needs its offset. %pB gets the offset through
sizeof(short int)
Signed-off-by: likun17 <likun17@xiaomi.com>
If the controller frequency is high, system timer interrupts will
eventually interrupt the controller function, thereby increasing the
execution time. This may lead to skipping the control cycle, which
negatively affects the control algorithm.
With this option enabled, interrupts are disabled for the duration
of the controller function execution.
Here example results from CONFIG_EXAMPLES_FOC_PERF output
for b-g431b-esc1 board with CONFIG_EXAMPLES_FOC_NOTIFIER_FREQ=10000:
1. CONFIG_EXAMPLES_FOC_CONTROL_CRITSEC=n
exec ticks=5258
nsec=30929
per ticks=21268
nsec=125105
2. CONFIG_EXAMPLES_FOC_CONTROL_CRITSEC=y
exec ticks=3428
nsec=20164
per ticks=19203
nsec=112958
The difference is ~12us!
CONFIG_EXAMPLES_FOC_RUN_DISABLE option is used for tests and benchmarks, so we don't
care about wrong results for motor identification and sensor alignment routines
fix compilatgion error:
foc_motor_f32.c: In function 'foc_motor_init':
foc_motor_f32.c:1574:7: error: label 'errout' used but not defined
1574 | goto errout;
fix snprintf warning:
foc_thr.c:110:39: warning: '%d' directive output may be truncated writing between 1 and 11 bytes into a region of size 7 [-Wformat-truncation=]
110 | snprintf(mqname, sizeof(mqname), "%s%d", CONTROL_MQ_MQNAME, envp->id);
| ^~
foc_thr.c:110:36: note: directive argument in the range [-2147483648, 0]
110 | snprintf(mqname, sizeof(mqname), "%s%d", CONTROL_MQ_MQNAME, envp->id);
| ^~~~~~
foc_thr.c:110:3: note: 'snprintf' output between 5 and 15 bytes into a destination of size 10
110 | snprintf(mqname, sizeof(mqname), "%s%d", CONTROL_MQ_MQNAME, envp->id);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-O3: reduce code size.
-DTF_LITE_STATIC_MEMORY: cause bugs on some cores.
+DTFLITE_EMULATE_FLOAT: robuster to emulate float cucalation by fix-point.
Signed-off-by: jihandong <jihandong@xiaomi.com>
The second argument of vgetq_lane_s32(__a, __b) needs to be initialized before compilation, so unroll the for loop. and correct the passed parameters.
Signed-off-by: xinhaiteng <xinhaiteng@xiaomi.com>
The complete implementation is placed separately in mLearning/tflite-micro/operators/neon, delete this part.
Signed-off-by: xinhaiteng <xinhaiteng@xiaomi.com>
Cortex-A compilation options are added to tflite-micro and cmsis-nn, and new operator compilation environments are configured.
Signed-off-by: xinhaiteng <xinhaiteng@xiaomi.com>
VELAPLATFO-25411
On the basis of CMSIS-NN, neon was used to optimize the Add operator, which calculates the offset and addition of eight input and output data in one loop.
Signed-off-by: xinhaiteng <xinhaiteng@xiaomi.com>
Based on CMSIS-NN, the Conv operator was optimized. Using Neon acceleration, multiply 8 input data and 8 filter data in a single loop; Using Im2col technology, convert the output data into a matrix, calculate 2 rows of input data and 4 rows of filter data in a single large loop, and obtain 2x4 output data.
Signed-off-by: xinhaiteng <xinhaiteng@xiaomi.com>
When we submit or update a Complex PR that affects All Architectures (Arm, RISC-V, Xtensa, etc): CI Workflow shall run only half the jobs. Previously CI Workflow will run `arm-01` to `arm-14`, now we will run only `arm-01` to `arm-07`.
When the Complex PR is Merged: CI Workflow will still run all jobs `arm-01` to `arm-14`
Simple PRs with One Single Arch / Board will build the same way as before: `arm-01` to `arm-14`
This is explained here: https://github.com/apache/nuttx/issues/14376
Note that this version of `arch.yml` has diverged from `nuttx` repo, since we are unable to merge https://github.com/apache/nuttx/pull/14377
In the mm test, if the memory requested this time exceeds 3/4 of the remaining memory,
the request will be skipped to avoid insufficient memory.
Signed-off-by: chenzihan1 <chenzihan1@xiaomi.com>
PREFIX needs to be added to Make.dep to avoid Make.dep regeneration during incremental compilation
AROBJSRULES is just the .o file in the copy archive. Its output content is worthless, so we hide it by default.
Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
