Xiang Xiao c8f1eeed57 Merge commit '2e43815c92' into dev ... Change-Id: Idcbac12fec435abff01cfb4efd5a26a02eb08f93		2021-07-13 03:14:34 +08:00
..
arm	libc: Implement fesetround & fegetround for arm	2021-06-25 12:24:24 +08:00
renesas	Renesas/RX: add RX setjmp, ARCH_RENESAS_RX, and RX65N ioctl	2021-06-30 23:01:57 -05:00
risc-v
sim
x86
xtensa
Kconfig	Fix various typos in comments and documentation	2021-07-04 11:23:26 -05:00
Make.defs	Renesas/RX: add RX setjmp, ARCH_RENESAS_RX, and RX65N ioctl	2021-06-30 23:01:57 -05:00