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nuttx/arch/xtensa/include
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zhuyanlin e333733053 xtensa:coproc: fix XTENSA_CP_ALLSET error in some case 
Consider follow coprocessor configuration case:

\#define XCHAL_CP_NUM                    1       /* number of coprocessors */
\#define XCHAL_CP_MAX                    2       /* max CP ID + 1 (0 if none) */
\#define XCHAL_CP_MASK                   0x02    /* bitmask of all CPs by ID */
\#define XCHAL_CP_PORT_MASK              0x00    /* bitmask of only port CPs */
\
\#define XCHAL_CP1_NAME                  "AudioEngineLX"
\#define XCHAL_CP1_IDENT                 AudioEngineLX
\#define XCHAL_CP1_SA_SIZE               208     /* size of state save area */
\#define XCHAL_CP1_SA_ALIGN              8       /* min alignment of save area */
\#define XCHAL_CP_ID_AUDIOENGINELX       1       /* coprocessor ID (0..7) */

In this case, XTENSA_CP_ALLSET is 0x1, but valid coprocessors
bitmap is 0x2, use marco XCHAL_CP_MASK instead, it is bitmap of all
vaild coprocs.

Change-Id: I63ec01e4bd0cbafc62d56636cc11bdc4a2f7857f
2021-08-10 19:44:55 -07:00
..
esp32 esp32: replace EPS32 typo with ESP32 2021-04-29 18:03:05 -03:00
esp32s2 Fix dangling whitespace at the end of line 2021-06-01 07:49:54 +02:00
lx6 arch: xtensa: Author Gregory Nutt: update licenses to Apache 2021-04-02 03:14:31 -05:00
lx7 Add initial ESP32S2 Xtensa support 2021-06-01 07:49:54 +02:00
xtensa xtensa:coproc: fix XTENSA_CP_ALLSET error in some case 2021-08-10 19:44:55 -07:00
.gitignore Remove exra whitespace from files (#189) 2020-01-31 09:24:49 -06:00
arch.h arch: Rename xxx_getsp to up_getsp 2021-06-09 10:20:02 -07:00
elf.h xtensa: Implement a few relocations 2020-03-16 07:54:49 -06:00
inttypes.h xtensa inttypes.h: Remove PRI/SCN macros for fast and least types 2020-11-05 18:49:22 -08:00
irq.h arch:xtensa:include chip/irq.h instead of depend on chip config. 2021-08-05 10:08:48 +02:00
limits.h arch: xtensa: Author Gregory Nutt: update licenses to Apache 2021-04-02 03:14:31 -05:00
loadstore.h esp32: emulate byte access for module text 2020-03-16 07:54:49 -06:00
simcall.h xtensa: Implement simcall 2020-03-12 09:03:31 -05:00
spinlock.h arch&boards/xtensa: Fix some typos, references to STM/ARM code and 2020-08-27 05:48:55 -07:00
stdarg.h arch:xtensa: add arch stdarg.h include file for xtensa 2021-08-09 17:58:25 -03:00
syscall.h arch: xtensa: Author Gregory Nutt: update licenses to Apache 2021-04-02 03:14:31 -05:00
tls.h arch: Rename xxx_getsp to up_getsp 2021-06-09 10:20:02 -07:00
types.h arch: xtensa: Author Gregory Nutt: update licenses to Apache 2021-04-02 03:14:31 -05:00