Ville Juven 9288ed85e7 RISC-V: Add/fix implementation for arch_elf.c ... The jump instruction relocation had an assert that tests for jumps with an offset of 0. This makes it so that a while(1); statement causes an assert because the jump instruction points to the same address, which is perfectly legal. Addend was not handled correctly in several reloc types. Add ADD32/64 + SUB32/64 relocations, for some reason the compiler I use likes to add them.		2022-03-23 17:56:54 +08:00
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arch_elf.c	RISC-V: Add/fix implementation for arch_elf.c	2022-03-23 17:56:54 +08:00
arch_setjmp.S	arch/risc-v: Save/Load float register in setjmp	2022-03-09 10:15:54 +02:00
Make.defs	arch/sim: Move setjmp/longjmp to libc/machine/sim	2021-04-05 09:00:42 -03:00