mirror of
https://github.com/apache/nuttx.git
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e09048cc88
Correct duplicate "is is" word found in 181 files throughout the codebase. In most cases "is is" was changed to "is", but in contexts like "MCU is is sleep mode" it was corrected to "MCU in sleep mode". Also fixes a "the the" typo in net/inet/inet_sockif.c. This is a pure style/documentation fix that improves code readability. Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
236 lines
7.9 KiB
C
236 lines
7.9 KiB
C
/****************************************************************************
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* boards/arm/stm32/nucleo-f303re/include/board.h
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __BOARDS_ARM_STM32_NUCLEO_F303RE_INCLUDE_BOARD_H
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#define __BOARDS_ARM_STM32_NUCLEO_F303RE_INCLUDE_BOARD_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#ifndef __ASSEMBLY__
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# include <stdint.h>
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# include <stdbool.h>
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#endif
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Clocking *****************************************************************/
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/* HSI - Internal 8 MHz RC Oscillator
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* LSI - 32 KHz RC
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* HSE - 8 MHz from MCO output of ST-LINK
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* LSE - 32.768 kHz
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*/
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#define STM32_BOARD_XTAL 8000000ul /* X1 on board */
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#define STM32_HSEBYP_ENABLE
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#define STM32_HSI_FREQUENCY 8000000ul
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#define STM32_LSI_FREQUENCY 40000 /* Between 30kHz and 60kHz */
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#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL
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#define STM32_LSE_FREQUENCY 32768 /* X2 on board */
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/* PLL source is HSE/1,
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* PLL multiplier is 9:
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* PLL frequency is 8MHz (XTAL) x 9 = 72MHz
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*/
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#define STM32_CFGR_PLLSRC RCC_CFGR_PLLSRC
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#define STM32_CFGR_PLLXTPRE 0
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#define STM32_CFGR_PLLMUL RCC_CFGR_PLLMUL_CLKx9
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#define STM32_PLL_FREQUENCY (9*STM32_BOARD_XTAL)
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/* Use the PLL and set the SYSCLK source to be the PLL */
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#define STM32_SYSCLK_SW RCC_CFGR_SW_PLL
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#define STM32_SYSCLK_SWS RCC_CFGR_SWS_PLL
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#define STM32_SYSCLK_FREQUENCY STM32_PLL_FREQUENCY
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/* AHB clock (HCLK) is SYSCLK (72MHz) */
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#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK
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#define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY
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/* APB2 clock (PCLK2) is HCLK (72MHz) */
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#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK
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#define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY
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#define STM32_APB2_CLKIN (STM32_PCLK2_FREQUENCY) /* Timers 1 and 8, 15-17 */
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/* APB2 timers 1 and 8, 15-17 will receive PCLK2. */
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/* Timers driven from APB2 will be PCLK2 */
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#define STM32_APB2_TIM1_CLKIN (STM32_PCLK2_FREQUENCY)
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#define STM32_APB2_TIM8_CLKIN (STM32_PCLK2_FREQUENCY)
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#define STM32_APB1_TIM15_CLKIN (STM32_PCLK2_FREQUENCY)
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#define STM32_APB1_TIM16_CLKIN (STM32_PCLK2_FREQUENCY)
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#define STM32_APB1_TIM17_CLKIN (STM32_PCLK2_FREQUENCY)
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/* APB1 clock (PCLK1) is HCLK/2 (36MHz) */
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#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2
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#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2)
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/* APB1 timers 2-7 will be twice PCLK1 */
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#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY)
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#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY)
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#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY)
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#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY)
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#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY)
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/* USB divider -- Divide PLL clock by 1.5 */
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#define STM32_CFGR_USBPRE 0
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/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
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* otherwise frequency is 2xAPBx.
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* Note: TIM1,8 are on APB2, others on APB1
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*/
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#define BOARD_TIM1_FREQUENCY STM32_HCLK_FREQUENCY
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#define BOARD_TIM2_FREQUENCY (STM32_HCLK_FREQUENCY / 2)
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#define BOARD_TIM3_FREQUENCY (STM32_HCLK_FREQUENCY / 2)
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#define BOARD_TIM4_FREQUENCY (STM32_HCLK_FREQUENCY / 2)
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#define BOARD_TIM5_FREQUENCY (STM32_HCLK_FREQUENCY / 2)
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#define BOARD_TIM6_FREQUENCY (STM32_HCLK_FREQUENCY / 2)
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#define BOARD_TIM7_FREQUENCY (STM32_HCLK_FREQUENCY / 2)
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#define BOARD_TIM8_FREQUENCY STM32_HCLK_FREQUENCY
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/* LED definitions **********************************************************/
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/* The Nucleo F303RE board has three LEDs. Two of these are controlled by
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* logic on the board and are not available for software control:
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*
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* LD1 COM: LD1 default status is red. LD1 turns to green to indicate that
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* communications are in progress between the PC and the
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* ST-LINK/V2-1.
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* LD3 PWR: red LED indicates that the board is powered.
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*
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* And one can be controlled by software:
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*
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* User LD2: green LED is a user LED connected to the I/O PA5 of the
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* STM32F303RET6.
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*
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* If CONFIG_ARCH_LEDS is not defined, then the user can control the LED in
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* any way. The following definition is used to access the LED.
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*/
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/* LED index values for use with board_userled() */
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#define BOARD_LED1 0 /* User LD2 */
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#define BOARD_NLEDS 1
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/* LED bits for use with board_userled_all() */
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#define BOARD_LED1_BIT (1 << BOARD_LED1)
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/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on board
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* the Nucleo F303RE. The following definitions describe how NuttX controls
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* the LED:
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*
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* SYMBOL Meaning LED1 state
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* ------------------ ----------------------- ----------
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* LED_STARTED NuttX has been started OFF
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* LED_HEAPALLOCATE Heap has been allocated OFF
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* LED_IRQSENABLED Interrupts enabled OFF
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* LED_STACKCREATED Idle stack created ON
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* LED_INIRQ In an interrupt No change
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* LED_SIGNAL In a signal handler No change
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* LED_ASSERTION An assertion failed No change
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* LED_PANIC The system has crashed Blinking
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* LED_IDLE STM32 is in sleep mode Not used
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*/
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#define LED_STARTED 0
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#define LED_HEAPALLOCATE 0
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#define LED_IRQSENABLED 0
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#define LED_STACKCREATED 1
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#define LED_INIRQ 2
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#define LED_SIGNAL 2
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#define LED_ASSERTION 2
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#define LED_PANIC 1
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/* Button definitions *******************************************************/
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/* The Nucleo F303RE supports two buttons; only one button is controllable
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* by software:
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*
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* B1 USER: user button connected to the I/O PC13 of the STM32F303RET6.
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* B2 RESET: push button connected to NRST is used to RESET the
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* STM32F303RET6.
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*/
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#define BUTTON_USER 0
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#define NUM_BUTTONS 1
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#define BUTTON_USER_BIT (1 << BUTTON_USER)
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/* Alternate function pin selections ****************************************/
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/* CAN */
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#define GPIO_CAN1_RX GPIO_CAN_RX_2
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#define GPIO_CAN1_TX GPIO_CAN_TX_2
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/* I2C */
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#define GPIO_I2C1_SCL GPIO_I2C1_SCL_3
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#define GPIO_I2C1_SDA GPIO_I2C1_SDA_3
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/* SPI */
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#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1
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#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1
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#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1
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/* TIM */
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#define GPIO_TIM2_CH2OUT GPIO_TIM2_CH2OUT_2
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#define GPIO_TIM2_CH3OUT GPIO_TIM2_CH3OUT_3
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#define GPIO_TIM3_CH1OUT GPIO_TIM3_CH1OUT_2
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#define GPIO_TIM3_CH2OUT GPIO_TIM3_CH2OUT_4
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#define GPIO_TIM4_CH1OUT GPIO_TIM4_CH1OUT_2
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/* USART */
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#define GPIO_USART2_RX GPIO_USART2_RX_2
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#define GPIO_USART2_TX GPIO_USART2_TX_2
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/* DMA channels *************************************************************/
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/* ADC */
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#define ADC1_DMA_CHAN DMACHAN_ADC1
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#define ADC2_DMA_CHAN DMACHAN_ADC2_1
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#define ADC3_DMA_CHAN DMACHAN_ADC3
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#define ADC4_DMA_CHAN DMACHAN_ADC4_1
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#endif /* __BOARDS_ARM_STM32_NUCLEO_F303RE_INCLUDE_BOARD_H */
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