mirror of
https://github.com/apache/nuttx.git
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e09048cc88
Correct duplicate "is is" word found in 181 files throughout the codebase. In most cases "is is" was changed to "is", but in contexts like "MCU is is sleep mode" it was corrected to "MCU in sleep mode". Also fixes a "the the" typo in net/inet/inet_sockif.c. This is a pure style/documentation fix that improves code readability. Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
587 lines
22 KiB
C
587 lines
22 KiB
C
/****************************************************************************
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* boards/arm/efm32/efm32gg-stk3700/include/board.h
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __BOARDS_ARM_EFM32_EFM32GG_STK3700_INCLUDE_BOARD_H
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#define __BOARDS_ARM_EFM32_EFM32GG_STK3700_INCLUDE_BOARD_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Clocking *****************************************************************/
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/* Clock Sources
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* - 1-28 MHz High Frequency RC Oscillator (HFRCO)
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* - 4-32 MHz High Frequency Crystal Oscillator (HFXO)
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* - 32.768 kHz Low Frequency RC Oscillator (LFRCO)
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* - 32.768 kHz Low Frequency Crystal Oscillator (LFXO)
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* - 1KHz Ultra Low Frequency RC Oscillator (ULFRCO)
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*
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* The device boots with 14 MHz HFRCO as the HFCLK source.
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*/
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#define BOARD_HAVE_HFXO 1 /* Have High frequency crystal oscillator */
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#define BOARD_HAVE_LFXO 1 /* Have Loq frequency crystal oscillator */
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#define BOARD_HFRCO_FREQUENCY 14000000 /* 14MHz on reset */
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#define BOARD_HFXO_FREQUENCY 48000000 /* 48MHz crystal on board */
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#define BOARD_LFRCO_FREQUENCY 32768 /* Low frequency oscillator */
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#define BOARD_LFXO_FREQUENCY 32768 /* 32MHz crystal on board */
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#define BOARD_ULFRCO_FREQUNCY 1000 /* Ultra low frequency oscillator */
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/* HFCLK - High Frequency Clock
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*
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* HFCLK is the selected High Frequency Clock. This clock is used by the CMU
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* and drives the two prescalers that generate HFCORECLK and HFPERCLK. The
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* HFCLK can be driven by a high-frequency oscillator (HFRCO or HFXO) or one
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* of the low-frequency oscillators (LFRCO or LFXO). By default the HFRCO is
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* selected.
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*/
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#define BOARD_HFCLKSEL _CMU_CMD_HFCLKSEL_HFXO
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#define BOARD_HFCLKDIV 0 /* Does not apply to EFM32G */
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#define BOARD_HFCLK_FREQUENCY BOARD_HFXO_FREQUENCY
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/* HFCORECLK - High Frequency Core Clock
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*
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* HFCORECLK is a prescaled version of HFCLK. This clock drives the Core
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* Modules, which consists of the CPU and modules that are tightly coupled
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* to the CPU, e.g. MSC, DMA etc. The frequency of HFCORECLK is set using
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* the CMU_HFCORECLKDIV register.
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*/
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#define BOARD_HFCORECLKDIV _CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT
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#define BOARD_HFCORECLK_FREQUENCY BOARD_HFXO_FREQUENCY
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/* HFPERCLK - High Frequency Peripheral Clock
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*
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* Like HFCORECLK, HFPERCLK can also be a prescaled version of HFCLK. This
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* clock drives the High-Frequency Peripherals. The frequency of HFPERCLK is
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* set using the CMU_HFPERCLKDIV register.
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*/
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#define BOARD_HFPERCLKDIV _CMU_HFPERCLKDIV_HFPERCLKDIV_DEFAULT
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#define BOARD_HFPERCLK_FREQUENCY BOARD_HFXO_FREQUENCY
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/* LFACLK - Low Frequency A Clock
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*
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* LFACLK is the selected clock for the Low Energy A Peripherals. There are
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* four selectable sources for LFACLK: LFRCO, LFXO, HFCORECLK/2 and ULFRCO.
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* From reset, the LFACLK source is set to LFRCO. However, note that the
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* LFRCO is disabled from reset. The selection is configured using the LFA
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* field in CMU_LFCLKSEL. The HFCORECLK/2 setting allows the Low Energy A
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* Peripherals to be used as high-frequency peripherals.
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*
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* Use _CMU_LFCLKSEL_LFA_DISABLED to disable.
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* ULFRCO is a special case.
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*/
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#if BOARD_HAVE_LFXO
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# define BOARD_LFACLKSEL _CMU_LFCLKSEL_LFA_LFXO
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# undef BOARD_LFACLK_ULFRCO
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# define BOARD_LFACLK_FREQUENCY BOARD_LFXO_FREQUENCY
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#else
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# define BOARD_LFACLKSEL _CMU_LFCLKSEL_LFA_LFRCO
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# undef BOARD_LFACLK_ULFRCO
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# define BOARD_LFACLK_FREQUENCY BOARD_LFRCO_FREQUENCY
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#endif
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/* LFBCLK - Low Frequency B Clock
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*
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* LFBCLK is the selected clock for the Low Energy B Peripherals. There are
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* four selectable sources for LFBCLK: LFRCO, LFXO, HFCORECLK/2 and ULFRCO.
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* From reset, the LFBCLK source is set to LFRCO. However, note that the
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* LFRCO is disabled from reset. The selection is configured using the LFB
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* field in CMU_LFCLKSEL. The HFCORECLK/2 setting allows the Low Energy B
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* Peripherals to be used as high-frequency peripherals.
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*
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* Use _CMU_LFCLKSEL_LFA_DISABLED to disable.
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* ULFRCO is a special case.
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*/
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#define BOARD_LFBCLKSEL _CMU_LFCLKSEL_LFB_LFXO
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#undef BOARD_LFBCLK_ULFRCO
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#define BOARD_LFBCLK_FREQUENCY BOARD_LFXO_FREQUENCY
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/* PCNTnCLK - Pulse Counter n Clock
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*
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* Each available pulse counter is driven by its own clock, PCNTnCLK where
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* n is the pulse counter instance number. Each pulse counter can be
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* configured to use an external pin (PCNTn_S0) or LFACLK as PCNTnCLK.
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*/
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/* WDOGCLK - Watchdog Timer Clock
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*
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* The Watchdog Timer (WDOG) can be configured to use one of three different
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* clock sources: LFRCO, LFXO or ULFRCO. ULFRCO (Ultra Low Frequency RC
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* Oscillator) is a separate 1 kHz RC oscillator that also runs in EM3.
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*/
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/* AUXCLK - Auxiliary Clock
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*
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* AUXCLK is a 1-28 MHz clock driven by a separate RC oscillator, AUXHFRCO.
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* This clock is used for flash programming and Serial Wire Output (SWO).
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* During flash programming this clock will be active. If the AUXHFRCO has
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* not been enabled explicitly by software, the MSC will automatically
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* start and stop it. The AUXHFRCO is enabled by writing a 1 to AUXHFRCOEN
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* in CMU_OSCENCMD. This explicit enabling is required when SWO is used.
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*/
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/* LEDs *********************************************************************/
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/* The EFM32 Giant Gecko Start Kit has two yellow LEDs marked LED0 and LED1.
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* These LEDs are controlled by GPIO pins on the EFM32. The LEDs are
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* connected to pins PE2 and PE3 in an active high configuration:
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*
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* ------------------------------------- --------------------
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* EFM32 PIN BOARD SIGNALS
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* ------------------------------------- --------------------
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* E2/BCK_VOUT/EBI_A09 #0/ MCU_PE2 UIF_LED0
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* TIM3_CC2 #1/U1_TX #3/ACMP0_O #1
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* E3/BCK_STAT/EBI_A10 #0/U1_RX #3/ MCU_PE3 UIF_LED1
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* ACMP1_O #1
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* ------------------------------------- --------------------
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*
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* All LEDs are grounded and so are illuminated by outputting a high
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* value to the LED.
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*/
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/* LED index values for use with board_userled() */
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#define BOARD_LED0 0
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#define BOARD_LED1 1
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#define BOARD_NLEDS 2
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/* LED bits for use with board_userled_all() */
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#define BOARD_LED0_BIT (1 << BOARD_LED0)
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#define BOARD_LED1_BIT (1 << BOARD_LED1)
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/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is
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* defined. In that case, the usage by the board port is defined in
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* include/board.h and src/efm32_autoleds.c. The LEDs are used to
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* encode OS-related events as follows:
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*
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* SYMBOL Val Meaning LED state
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* LED0 LED1
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* ----------------- --- ----------------------- -------- --------
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*/
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#define LED_STARTED 0 /* NuttX has been started OFF OFF */
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#define LED_HEAPALLOCATE 0 /* Heap has been allocated OFF OFF */
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#define LED_IRQSENABLED 0 /* Interrupts enabled OFF OFF */
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#define LED_STACKCREATED 1 /* Idle stack created ON OFF */
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#define LED_INIRQ 2 /* In an interrupt No change */
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#define LED_SIGNAL 2 /* In a signal handler No change */
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#define LED_ASSERTION 2 /* An assertion failed No change */
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#define LED_PANIC 3 /* The system has crashed OFF Blinking */
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#undef LED_IDLE /* MCU is in sleep mode Not used */
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/* Buttons ******************************************************************/
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/* The EFM32 Giant Gecko Start Kit has two buttons marked PB0 and PB1. They
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* are connected to the EFM32, and are debounced by RC filters with a time
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* constant of 1ms. The buttons are connected to pins PB9 and PB10:
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*
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* ------------------------------------- --------------------
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* EFM32 PIN BOARD SIGNALS
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* ------------------------------------- --------------------
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* B9/EBI_A03/U1_TX #2 MCU_PB9 UIF_PB0
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* B10/EBI_A04/U1_RX #2 MCU_PB10 UIF_PB1
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* ------------------------------------- --------------------
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*
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* Buttons are connected to ground so they will read low when closed.
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*/
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#define BUTTON_PB0 0
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#define BUTTON_PB1 1
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#define NUM_BUTTONS 2
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#define BUTTON_PB0_BIT (1 << BUTTON_PB0)
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#define BUTTON_PB1_BIT (1 << BUTTON_PB1)
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/* Pin routing **************************************************************/
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/* UART0:
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*
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* The kit contains a board controller that is responsible for performing
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* various board level tasks, such as handling the debugger and the
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* Advanced Energy Monitor.
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* An interface is provided between the EFM32 and the board controller in
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* the form of a UART connection. The connection is enabled by
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* setting the EFM_BC_EN (PF7) line high, and using the lines EFM_BC_TX
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* (PE0) and EFM_BC_RX (PE1) for communicating.
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*
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* U0_TX #1 PE0 MCU_PE0, UART0_TX #0, EFM_BC_RX, BC_UART_RX
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* U0_RX #1 PE1 MCU_PE1, UART0_TX #1, EFM_BC_TX, BC_UART_TX
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*/
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#define BOARD_UART0_RX_GPIO (GPIO_PORTE|GPIO_PIN1)
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#define BOARD_UART0_TX_GPIO (GPIO_PORTE|GPIO_PIN0)
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#define BOARD_UART0_ROUTE_LOCATION _USART_ROUTE_LOCATION_LOC1
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/* LEUART0:
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*
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* LEU0_TX #0 PD4 Available on TP122 and EXP pin 12
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* LEU0_RX #0 PD5 Available on TP123 and EXP pin 14
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*/
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#define BOARD_LEUART0_RX_GPIO (GPIO_PORTD|GPIO_PIN5)
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#define BOARD_LEUART0_TX_GPIO (GPIO_PORTD|GPIO_PIN4)
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#define BOARD_LEUART0_ROUTE_LOCATION _LEUART_ROUTE_LOCATION_LOC0
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/* Clocking *****************************************************************/
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/* Clock Sources
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* - 1-28 MHz High Frequency RC Oscillator (HFRCO)
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* - 4-32 MHz High Frequency Crystal Oscillator (HFXO)
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* - 32.768 kHz Low Frequency RC Oscillator (LFRCO)
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* - 32.768 kHz Low Frequency Crystal Oscillator (LFXO)
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* - 1KHz Ultra Low Frequency RC Oscillator (ULFRCO)
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*
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* The device boots with 14 MHz HFRCO as the HFCLK source.
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*/
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#define BOARD_HAVE_HFXO 1 /* Have High frequency crystal oscillator */
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#define BOARD_HAVE_LFXO 1 /* Have Low frequency crystal oscillator */
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#define BOARD_HFRCO_FREQUENCY 14000000 /* 14MHz on reset */
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#define BOARD_HFXO_FREQUENCY 48000000 /* 32MHz crystal on board */
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#define BOARD_LFRCO_FREQUENCY 32768 /* Low frequency oscillator */
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#define BOARD_LFXO_FREQUENCY 32768 /* 32KHz crystal on board */
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#define BOARD_ULFRCO_FREQUNCY 1000 /* Ultra low frequency oscillator */
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#if BOARD_HAVE_HFXO
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# define BOARD_SYSTEM_FREQUENCY BOARD_HFXO_FREQUENCY
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#else
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# define BOARD_SYSTEM_FREQUENCY BOARD_HFRCO_FREQUENCY
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#endif
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/* HFCLK - High Frequency Clock
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*
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* HFCLK is the selected High Frequency Clock. This clock is used by the CMU
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* and drives the two prescalers that generate HFCORECLK and HFPERCLK. The
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* HFCLK can be driven by a high-frequency oscillator (HFRCO or HFXO) or one
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* of the low-frequency oscillators (LFRCO or LFXO). By default the HFRCO is
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* selected.
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*/
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#define BOARD_HFCLKSEL _CMU_CMD_HFCLKSEL_HFXO
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#define BOARD_HFCLKDIV 0 /* Does not apply to EFM32G */
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#define BOARD_HFCLK_FREQUENCY BOARD_SYSTEM_FREQUENCY
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/* HFCORECLK - High Frequency Core Clock
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*
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* HFCORECLK is a prescaled version of HFCLK. This clock drives the Core
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* Modules, which consists of the CPU and modules that are tightly coupled
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* to the CPU, e.g. MSC, DMA etc. The frequency of HFCORECLK is set using
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* the CMU_HFCORECLKDIV register.
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*/
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#define BOARD_HFCORECLKDIV _CMU_HFCORECLKDIV_HFCORECLKDIV_DEFAULT
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#define BOARD_HFCORECLK_FREQUENCY BOARD_SYSTEM_FREQUENCY
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/* HFPERCLK - High Frequency Peripheral Clock
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*
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* Like HFCORECLK, HFPERCLK can also be a prescaled version of HFCLK. This
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* clock drives the High-Frequency Peripherals. The frequency of HFPERCLK is
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* set using the CMU_HFPERCLKDIV register.
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*/
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#define BOARD_HFPERCLKDIV _CMU_HFPERCLKDIV_HFPERCLKDIV_DEFAULT
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#define BOARD_HFPERCLK_FREQUENCY BOARD_SYSTEM_FREQUENCY
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/* LFACLK - Low Frequency A Clock
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*
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* LFACLK is the selected clock for the Low Energy A Peripherals. There are
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* four selectable sources for LFACLK: LFRCO, LFXO, HFCORECLK/2 and ULFRCO.
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* From reset, the LFACLK source is set to LFRCO. However, note that the
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* LFRCO is disabled from reset. The selection is configured using the LFA
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* field in CMU_LFCLKSEL. The HFCORECLK/2 setting allows the Low Energy A
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* Peripherals to be used as high-frequency peripherals.
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*
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* Use _CMU_LFCLKSEL_LFA_DISABLED to disable
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* ULFRCO is a special case.
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*/
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#if BOARD_HAVE_LFXO
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# define BOARD_LFACLKSEL _CMU_LFCLKSEL_LFA_LFXO
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# undef BOARD_LFACLK_ULFRCO
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# define BOARD_LFACLK_FREQUENCY BOARD_LFXO_FREQUENCY
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#else
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# define BOARD_LFACLKSEL _CMU_LFCLKSEL_LFA_LFRCO
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# undef BOARD_LFACLK_ULFRCO
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# define BOARD_LFACLK_FREQUENCY BOARD_LFRCO_FREQUENCY
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#endif
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/* LFBCLK - Low Frequency B Clock
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*
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* LFBCLK is the selected clock for the Low Energy B Peripherals. There are
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* four selectable sources for LFBCLK: LFRCO, LFXO, HFCORECLK/2 and ULFRCO.
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* From reset, the LFBCLK source is set to LFRCO. However, note that the
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* LFRCO is disabled from reset. The selection is configured using the LFB
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* field in CMU_LFCLKSEL. The HFCORECLK/2 setting allows the Low Energy B
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* Peripherals to be used as high-frequency peripherals.
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*
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* Use _CMU_LFCLKSEL_LFB_DISABLED to disable
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* ULFRCO is a special case.
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*/
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#if BOARD_HAVE_LFXO
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# define BOARD_LFBCLKSEL _CMU_LFCLKSEL_LFB_LFXO
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# undef BOARD_LFBCLK_ULFRCO
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# define BOARD_LFBCLK_FREQUENCY BOARD_LFXO_FREQUENCY
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#else
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# define BOARD_LFBCLKSEL _CMU_LFCLKSEL_LFB_LFRCO
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# undef BOARD_LFBCLK_ULFRCO
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# define BOARD_LFBCLK_FREQUENCY BOARD_LFRCO_FREQUENCY
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#endif
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/* BURTC Clock source
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* select clock source from following value:
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* - BURTC_CTRL_CLKSEL_LFRCO
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* - BURTC_CTRL_CLKSEL_LFXO
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* - BURTC_CTRL_CLKSEL_ULFRCO
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*/
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#define BOARD_BURTC_CLKSRC BURTC_CTRL_CLKSEL_LFXO
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/* BURTC Prescaler
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* select Prescaler from following value:
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* - BURTC_CTRL_PRESC_DIV1
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* - BURTC_CTRL_PRESC_DIV2
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* - BURTC_CTRL_PRESC_DIV4
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* - BURTC_CTRL_PRESC_DIV8
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* - BURTC_CTRL_PRESC_DIV16
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* - BURTC_CTRL_PRESC_DIV32
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* - BURTC_CTRL_PRESC_DIV64
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* - BURTC_CTRL_PRESC_DIV128
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*/
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#define BOARD_BURTC_PRESC BURTC_CTRL_PRESC_DIV1
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/* BURTC Mode
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* select enable mode from following value:
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* - BURTC_CTRL_MODE_EM2EN
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* - BURTC_CTRL_MODE_EM3EN
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* - BURTC_CTRL_MODE_EM4EN
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*/
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#define BOARD_BURTC_MODE BURTC_CTRL_MODE_EM4EN
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/* PCNTnCLK - Pulse Counter n Clock
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*
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* Each available pulse counter is driven by its own clock, PCNTnCLK where
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* n is the pulse counter instance number. Each pulse counter can be
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* configured to use an external pin (PCNTn_S0) or LFACLK as PCNTnCLK.
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*/
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/* WDOGCLK - Watchdog Timer Clock
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*
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* The Watchdog Timer (WDOG) can be configured to use one of three different
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* clock sources: LFRCO, LFXO or ULFRCO. ULFRCO (Ultra Low Frequency RC
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* Oscillator) is a separate 1 kHz RC oscillator that also runs in EM3.
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*/
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/* AUXCLK - Auxiliary Clock
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*
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* AUXCLK is a 1-28 MHz clock driven by a separate RC oscillator, AUXHFRCO.
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* This clock is used for flash programming and Serial Wire Output (SWO).
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* During flash programming this clock will be active. If the AUXHFRCO has
|
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* not been enabled explicitly by software, the MSC will automatically
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* start and stop it. The AUXHFRCO is enabled by writing a 1 to AUXHFRCOEN
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* in CMU_OSCENCMD. This explicit enabling is required when SWO is used.
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*/
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#define BOARD_AUXCLK_FREQUENCY 14000000
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/* SWO Location - Where SWO goes out.
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*
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* On some board there is possible to use many location for swo output.
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|
*/
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#define BOARD_SWOPORT_LOCATION 0
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/* SWO Location - Where SWO goes out.
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*
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* On some board there is possible to different 2 pin in function of
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|
* swo location output.
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|
*/
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#define BOARD_GPIO_SWOPORT ( GPIO_OUTPUT_PUSHPULL | \
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|
GPIO_PORTF | \
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GPIO_PIN2 )
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/* LEDs *********************************************************************/
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|
|
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/* The EFM32 Gecko Starter Kit supports 4 yellow LEDs. One side is grounded
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* so these LEDs are illuminated by outputting a high value.
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|
*
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|
* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in
|
|
* any way. The following definitions are used to access individual LEDs.
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|
*/
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|
|
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/* LED index values for use with efm32_setled() */
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#define BOARD_LED1 0
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#define BOARD_LED2 1
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#define BOARD_NLEDS 2
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|
|
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#define BOARD_LED_SHIFT BOARD_LED1
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|
#define BOARD_LED_SHIFT2 BOARD_LED2
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|
|
/* LED bits for use with efm32_setleds() */
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|
|
|
#define BOARD_LED1_BIT (1 << BOARD_LED1)
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|
#define BOARD_LED2_BIT (1 << BOARD_LED2)
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|
|
|
/* Pin routing **************************************************************/
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|
|
|
/* USART0 is SPI:
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|
*
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|
* U0_CLK #2 PC9
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|
* U0_MISO #2 PC10
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|
* U0_MOSI #2 PC11
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|
*/
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|
|
|
#define BOARD_USART0_CLK_GPIO (GPIO_PORTC|GPIO_PIN9 )
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|
#define BOARD_USART0_RX_GPIO (GPIO_PORTC|GPIO_PIN10)
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|
#define BOARD_USART0_TX_GPIO (GPIO_PORTC|GPIO_PIN11)
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|
#define BOARD_USART0_ROUTE_LOCATION _USART_ROUTE_LOCATION_LOC2
|
|
|
|
/* Pin routing **************************************************************/
|
|
|
|
/* UART1 for KLINE:
|
|
*
|
|
* U1_RX #1 PD1
|
|
* U1_TX #1 PD0
|
|
*/
|
|
|
|
#define BOARD_USART1_RX_GPIO (GPIO_PORTD|GPIO_PIN1)
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|
#define BOARD_USART1_TX_GPIO (GPIO_PORTD|GPIO_PIN0)
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|
#define BOARD_USART1_ROUTE_LOCATION _USART_ROUTE_LOCATION_LOC1
|
|
|
|
/* Pin routing **************************************************************/
|
|
|
|
/* UART2 for GPS:
|
|
*
|
|
* U2_RX #1 PC3
|
|
* U2_TX #1 PC2
|
|
*/
|
|
|
|
#define BOARD_USART2_RX_GPIO (GPIO_PORTC|GPIO_PIN3)
|
|
#define BOARD_USART2_TX_GPIO (GPIO_PORTC|GPIO_PIN2)
|
|
#define BOARD_USART2_ROUTE_LOCATION _USART_ROUTE_LOCATION_LOC0
|
|
|
|
/* Pin routing **************************************************************/
|
|
|
|
/* PWM on TIMER0 for backlight:
|
|
*
|
|
* TIMER0 Channel 1 #4 PC0
|
|
*/
|
|
#define BOARD_PWM_TIMER0_PINCFG (GPIO_PORTC|GPIO_PIN0|GPIO_OUTPUT_PUSHPULL|GPIO_OUTPUT_SET)
|
|
#define BOARD_PWM_TIMER0_PINLOC _TIMER_ROUTE_LOCATION_LOC4
|
|
#define BOARD_PWM_TIMER0_CLKIN BOARD_SYSTEM_FREQUENCY
|
|
|
|
/* IC1:
|
|
*
|
|
* The pnbfano board one I2C.
|
|
*
|
|
* --------------------- ---------------------
|
|
* PIN CONNECTIONS
|
|
* --------------------- ---------------------
|
|
* PC7 For external spi (WIFI)
|
|
* PC8 for SDCARD
|
|
* --------------------- ---------------------
|
|
*/
|
|
|
|
#define BOARD_I2C1_SDA (GPIO_PORTC|GPIO_PIN4|GPIO_OUTPUT_WIREDAND|GPIO_OUTPUT_SET)
|
|
#define BOARD_I2C1_SCL (GPIO_PORTC|GPIO_PIN5|GPIO_OUTPUT_WIREDAND|GPIO_OUTPUT_SET)
|
|
#define BOARD_I2C1_ROUTE_LOCATION _I2C_ROUTE_LOCATION_LOC0
|
|
|
|
/* VCMP:
|
|
*
|
|
* --------------------- ---------------------
|
|
* PIN CONNECTIONS
|
|
* --------------------- ---------------------
|
|
* VDD level 3.1 V
|
|
* --------------------- ---------------------
|
|
*/
|
|
|
|
#define BOARD_VCMP_HALFBIAS 1 /* Enable half bias */
|
|
#define BOARD_VCMP_BIASPROG 8 /* Half bias 8 => 1µA */
|
|
#define BOARD_VCMP_WARMUP 0 /* 4 cycle (quickest) */
|
|
#define BOARD_VCMP_LEVEL (3.1) /* Set to 3V1 */
|
|
|
|
/* ACMP:
|
|
*
|
|
* --------------------- ---------------------
|
|
* PIN CONNECTIONS
|
|
* --------------------- ---------------------
|
|
* VBAT (PD6) 10V
|
|
* --------------------- ---------------------
|
|
*/
|
|
|
|
/* #define BOARD_ACMP_ENABLE */
|
|
|
|
#define BOARD_ACMP_WARMUP 0 /* 4 cycle (quickest)*/
|
|
#define BOARD_ACMP_LEVEL -1 /* TODO BOARD_ACMP_LEVEL */
|
|
#define BOARD_ACMP_INPUT 0 /* CH0 */
|
|
#define BOARD_ACMP_LOCATION 0 /* Location 0 */
|
|
|
|
#define BOARD_SDHC_BLOCK_DEV_PATH "/dev/mmcsd0"
|
|
#define BOARD_SDHC_MOUNT_PATH "/mnt"
|
|
|
|
#define BOARD_SPI0_CLK (GPIO_PORTC|GPIO_PIN9 |GPIO_OUTPUT_PUSHPULL|GPIO_OUTPUT_SET)
|
|
#define BOARD_SPI0_MOSI (GPIO_PORTC|GPIO_PIN11|GPIO_OUTPUT_PUSHPULL|GPIO_OUTPUT_SET)
|
|
|
|
#define BOARD_SPI0_MISO (GPIO_PORTC|GPIO_PIN10|GPIO_INPUT_PULLUP)
|
|
|
|
/****************************************************************************
|
|
* Public Function Prototypes
|
|
****************************************************************************/
|
|
|
|
/****************************************************************************
|
|
* Name: efm32_ledinit, efm32_setled, and efm32_setleds
|
|
*
|
|
* Description:
|
|
* If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board
|
|
* LEDs. If CONFIG_ARCH_LEDS is not defined, then the following interfaces
|
|
* are available to control the LEDs from user applications.
|
|
*
|
|
****************************************************************************/
|
|
|
|
int board_format_sdcard(void);
|
|
int board_mount_sdcard(void);
|
|
int board_umount_sdcard(void);
|
|
int board_is_usb_connected(void);
|
|
int board_is_usb_enabled(void);
|
|
int board_enable_usbmsc(void);
|
|
int board_disable_usbmsc(void);
|
|
|
|
#ifndef CONFIG_ARCH_LEDS
|
|
void efm32_ledinit(void);
|
|
void efm32_setled(int led, bool ledon);
|
|
void efm32_setleds(uint8_t ledset);
|
|
#endif
|
|
|
|
#endif /* __BOARDS_ARM_EFM32_EFM32GG_STK3700_INCLUDE_BOARD_H */
|