nuttx/arch/mips/Kconfig
Lwazi Dube 784035a3e9 arch/mips/jz4780: Add support for L2 cache operations
The common mips_cache.S only handles generic L1 cache operations and
does not support L2 (secondary) cache operations required for the
JZ4780 target.

This commit introduces mti_cache.S to support both L1 and L2 cache
operations.

The mti_cache.S implementation is BSD licensed from Imagination
Technologies.

Signed-off-by: Lwazi Dube <lwazeh@gmail.com>
2026-07-21 16:40:08 +08:00

112 lines
2.2 KiB
Text

#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
if ARCH_MIPS
choice
prompt "MIPS chip selection"
default ARCH_CHIP_PIC32MX
config ARCH_CHIP_PIC32MX
bool "PIC32MX"
select ARCH_MIPS32
select ARCH_HAVE_EIC
select ARCH_HAVE_IRQPRIO
select ARCH_VECNOTIRQ
select ARCH_HAVE_RAMFUNCS
select ARCH_HAVE_SERIAL_TERMIOS
---help---
Microchip PIC32MX (MIPS32)
config ARCH_CHIP_PIC32MZ
bool "PIC32MZ"
select ARCH_MIPS32
select ARCH_HAVE_EIC
select ARCH_HAVE_IRQPRIO
select ARCH_VECNOTIRQ
select ARCH_HAVE_RAMFUNCS
select ARCH_HAVE_SERIAL_TERMIOS
---help---
Microchip PIC32MZ (MIPS32)
config ARCH_CHIP_JZ4780
bool "JZ4780"
select ARCH_MIPS32
select ARCH_MIPS_XBURST1
select ARCH_DCACHE
select ARCH_ICACHE
select ARCH_HAVE_IRQPRIO
select ARCH_VECNOTIRQ
select ARCH_HAVE_RESET
select ARCH_HAVE_SERIAL_TERMIOS
select MIPS32_USE_WAIT_INSTRUCTION
select MIPS32_USE_SYSCALL_INSTRUCTION
---help---
Ingenic JZ4780 (MIPS32)
config ARCH_CHIP_MIPS_CUSTOM
bool "Custom MIPS chip"
select ARCH_CHIP_CUSTOM
---help---
Select this option if there is no directory for the chip under arch/mips/src/.
endchoice
config ARCH_MIPS32
bool
default n
select ARCH_HAVE_FORK
config ARCH_MIPS_M4K
bool
default n
config ARCH_MIPS_MICROAPTIV
bool
default n
select ARCH_HAVE_MICROMIPS
config ARCH_MIPS_M5150
bool
default n
select ARCH_HAVE_MICROMIPS
config ARCH_MIPS_XBURST1
bool
default n
config ARCH_HAVE_EIC
bool
default n
config ARCH_HAVE_MICROMIPS
bool
default n
config MIPS_MICROMIPS
bool "Use microMIPS ISA"
default n
depends on ARCH_HAVE_MICROMIPS
---help---
The processor supports both the MIPS32 ISA and the microMIPS ISA.
If this option is selected, the microMIPS ISA will be used.
Otherwise, the MIPS32 ISA will be used.
config ARCH_FAMILY
string
default "mips32" if ARCH_MIPS32
config ARCH_CHIP
string
default "pic32mx" if ARCH_CHIP_PIC32MX
default "pic32mz" if ARCH_CHIP_PIC32MZ
default "jz4780" if ARCH_CHIP_JZ4780
source "arch/mips/src/common/Kconfig"
source "arch/mips/src/mips32/Kconfig"
source "arch/mips/src/pic32mx/Kconfig"
source "arch/mips/src/pic32mz/Kconfig"
source "arch/mips/src/jz4780/Kconfig"
endif