nuttx/arch/xtensa/src/common
Xiang Xiao 94da3e4c3a arch: Remove critical section inside up_schedule_sigaction
since nxsig_tcbdispatch already hold it for us

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I2fe6ad840bdca3ec0eaa76a9af3b6929c7d5a721
2021-01-22 08:34:07 +01:00
..
xtensa.h arch/xtensa: Print backtrace on assertions. 2020-11-21 11:31:46 -03:00
xtensa_abi.h arch/xtensa/src/common/xtensa_abi.h: nxstyle fixes 2020-03-13 18:58:04 -06:00
xtensa_assert.c arch/xtensa: Fix some typos and correct some comments. 2020-09-30 13:55:28 -03:00
xtensa_attr.h Appease many of nxstyle errors for esp32 related files 2020-03-12 07:45:44 -06:00
xtensa_backtrace.S arch/xtensa/src/common/xtensa_backtrace.S: Update the comments to show 2020-12-09 09:44:04 -03:00
xtensa_blocktask.c sched/sched/sched.h: Make naming of all internal names consistent: 2020-05-09 16:58:42 -03:00
xtensa_checkstack.c arch/xtensa: Fix alignement when coloring and checking the stacks. 2020-12-09 09:44:04 -03:00
xtensa_context.S arch/xtensa/src/common/xtensa_context.S: Name A3 register the usual way. 2020-12-09 09:44:04 -03:00
xtensa_coproc.S arch/xtensa: Few typos and style fixes. 2020-09-21 19:14:19 -04:00
xtensa_copystate.c Remove exra whitespace from files (#189) 2020-01-31 09:24:49 -06:00
xtensa_cpenable.c Xtensa: Adapt co-processor state save/restore functions so that they are call-able from C with Windows ABI. 2016-10-30 08:35:09 -06:00
xtensa_cpuint.S arch/xtensa: Few typos and style fixes. 2020-09-21 19:14:19 -04:00
xtensa_cpupause.c arch, sched: Fix global IRQ control logics for SMP 2020-12-10 08:33:42 +01:00
xtensa_createstack.c arch/xtensa: Fix alignement when coloring and checking the stacks. 2020-12-09 09:44:04 -03:00
xtensa_dumpstate.c arch/xtensa: Print backtrace on assertions. 2020-11-21 11:31:46 -03:00
xtensa_exit.c arch & sched: task: Fix up_exit() and nxtask_exit() for SMP 2020-12-21 23:29:56 -06:00
xtensa_hostfs.c xtensa_hostfs.c: Change the license to Apache 2.0 2020-03-12 09:03:31 -05:00
xtensa_idle.c arch/: Trivial typos, mostly "their is" to "there is" 2020-09-09 14:09:43 -04:00
xtensa_initialize.c xtensa/esp32: Fix remaining SEPARATE typo 2020-11-06 16:19:48 +01:00
xtensa_initialstate.c arch: Initialize the idle thread stack info directly 2020-12-16 09:54:29 +09:00
xtensa_int_handlers.S arch/xtensa: Add a pseudo save area to be able to backtrace from 2020-12-09 09:44:04 -03:00
xtensa_interruptcontext.c arch: xtensa: Fix up_interrupt_context() for SMP 2020-09-30 08:32:25 -06:00
xtensa_irqdispatch.c Appease many of nxstyle errors for esp32 related files 2020-03-12 07:45:44 -06:00
xtensa_loadstore.S esp32: emulate byte access for module text 2020-03-16 07:54:49 -06:00
xtensa_lowputs.c Xtensa: Keep task state in TCB (unless you want to redesign signal handling). Lots of cosmetic clean-up. 2016-10-16 07:57:16 -06:00
xtensa_mdelay.c Xtensa: Keep task state in TCB (unless you want to redesign signal handling). Lots of cosmetic clean-up. 2016-10-16 07:57:16 -06:00
xtensa_mm.h xtensa/esp32: Fix remaining SEPARATE typo 2020-11-06 16:19:48 +01:00
xtensa_modifyreg8.c Xtensa: Keep task state in TCB (unless you want to redesign signal handling). Lots of cosmetic clean-up. 2016-10-16 07:57:16 -06:00
xtensa_modifyreg16.c Xtensa: Keep task state in TCB (unless you want to redesign signal handling). Lots of cosmetic clean-up. 2016-10-16 07:57:16 -06:00
xtensa_modifyreg32.c Xtensa: Keep task state in TCB (unless you want to redesign signal handling). Lots of cosmetic clean-up. 2016-10-16 07:57:16 -06:00
xtensa_panic.S Run codespell -w with the latest dictonary again 2020-02-23 22:27:46 +01:00
xtensa_puts.c Xtensa: Keep task state in TCB (unless you want to redesign signal handling). Lots of cosmetic clean-up. 2016-10-16 07:57:16 -06:00
xtensa_releasepending.c sched/sched/sched.h: Make naming of all internal names consistent: 2020-05-09 16:58:42 -03:00
xtensa_releasestack.c arch/xtensa/src/common: Refactor the mm_ macros into a separate file. 2020-10-25 20:20:01 -03:00
xtensa_reprioritizertr.c sched/sched/sched.h: Make naming of all internal names consistent: 2020-05-09 16:58:42 -03:00
xtensa_schedsigaction.c arch: Remove critical section inside up_schedule_sigaction 2021-01-22 08:34:07 +01:00
xtensa_sigdeliver.c arch/xtensa: Fix some typos and correct some comments. 2020-09-30 13:55:28 -03:00
xtensa_sigtramp.S Xtensa ESP32: Correct copyright info; update some comments 2016-12-22 12:34:55 -06:00
xtensa_simcall.S xtensa: Implement simcall 2020-03-12 09:03:31 -05:00
xtensa_stackframe.c arch/xtensa: Fix stack's alignment 2020-11-28 10:24:12 -03:00
xtensa_testset.c armv7-a, armv7-r, armv7-m: Add atomic read-add-write and read-subtract-write functions. 2018-02-04 12:22:03 -06:00
xtensa_timer.h Appease many of nxstyle errors for esp32 related files 2020-03-12 07:45:44 -06:00
xtensa_udelay.c Appease many of nxstyle errors for esp32 related files 2020-03-12 07:45:44 -06:00
xtensa_unblocktask.c sched/sched/sched.h: Make naming of all internal names consistent: 2020-05-09 16:58:42 -03:00
xtensa_user_handler.S arch/xtensa: Add a pseudo save area to be able to backtrace from 2020-12-09 09:44:04 -03:00
xtensa_usestack.c arch: Remove the special check for idle thread in up_use_stack 2020-12-16 09:54:29 +09:00
xtensa_vectors.S arch/xtensa: Fix some alingments and typos in assembly code. 2020-10-11 00:53:38 +08:00
xtensa_window_vector.S arch/xtensa/src/common: Don't include ESP32 files directly, include them 2020-11-28 10:24:12 -03:00
xtensa_windowspill.S arch/xtensa/src/common: Don't include ESP32 files directly, include them 2020-11-28 10:24:12 -03:00