nuttx/arch/tricore/src/illd
zhangyuan29 51ebb21474 tricore: Add fpu init to open FZ trap.
Initialize the FPU and enable the FZ (flush-to-zero) trap for
TriCore TC4xx processors. This ensures floating-point divide-by-zero
exceptions are properly caught and reported via the trap handler.

Signed-off-by: zhangyuan29 <zhangyuan29@xiaomi.com>
2026-05-21 11:34:14 +08:00
..
tc3xx
tc4xx