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Wire the shared Ameba SPI (DesignWare SSI) driver (arch/arm/src/common/ameba/ameba_spi.c) into the RTL8721F (amebagreen2) build and expose the SPI0/SPI1 masters at /dev/spiN. Add the per-chip ameba_spi_chip.h with the amebagreen2 controller bases (0x40121000 / 0x40122000, non-secure aliases), the group-0 SPI clock masks (bit14/bit15), and the per-signal crossbar pad-mux codes (SPI0 75/76/77/78, SPI1 79/80/81/82). The SSI ip_clk is the PERI_HCLK-domain clock, which the amebagreen2 fwlib exposes directly through HPERI_ClkGet(), so AMEBA_SPI_IPCLK() is a single ROM call rather than the register poking the other ICs need. Compile the common driver and the SDK fwlib SSI RAM source under CONFIG_AMEBA_SPI, register the bus in the board bring-up, and add an "spi" board configuration exercising the system/spi spitool. Assisted-by: Claude <noreply@anthropic.com> Signed-off-by: dechao_gong <dechao_gong@realsil.com.cn> |
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| arm | ||
| arm64 | ||
| avr | ||
| ceva | ||
| hc | ||
| mips | ||
| misco | ||
| or1k | ||
| renesas | ||
| risc-v | ||
| sim | ||
| sparc | ||
| tricore | ||
| x86 | ||
| x86_64 | ||
| xtensa | ||
| z16 | ||
| z80 | ||
| index.rst | ||