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nuttx/arch/risc-v
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zhangyu117 4ca2256a9b nuttx/atomic: select LIBC_ATOMIC_IRQ for archs without atomic support 
Select LIBC_ATOMIC_IRQ at the architecture level (ARM7TDMI, ARM926EJS,
ARMv6M) for chips that do not support atomic operations natively. This
covers all ARM7TDMI, ARM926EJS, and Cortex-M0 based chips automatically.

Also select LIBC_ATOMIC_IRQ for specific non-ARM architectures (AVR,
RISC-V, SPARC, Xtensa) that lack atomic instruction support.

Signed-off-by: zhangyu117 <zhangyu117@xiaomi.com>
2026-08-24 13:20:45 +08:00
..
include risc-v/allwinner-d1: Add initial Allwinner D1 board support. 2026-08-19 11:54:47 -03:00
src arch/risc-v/espressif: make LDO Kconfig selectable 2026-08-22 01:21:08 +08:00
CMakeLists.txt arch/risk-v: migrate to SPDX identifier 2024-12-02 17:23:25 +08:00
Kconfig nuttx/atomic: select LIBC_ATOMIC_IRQ for archs without atomic support 2026-08-24 13:20:45 +08:00